HGTG18N120BND Data Sheet March 2007 54A, 1200V, NPT Series N-Channel IGBT with Anti-Parallel Hyperfast Diode The HGTG18N120BND is a Non-Punch Through (NPT) IGBT design. This is a new member of the MOS gated high voltage switching IGBT family. IGBTs combine the best features of MOSFETs and bipolar transistors. This device has the high input impedance of a MOSFET and the low onstate conduction loss of a bipolar transistor. The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: AC and DC motor controls, power supplies and drivers for solenoids, relays and contactors. Features • 54A, 1200V, TC = 25oC • 1200V Switching SOA Capability • Typical Fall Time . . . . . . . . . . . . . . . 140ns at TJ = 150oC • Short Circuit Rating • Low Conduction Loss Packaging JEDEC STYLE TO-247 E C G Formerly Developmental Type TA49304. COLLECTOR (FLANGE) Ordering Information PART NUMBER PACKAGE HGTG18N120BND TO-247 BRAND 18N120BND NOTE: When ordering, use the entire part number. Symbol C G E FAIRCHILD SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 ©2007 Fairchild Semiconductor Corporation HGTG18N120BND Rev.C HGTG18N120BND Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HGTG18N120BND UNITS 1200 V At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 54 A At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 26 A Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM 160 A Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES ±20 V Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM ±30 V Switching Safe Operating Area at TJ = 150oC (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . SSOA 100A at 1200V Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES Collector Current Continuous Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 390 W Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.12 W/oC Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 260 oC Short Circuit Withstand Time (Note 2) at VGE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 8 µs Short Circuit Withstand Time (Note 2) at VGE = 12V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 15 µs CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Pulse width limited by maximum junction temperature. 2. VCE(PK) = 960V, TJ = 125oC, RG = 3Ω. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Collector to Emitter Breakdown Voltage BVCES IC = 250µA, VGE = 0V 1200 - - V Emitter to Collector Breakdown Voltage BVECS IC = 10mA, VGE = 0V Collector to Emitter Leakage Current Collector to Emitter Saturation Voltage Gate to Emitter Threshold Voltage ICES VCE(SAT) VGE(TH) VCE = 1200V IC = 18A, VGE = 15V 15 - - V TC = 25oC TC = 125oC TC = 150oC - - 250 µA - 300 - µA - - 4 mA TC = 25oC TC = 150oC - 2.45 2.7 V - 3.8 4.2 V 6.0 7.0 - V - - ±250 nA 100 - - A IC = 150µA, VCE = VGE IGES VGE = ±20V Switching SOA SSOA TJ = 150oC, RG = 3Ω, VGE = 15V, L = 200µH, VCE(PK) = 1200V Gate to Emitter Plateau Voltage VGEP IC = 18A, VCE = 600V - 10.5 - V IC = 18A, VCE = 600V VGE = 15V - 165 200 nC VGE = 20V - 220 250 nC - 23 28 ns - 17 22 ns - 170 200 ns - 90 140 ns - 1.9 2.4 mJ - 1.8 2.2 mJ Gate to Emitter Leakage Current On-State Gate Charge Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time QG(ON) td(ON)I trI td(OFF)I Current Fall Time tfI Turn-On Energy EON Turn-Off Energy (Note 3) EOFF ©2007 Fairchild Semiconductor Corporation IGBT and Diode at TJ = 25oC ICE = 18A VCE = 960V VGE = 15V RG = 3Ω L = 1mH Test Circuit (Figure 20) HGTG18N120BND Rev. C HGTG18N120BND Electrical Specifications TC = 25oC, Unless Otherwise Specified (Continued) PARAMETER Current Turn-On Delay Time Current Rise Time SYMBOL td(ON)I trI Current Turn-Off Delay Time td(OFF)I Current Fall Time tfI Turn-On Energy EON Turn-Off Energy (Note 3) EOFF Diode Forward Voltage VEC Diode Reverse Recovery Time Thermal Resistance Junction To Case trr RθJC TEST CONDITIONS MIN TYP MAX UNITS - 21 26 ns - 17 22 ns - 205 240 ns - 140 200 ns - 3.7 4.9 mJ - 2.6 3.1 mJ IEC = 18A - 2.6 3.2 V IEC = 18A, dIEC/dt = 200A/µs - 60 75 ns IEC = 2A, dIEC/dt = 200A/µs - 44 55 ns IGBT and Diode at TJ = 150oC ICE = 18A VCE = 960V VGE = 15V RG = 3Ω L = 1mH Test Circuit (Figure 20) IGBT - - 0.32 oC/W Diode - - 0.75 oC/W NOTE: 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Unless Otherwise Specified ICE , DC COLLECTOR CURRENT (A) 60 VGE = 15V 50 40 30 20 10 0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE ©2007 Fairchild Semiconductor Corporation 150 ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves 120 TJ = 150oC, RG = 3Ω, VGE = 15V, L = 200µH 100 80 60 40 20 0 0 200 400 600 800 1000 1200 1400 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA HGTG18N120BND Rev.C HGTG18N120BND TJ = 150oC, RG = 3Ω, L = 1mH, V CE = 960V TC = 75oC, VGE = 15V, IDEAL DIODE 100 50 10 1 fMAX1 = 0.05 / (td(OFF)I + td(ON)I) TC VGE fMAX2 = (PD - PC) / (EON + EOFF) oC 15V 75 PC = CONDUCTION DISSIPATION 75oC 12V (DUTY FACTOR = 50%) 110oC 15V RØJC = 0.32oC/W, SEE NOTES 110oC 12V 5 10 20 30 30 250 25 ISC 20 200 15 150 tSC 10 100 5 50 12 40 ICE , COLLECTOR TO EMITTER CURRENT (A) ICE, COLLECTOR TO EMITTER CURRENT (A) ICE, COLLECTOR TO EMITTER CURRENT (A) TC = 25oC 40 TC = 150oC 20 DUTY CYCLE < 0.5%, VGE = 12V PULSE DURATION = 250µs 0 0 2 6 4 8 TC = -55oC 16 TC = 25oC 80 TC = 150oC 60 40 20 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250µs 0 0 10 2 4 6 8 10 VCE , COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE 12 4.5 RG = 3Ω, L = 1mH, VCE = 960V EOFF, TURN-OFF ENERGY LOSS (mJ) EON2 , TURN-ON ENERGY LOSS (mJ) 15 100 VCE , COLLECTOR TO EMITTER VOLTAGE (V) 10 TJ = 150oC, VGE = 12V, VGE = 15V 8 6 4 2 TJ = 25oC, VGE = 12V, VGE = 15V 0 14 FIGURE 4. SHORT CIRCUIT WITHSTAND TIME 80 TC = -55oC 13 VGE , GATE TO EMITTER VOLTAGE (V) FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT 60 300 VCE = 960V, RG = 3Ω, TJ = 125oC ISC, PEAK SHORT CIRCUIT CURRENT (A) Unless Otherwise Specified (Continued) tSC , SHORT CIRCUIT WITHSTAND TIME (µs) fMAX, OPERATING FREQUENCY (kHz) Typical Performance Curves RG = 3Ω, L = 1mH, VCE = 960V 4.0 3.5 TJ = 150oC, VGE = 12V OR 15V 3.0 2.5 2.0 TJ = 25oC, VGE = 12V OR 15V 1.5 1.0 0.5 5 10 15 20 25 30 35 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT ©2007 Fairchild Semiconductor Corporation 40 5 10 15 20 25 30 35 40 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT HGTG18N120BND Rev.C HGTG18N120BND Typical Performance Curves 120 RG = 3Ω, L = 1mH, VCE = 960V RG = 3Ω, L = 1mH, VCE = 960V 100 TJ = 25oC, TJ = 150oC, VGE = 12V 35 trI , RISE TIME (ns) tdI , TURN-ON DELAY TIME (ns) 40 Unless Otherwise Specified (Continued) 30 25 TJ = 25oC, TJ = 150oC, VGE = 12V 80 60 40 20 20 TJ = 25oC, TJ = 150oC, VGE = 15V 15 5 15 10 25 20 30 35 TJ = 25oC OR TJ = 150oC, VGE = 15V 0 40 5 ICE , COLLECTOR TO EMITTER CURRENT (A) 250 30 35 40 RG = 3Ω, L = 1mH, VCE = 960V 225 200 VGE = 12V, VGE = 15V, TJ = 150oC tfI , FALL TIME (ns) td(OFF)I , TURN-OFF DELAY TIME (ns) RG = 3Ω, L = 1mH, VCE = 960V 250 200 150 175 TJ = 150oC, VGE = 12V OR 15V 150 125 100 75 VGE = 12V, VGE = 15V, TJ = 25oC 100 20 VGE , GATE TO EMITTER VOLTAGE (V) 100 TC = 25oC 50 7 TC = -55oC 11 9 10 12 13 VGE , GATE TO EMITTER VOLTAGE (V) 8 FIGURE 13. TRANSFER CHARACTERISTIC ©2007 Fairchild Semiconductor Corporation 14 15 10 20 25 30 35 40 FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT 150 6 5 ICE , COLLECTOR TO EMITTER CURRENT (A) DUTY CYCLE < 0.5%, VCE = 20V PULSE DURATION = 250µs TC = 150oC 25 40 FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT 200 TJ = 25oC, VGE = 12V OR 15V 50 25 10 15 20 30 35 ICE , COLLECTOR TO EMITTER CURRENT (A) 5 ICE, COLLECTOR TO EMITTER CURRENT (A) 25 FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT 300 0 20 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT 350 15 10 15 IG(REF) = 2mA, RL = 33.3Ω, TC = 25oC 15 VCE = 1200V VCE = 800V 10 VCE = 400V 5 0 0 50 100 150 200 QG, GATE CHARGE (nC) FIGURE 14. GATE CHARGE WAVEFORMS HGTG18N120BND Rev.C HGTG18N120BND Unless Otherwise Specified (Continued) 6 C, CAPACITANCE (nF) FREQUENCY = 1MHz 5 CIES 4 3 2 1 0 COES CRES 0 5 10 15 20 25 ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves 30 DUTY CYCLE < 0.5%, TC = 110oC PULSE DURATION = 250µs 25 VGE = 15V OR 12V 20 VGE = 10V 15 10 5 0 0 FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE ZθJC , NORMALIZED THERMAL RESPONSE 1 2 3 4 5 VCE, COLLECTOR TO EMITTER VOLTAGE (V) VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 16. COLLECTOR TO EMITTER ON-STATE VOLTAGE 100 0.5 0.2 0.1 10-1 0.05 t1 0.02 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC 0.01 SINGLE PULSE 10-2 10-5 PD 10-4 10-3 t2 10-2 10-1 100 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 17. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE 70 TC = 25oC, dIEC/dt = 200A/µs 60 150oC t, RECOVERY TIMES (ns) IF, FORWARD CURRENT (A) 100 25oC 10 50 trr 40 ta 30 tb 20 1 10 0 1 2 3 4 VF, FORWARD VOLTAGE (V) FIGURE 18. DIODE FORWARD CURRENT vs FORWARD VOLTAGE DROP ©2007 Fairchild Semiconductor Corporation 5 1 2 5 10 20 IF, FORWARD CURRENT (A) FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT HGTG18N120BND Rev.C HGTG18N120BND Test Circuits and Waveforms HGTG18N120BND 90% 10% VGE EON EOFF VCE L = 1mH 90% RG = 3Ω + - ICE VDD = 960V FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT 10% td(OFF)I tfI trI td(ON)I FIGURE 21. SWITCHING TEST WAVEFORMS Handling Precautions for IGBTs Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD™ LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. ©2007 Fairchild Semiconductor Corporation fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM. td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC. The sum of device switching and conduction losses must not exceed PD . A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON and EOFF are defined in the switching waveforms shown in Figure 21. EON is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0). HGTG18N120BND Rev.C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ® ACEx Across the board. Around the world.™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ CTL™ Current Transfer Logic™ DOME™ 2 E CMOS™ ® EcoSPARK EnSigna™ FACT Quiet Series™ ® FACT ® FAST FASTr™ FPS™ ® FRFET GlobalOptoisolator™ GTO™ HiSeC™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ MICROCOUPLER™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ ® OPTOLOGIC ® OPTOPLANAR PACMAN™ POP™ ® Power220 ® Power247 PowerEdge™ PowerSaver™ ® PowerTrench Programmable Active Droop™ ® QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ ScalarPump™ SMART START™ ® SPM STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ ® The Power Franchise ® TinyLogic TINYOPTO™ TinyPower™ TinyWire™ TruTranslation™ μSerDes™ ® UHC UniFET™ VCX™ Wire™ ™ TinyBoost™ TinyBuck™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Definition Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I24 © 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com