NTMD6N04R2 Power MOSFET 40 V, 5.8 A, Dual N-Channel SOIC-8 Features •Designed for use in low voltage, high speed switching applications •Ultra Low On-Resistance Provides http://onsemi.com Higher Efficiency and Extends Battery Life - RDS(on) = 0.027 W, VGS = 10 V (Typ) - RDS(on) = 0.034 W, VGS = 4.5 V (Typ) •Miniature SOIC-8 Surface Mount Package Saves Board Space •Diode is Characterized for Use in Bridge Circuits •Diode Exhibits High Speed, with Soft Recovery •Pb-Free Package is Available VDSS RDS(ON) Typ ID Max 40 V 27 mW @ VGS = 10 V 5.8 A N-Channel D D Applications •DC-DC Converters •Computers •Printers •Cellular and Cordless Phones •Disk Drives and Tape Drives G G S MARKING DIAGRAM & PIN ASSIGNMENT MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain-to-Source Voltage VDSS 40 V Gate-to-Source Voltage - Continuous VGS "20 V Drain Current (Note 1) - Continuous @ TA = 25°C - Single Pulse (tp ≤ 10 ms) ID IDM 5.8 29 Adc Apk Drain Current (Note 2) - Continuous @ TA = 25°C ID 4.6 Adc Total Power Dissipation @ TA = 25°C (Note 1) @ TA = 25°C (Note 2) PD W 2.0 1.29 TJ, Tstg -55 to +150 °C Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25°C (VDD = 40 Vdc, VGS = 5.0 Vdc, Vdc, Peak IL = 7.0 Apk, L = 10 mH, RG = 25 W) EAS 245 mJ Thermal Resistance - Junction-to-Ambient (Note 1) - Junction-to-Ambient (Note 2) RqJA Maximum Lead Temperature for Soldering Purposes for 10 Sec TL Operating and Storage Temperature Range December, 2007 - Rev. 0 D1 D1 D2 D2 8 8 1 SOIC-8 CASE 751 STYLE 11 E6N04 A Y WW G E6N04 AYWWG G 1 S1 G1 S2 G2 = Specific Device Code = Assembly Location = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION °C/W 62.5 97 Device NTMD6N04R2G °C 260 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. When surface mounted to an FR4 board using 1″ pad size, t ≤ 10 s 2. When surface mounted to an FR4 board using 1″ pad size, t = steady state © Semiconductor Components Industries, LLC, 2007 S 1 Package Shipping† SOIC-8 (Pb-Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTMD6N04R2/D NTMD6N04R2 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit V(BR)DSS V(BR)DSS/TJ 40 - 47 45 - - - 1.0 10 - - "100 1.0 - 1.9 4.7 3.0 - - 0.027 0.034 0.034 0.043 - 8.12 - Ciss - 723 900 Coss - 156 225 Crss - 53 75 td(on) - 10 18 tr - 20 35 td(off) - 45 70 tf - 40 65 td(on) - 15 - tr - 55 - td(off) - 30 - tf - 35 - QT - 20 30 Qgs - 2.5 - Qgd - 5.5 - VSD - 0.76 0.56 1.1 - Vdc trr - 23 - ns ta - 16 - tb - 7 - QRR - 20 - OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 mA) Temperature Coefficient (Positive) Vdc Zero Gate Voltage Drain Current (VDS = 40 Vdc, VGS = 0 Vdc, TJ = 25°C) (VDS = 40 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS Gate-Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc) IGSS mV/°C mAdc nAdc ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (VDS = VGS, ID = 250 mAdc) Temperature Coefficient (Negative) Vdc VGS(th) VGS(th)/TJ Static Drain-to-Source On-State Resistance (VGS = 10 Vdc, ID = 5.8 Adc) (VGS = 4.5 Vdc, ID = 3.9 Adc) W RDS(on) Forward Transconductance (VDS = 10 Vdc, ID = 5.8 Adc) mV/°C gFS Mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 32 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Output Capacitance Reverse Transfer Capacitance pF SWITCHING CHARACTERISTICS (Notes 3 & 4) Turn-On Delay Time (VDD = 20 Vdc, ID = 5.8 A, VGS = 10 V, RG = 6 W) Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time (VDD = 20 Vdc, ID = 5.8 A, VGS = 4.5 V, RG = 6 W) Rise Time Turn-Off Delay Time Fall Time Gate Charge (VDS = 20 Vdc, VGS = 10 Vdc, ID = 5.8 A) ns ns nC BODY-DRAIN DIODE RATINGS (Note 3) Diode Forward On-Voltage (IS = 1.7 Adc, VGS = 0 V) (IS = 1.7 Adc, VGS = 0 V, TJ = 150°C) Reverse Recovery Time (IS = 1.7 A, VGS = 0 V, dIS/dt = 100 A/ms) Reverse Recovery Stored Charge (IS = 1.7 A, dIS/dt = 100 A/ms, VGS = 0 V) 3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperature. http://onsemi.com 2 nC NTMD6N04R2 20 14 6 V - 10 V 4.0 V 3.8 V 3.4 V 10 8 3.2 V 3.6 V 6 3.0 V 4 2.4 V 2 16 2.8 V 14 12 10 0.5 1 1.5 2 2.5 3 6 3.5 4 4.5 5 TJ = 25°C TJ = -55°C 4 2 0 1.5 5.5 6 2 2.5 3 3.5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0 TJ = 100°C 8 VGS = 2.6 V 0 VDS w 10 V 18 ID, DRAIN CURRENT (A) 12 ID, DRAIN CURRENT (A) TJ = 25°C 4 0.2 VGS = 10 V TJ = 25°C 0.15 0.1 0.05 0 2 3 4 5 6 7 8 9 10 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 3. On-Resistance vs. Gate-to-Source Voltage 1.7 1.6 10000 ID = 5.8 A VGS = 10 V VGS = 0 V TJ = 150°C 1.5 IDSS, LEAKAGE (nA) RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.8 1.4 1.3 1.2 1.1 1 0.9 1000 100 TJ = 100°C 10 0.8 0.7 0.6 -50 1 -25 0 25 50 75 100 125 150 0 TJ, JUNCTION TEMPERATURE (°C) 3 6 9 12 15 18 21 24 27 30 33 36 39 42 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 4. On Resistance Variation with Temperature Figure 5. Drain-to-Source Leakage Current vs. Voltage http://onsemi.com 3 NTMD6N04R2 C, CAPACITANCE (pF) 1800 Ciss 1200 Crss TJ = 25°C Ciss 600 Coss Crss 0 -10 -5 0 5 VGS 10 15 VGS, GATE-TO-SOURCE VOLTAGE (V) 10 VDS = 0 V VGS = 0 V VGS 8 20 VDS 6 15 Q1 10 Q2 2 5 ID = 5.8 A TJ = 25°C 0 20 0 3 6 9 12 15 18 0 21 VDS GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 6. Capacitance Variation Figure 7. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge 4 100 VGS = 20 V Single Pulse TC TA = 25°C VGS = 0 V TJ = 25°C 3.5 ID, DRAIN CURRENT (A) IS, SOURCE CURRENT (A) 25 QT VDS, DRAIN-TO-SOURCE VOLTAGE (V) 2400 3 2.5 2 1.5 1 10 10 ms RDS(on) THERMAL LIMIT PACKAGE LIMIT 0.1 0.5 0 0.4 Mounted on FR4 board using 1 in pad size, with die operating 10s max. 0.01 0.5 0.6 0.7 0.8 0.9 100 ms 1 ms 10 ms 1 0.1 1 dc 10 VSD, SOURCE-TO-DRAIN VOLTAGE (V) VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 8. Diode Forward Voltage vs. Current Figure 9. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 100 NTMD6N04R2 PACKAGE DIMENSIONS SOIC-8 NB CASE 751-07 ISSUE AJ NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. -XA 8 5 S B 0.25 (0.010) M Y M 1 4 K -YG C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE -Z- 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J SOLDERING FOOTPRINT* S INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 1.52 0.060 7.0 0.275 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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