VISHAY SIP32453DB-T2-GE1

SiP32452, SiP32453
Vishay Siliconix
1 V, 55 m Load Switch in MICRO FOOT®
DESCRIPTION
FEATURES
SiP32452 and SiP32453 are n-channel integrated high side
load switches that operate from 0.9 V to 2.5 V input voltage
range.
SiP32452 and SiP32453 has low input logic control threshold
that can interface with low voltage control GPIO directly
without extra level shift or driver. There is a pull down at this
EN logic control pin.
Turn on time is fast in less than 25 µs typically for input
voltage of 1.2 V or higher. SiP32452 has fast turn off delay
time of less than 1 µs while SiP32453 features a guaranteed
turn off delay of greater than 30 µs, typically 90 µs.
Both SiP32452 and SiP32453 are available in compact
wafer level CSP package, MICRO FOOT® 4 bumps
0.8 mm x 0.8 mm with 0.4 mm pitch.
• Halogen-free According to IEC 61249-2-21
Definition
• Low input voltage, 0.9 V to 2.5 V
• Low RON, 55 m typical
• Fast turn on time
• Low logic control with hysteresis
• Reverse current blocking when disabled
• Integrated pull down at EN pin
• 4-bump MICRO FOOT® package
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
•
•
•
•
•
•
•
•
Battery operated devices
Smart phones
GPS and PMP
Computer
Medical and healthcare equipment
Industrial and instrument
Cellular phones and portable media players
Game console
TYPICAL APPLICATION CIRCUIT
VIN
IN
OUT
VOUT
SiP32452, SiP32453
C IN
4.7 µF
C OUT
0.1 µF
EN
EN
GND
GND
GND
Figure 1 - SiP32452 and SiP32453 Typical Application Circuit
Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32452, SiP32453
Vishay Siliconix
ORDERING INFORMATION
Temperature Range
Package
Marking
Part Number
MICRO FOOT®: 4 Bumps
(2 x 2, 0.4 mm Pitch,
208 µm Bump Height)
AB
SiP32452DB-T2-GE1
- 40 °C to 85 °C
AC
SiP32453DB-T2-GE1
Note:
GE1 denotes halogen-free and RoHS compliant
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Supply Input Voltage (VIN)
- 0.3 to 2.75
Enable Input Voltage (VEN)
- 0.3 to 2.75
Output Voltage (VOUT)
- 0.3 to 2.75
Maximum Continuous Switch Current (Imax.)
Unit
V
1.2
Maximum Pulsed Current (IDM) VIN (Pulsed at 1 ms, 10 % Duty Cycle)
A
2
ESD Rating (HBM)
4000
V
Junction Temperature (TJ)
- 40 to 125
°C
Thermal Resistance (JA)a
280
°C/W
Power Dissipation (PD)a
196
mW
Notes:
a. Device mounted with all leads and power pad soldered or welded to PC board.
b. Derate 3.6 mW/°C above TA = 70 °C.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Limit
Unit
Input Voltage Range (VIN)
0.9 to 2.5
V
Operating Temperature Range
- 40 to 85
°C
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Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32452, SiP32453
Vishay Siliconix
SPECIFICATIONS
Parameter
Operating Voltage
Symbol
VIN
c
Test Conditions Unless Specified
VIN = 1 V, TA = - 40 °C to 85 °C
(Typical values are at TA = 25 °C)
Limits
Min.a
Typ.b
Max.a
Unit
0.9
-
2.5
V
VIN = 1.2 V, VEN = VIN, OUT = open
-
10
15
VIN = 2.5 V, VEN = VIN, OUT = open
-
34
60
Quiescent Current
IQ
Off Supply Current
IQ(off)
EN = GND, OUT = open
-
-
1
Off Switch Current
IDS(off)
EN = GND, OUT = 0 V
-
-
30
IRB
VOUT = 2.5 V, VIN = 0.9 V, VEN = 0 V
-
0.001
10
Reverse Blocking Current
On-Resistance
RDS(on)
On-Resistance Temp.-Coefficient
TCRDS
VIN = 1 V, IL = 200 mA, TA = 25 °C
-
56
65
VIN = 1.2 V, IL = 200 mA, TA = 25 °C
-
55
65
VIN = 1.8 V, IL = 200 mA, TA = 25 °C
-
54
65
VIN = 2.5 V, IL = 200 mA, TA = 25 °C
-
54
65
-
3900
-
c
VIL
VIN = 1 V
-
-
0.1
c
EN Input High Voltage
VIH
VIN = 2.5 V
1.5
-
-
EN Input Leakage
IEN
EN Input Low Voltage
Output Turn-On Delay Time
Output Turn-On Rise Time
td(on)
tr
VIN = 2.5 V, VEN = 0 V
-
-
1
VIN = 2.5 V, VEN = 2.5 V
-
10
15
-
0.4
1
Both, VIN = 2.5 V
-
0.05
1
Both, VIN = 1.2 V
10
20
30
5
9.8
20
-
0.25
1
Both, VIN = 1.2 V
Both, VIN = 2.5 V
SiP32452, VIN = 1.2 V
Output Turn-Off Delay Time
td(off)
SiP32452, VIN = 2.5 V
RLOAD = 10 ,
CL = 0.1 µF
TA = 25 °C
-
0.15
1
SiP32453, VIN = 1.2 V
30
98
150
SiP32453, VIN = 2.5 V
30
86
150
µA
m
ppm/°C
V
µA
µs
Notes:
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. For VIN outside this range consult typical EN threshold curve.
Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32452, SiP32453
Vishay Siliconix
PIN CONFIGURATION
1
IN
Index-Bump A1
A
2
OUT
W
A
B
B
A
B
EN
1
IN
2
OUT
GND
GND
Backside
EN
Bumpside
Figure 2 - MICRO FOOT® 2 x 2 Package
PIN DESCRIPTION
Pin Number
Name
A1
IN
A2
OUT
B1
EN
B2
GND
Function
This pin is the n-channel MOSFET drain connection. Bypass to ground through a 4.7 µF capacitor.
This pin is the n-channel MOSFET source connection. Bypass to ground through a 0.1 µF capacitor.
Enable input
Ground connection
45
50
40
45
VIN = 2.5 V
IQ - Quiescent Current (µA)
I Q - Quiescent Current (µA)
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
35
30
25
20
15
40
35
30
25
20
15
VIN = 1.2 V
10
10
5
5
0
0
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
VIN = 1 V
- 40
- 20
0
Figure 3 - Quiescent Current vs. Input Voltage
40
60
80
100
Figure 4 - Quiescent Current vs. Temperature
1000
12
100
10
IQ(OFF) - Off Supply Current (nA)
IQ(OFF) - Off Supply Current (nA)
20
Temperature (°C)
V IN (V)
8
6
4
2
10
VIN = 2.5 V
1
0.1
VIN = 1.2 V
0.01
VIN = 1 V
0.001
0
0.8
1.2
1.6
2.0
2.4
2.8
VIN (V)
Figure 5 - Off Supply Current vs. Input Voltage
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0.0001
- 40
- 20
0
20
40
60
80
100
Temperature (°C)
Figure 6 - Off Supply Current vs. Temperature
Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32452, SiP32453
Vishay Siliconix
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
1000
100 000
VIN = 2.5 V
10 000
IDS(off) - Off Switch Current (nA)
IDS(off) - Off Switch Current (nA)
900
800
700
600
500
400
VIN = 1.2 V
1000
100
VIN = 1 V
10
1
300
0
200
0.8
1.2
1.6
2
2.4
2.8
- 40
- 20
0
VIN (V)
Figure 7 - Off Switch Current vs. Input Voltage
60
80
100
75
VIN = 1.2 V
64
70
62
60
RDS - On-Resistance (mΩ)
RDS - On-Resistance (mΩ)
40
Figure 8 - Off Switch Current vs. Temperature
66
IO = 1.2 A
58
IO = 0.5 A
56
54
1.2
1.6
2.0
2.4
65
60
55
50
40
- 40
50
0.8
IO = 200 mA
45
IO = 0.2 A
52
2.8
- 20
0
20
40
60
80
100
Temperature (°C)
VIN (V)
Figure 9 - RDS(on) vs. VIN
Figure 10 - RDS(on) vs. Temperature
2.0
12
VIN = 2.5 V
VIN = 0.9 V
1.8
10
1.6
1.4
8
I IN (nA)
IEN - EN Current (µA)
20
Temperature (°C)
6
1.2
1.0
0.8
4
0.6
0.4
2
0.2
0
0
0
0.5
1
1.5
VEN (V)
Figure 11 - IEN vs. VEN
Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
2
2.5
0.8
1
1.2
1.4
1.6
1.8 2
VOUT (V)
2.2
2.4
2.6
2.8
Figure 12 - Reverse Blocking Current vs. Output Voltage
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SiP32452, SiP32453
Vishay Siliconix
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
1.6
100
VOUT = 2.5 V
1.4
VIN = 0.9 V
EN Threshold Voltage (V)
80
I IN (nA)
60
40
1.2
1.0
VIH
0.8
VIL
0.6
0.4
20
0.2
0
- 40
0.0
- 20
0
20
40
60
80
0.8 1.0
100
1.2
1.4
Temperature (°C)
1.8
2.0
2.2
2.4
2.6
2.8
VIN (V)
Figure 13 - Reverse Blocking Current vs. Temperature
Figure 14 - EN Threshold Voltage vs. Input Voltage
0.100
14
0.090
VIN = 2.5 V
CL = 0.1 µF
RL = 10 Ω
13
tr - Rise Switching Time (µs)
0.095
td(on) - Turn-On Delay Time (µs)
1.6
0.085
0.080
0.075
0.070
0.065
0.060
11
10
9
8
7
6
0.055
0.050
- 40
12
VIN = 2.5 V
CL = 0.1 µF
RL = 10 Ω
5
- 20
0
20
40
60
80
100
- 40
- 20
0
Figure 15 - Turn-On Delay Time vs. Temperature
td(off) - Turn Off Delay Time (µs)
td(off) - Turn Off Delay Time (µs)
60
80
100
120
SiP32452
VIN = 2.5 V
CL = 0.1 µF
RL = 10 Ω
0.20
0.15
0.10
0.05
0.00
- 40
40
Figure 16 - Rise Time vs. Temperature
0.30
0.25
20
Temperature (°C)
Temperature (°C)
110
SiP32453
VIN = 2.5 V
CL = 0.1 µF
RL = 10 Ω
100
90
80
70
- 20
0
20
40
60
80
100
Temperature (°C)
Figure 17 - Turn-Off Delay Time vs. Temperature
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60
- 40
- 20
0
20
40
60
80
100
Temperature (°C)
Figure 18 - Turn-Off Delay Time vs. Temperature
Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32452, SiP32453
Vishay Siliconix
TYPICAL WAVEFORMS
Figure 19 - Turn-On Time (VIN = 1.2 V)
Figure 20 - Turn-On Time (VIN = 2.5 V)
Figure 21 - SiP32452 Turn-Off Time (VIN = 1.2 V)
Figure 22 - SiP32452 Turn-Off Time (VIN = 2.5 V)
Figure 23 - SiP32453 Turn-Off Time (VIN = 1.2 V)
Figure 24 - SiP32453 Turn-Off Time (VIN = 2.5 V)
BLOCK DIAGRAM
IN
EN
OUT
Control
Logic
Charge
Pump
GND
Figure 25 - Functional Block Diagram
Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
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SiP32452, SiP32453
Vishay Siliconix
DETAILED DESCRIPTION
SiP32452 and SiP32453 are n-channel power MOSFET
designed as high side load switch. Once enable the device
charge pumps the gate of the power MOSFET to a constant
gate to source voltage for fast turn on time. The mostly
constant gate to source voltage keeps the on resistance low
through out the input voltage range. When disable, the
SiP32452 pulls the gate of the output n-channel low right
away for a fast turn off delay while there is a build-in turn off
delay for the SiP32453. The turn off delay for the SiP32453
is guaranteed to be at least 30 µs. Because the body of the
output n-channel is always connected to GND, it prevents
the current from going back to the input in case the output
voltage is higher than the output.
APPLICATION INFORMATION
Input Capacitor
While a bypass capacitor on the input is not required,
a 4.7 µF or larger capacitor for CIN is recommended in almost
all applications. The bypass capacitor should be placed as
physically close as possible to the input pin to be effective in
minimizing transients on the input. Ceramic capacitors are
recommended over tantalum because of their ability to
withstand input current surges from low impedance sources
such as batteries in portable devices.
Output Capacitor
A 0.1 µF capacitor across VOUT and GND is recommended
to insure proper slew operation. There is inrush current
through the output MOSFET and the magnitude of the inrush
current depends on the output capacitor, the bigger the COUT
the higher the inrush current. There are no ESR or capacitor
type requirement.
Enable
The EN pin is compatible with CMOS logic voltage levels. It
requires at least 0.1 V or below to fully shut down the device
and 1.5 V or above to fully turn on the device.
P (max.)
=
T J (max.) - T A
θJ- A
=
125 - TA
280
It then follows that, assuming an ambient temperature of
70 °C, the maximum power dissipation will be limited to about
196 mW.
So long as the load current is below the 1.2 A limit, the
maximum continuous switch current becomes a function two
things: the package power dissipation and the RDS(ON) at the
ambient temperature.
As an example let us calculate the worst case maximum load
current at TA = 70 °C. The worst case RDS(ON) at 25 °C is
65 m. The RDS(ON) at 70 °C can be extrapolated from this
data using the following formula:
RDS(ON) (at 70 °C) = RDS(ON) (at 25 °C) x (1 + TC x T)
Where TC is 3900 ppm/°C. Continuing with the calculation
we have
RDS(ON) (at 70 °C) = 65 m x (1 + 0.0039 x (70 °C - 25 °C))
= 76.4 m
The maximum current limit is then determined by
P (max.)
I LOAD (max.) <
R DS(ON )
which in case is 1.6 A. Under the stated input voltage
condition, if the 1.6 A current limit is exceeded the internal die
temperature will rise and eventually, possibly damage the
device.
To avoid possible permanent damage to the device and keep
a reasonable design margin, it is recommended to operate
the device maximum up to 1.2 A only as listed in the
Absolute Maximum Ratings table.
Protection Against Reverse Voltage Condition
Both the SiP32452 and SiP32453 can block the output
current from going to the input in case where the output
voltage is higher than the input voltage when the main switch
is off.
Thermal Considerations
These devices are designed to maintain a constant output
load current. Due to physical limitations of the layout and
assembly of the device the maximum switch current is 1.2 A
as stated in the Absolute Maximum Ratings table. However,
another limiting characteristic for the safe operating load
current is the thermal power dissipation of the package. To
obtain the highest power dissipation (and a thermal
resistance of 280 °C/W) the device should be connected to a
heat sink on the printed circuit board.
The maximum power dissipation in any application is
dependant on the maximum junction temperature,
TJ(max.) = 125 °C, the junction-to-ambient thermal resistance,
J-A = 280 °C/W, and the ambient temperature, TA, which
may be formulaically expressed as:
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Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32452, SiP32453
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT®: 4 Bumps (2 x 2, 0.4 mm Pitch, 208 µm Bump Height)
Mark on backside of die
1
A
0.4
1
2
W
A
4xØb
B
A
e
4 x Ø 0.150 to 0.200
Solder mask dia. - Pad diameter + 0.1
2
D
Index-Bump A1
B
B
0.4
e
D
Note 3
A1
A
Recommended Land Pattern
All dimensions in millimeters
Dimension
A
MILLIMETERS
Nom.
MAX.
Min.
Nom.
MAX.
0.515
0.530
0.545
0.0202
0.0208
0.0214
0.270
0.0098
0.208
0.250
e
D
INCHES
Min.
A1
b
Bump Note 2
0.260
0.0081
0.400
0.720
0.760
0.0102
0.0106
0.0157
0.800
0.0182
0.0193
0.0203
Notes:
1. Laser mark on the backside surface of die.
2. Bumps are SAC396.
3. 0.050 max. coplanarity.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?63315
Document Number: 63315
S11-1695-Rev. B, 22-Aug-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Document Number: 91000
Revision: 11-Mar-11
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