FDMC86570L N-Channel Shielded Gate PowerTrench® MOSFET 60 V, 56 A, 4.3 mΩ Features Shielded Gate MOSFET Technology General Description Max rDS(on) = 4.3 mΩ at VGS = 10 V, ID = 18 A Termination is Lead-free This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. RoHS Compliant Application Max rDS(on) = 6.5 mΩ at VGS = 4.5 V, ID = 15 A High performance technology for extremely low rDS(on) DC-DC Conversion Pin 1 Pin 1 S D D D Top S S S D S D S D G D G D Bottom Power 33 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID -Continuous TC = 25 °C -Continuous TA = 25 °C -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C Ratings 60 Units V ±20 V 56 (Note 1a) 18 (Note 4) 200 (Note 3) 253 54 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to +150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient (Note 1) 2.3 (Note 1a) 53 °C/W Package Marking and Ordering Information Device Marking FDMC86570L Device FDMC86570L ©2013 Fairchild Semiconductor Corporation FDMC86570L Rev. C Package Power33 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC86570L N-Channel Shielded Gate PowerTrench® MOSFET May 2013 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 3.0 V 60 V 30 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C -7 VGS = 10 V, ID = 18 A 3.1 rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 15 A 4.7 6.5 VGS = 10 V, ID = 18 A, TJ = 125 °C 5.0 6.9 VDD = 5 V, ID = 18 A 75 gFS Forward Transconductance 1.0 1.8 mV/°C 4.3 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 30 V, VGS = 0 V, f = 1 MHz 0.1 4790 6705 pF 821 1150 pF 19 30 pF 0.9 2.7 Ω Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time VDD = 30 V, ID = 18 A, VGS = 10 V, RGEN = 6 Ω 19 34 ns 6.2 12 ns 38 61 ns 3.9 10 ns nC Qg(TOT) Total Gate Charge VGS = 0 V to 10 V 63 88 Qg(TOT) Total Gate Charge 29 41 Qgs Gate to Source Charge VGS = 0 V to 4.5 V VDD = 30 V, ID = 18 A Qgd Gate to Drain “Miller” Charge nC 14 nC 6.3 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 18 A (Note 2) 0.8 1.3 VGS = 0 V, IS = 1.9 A (Note 2) 0.7 1.2 V 43 69 ns 26 42 nC IF = 18 A, di/dt = 100 A/μs V Notes: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b. 125 °C/W when mounted on a minimum pad of 2 oz copper a. 53 °C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 253 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 13 A, VDD = 60 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 43 A. 4. Pulsed Id limited by junction temperature, td<=100μS, please refer to SOA curve for more details. ©2013 Fairchild Semiconductor Corporation FDMC86570L Rev. C 2 www.fairchildsemi.com FDMC86570L N-Channel Shielded Gate PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 200 VGS = 6 V ID, DRAIN CURRENT (A) 160 VGS = 5 V 120 VGS = 4.5 V 80 VGS = 4 V 40 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 3.5 V 0 0 1 2 3 4 5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V 5 VGS = 3.5 V 4 VGS = 4 V 3 2 1 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 VDS, DRAIN TO SOURCE VOLTAGE (V) 80 120 160 200 20 ID = 18 A VGS = 10 V rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.6 -75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 40 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.8 16 8 4 TJ = 25 oC IS, REVERSE DRAIN CURRENT (A) VDS = 5 V 120 TJ = 150 oC oC 40 TJ = -55 oC 2 3 4 2 4 6 8 10 Figure 4. On-Resistance vs Gate to Source Voltage 160 TJ = 25 TJ = 125 oC VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 80 ID = 18 A 12 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 200 1 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 -50 Figure 3. Normalized On- Resistance vs Junction Temperature ID, DRAIN CURRENT (A) 0 VGS = 6 V VGS = 10 V ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics 0 VGS = 5 V VGS = 4.5 V 200 100 VGS = 0 V 10 TJ = 150 oC 1 TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 5 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2013 Fairchild Semiconductor Corporation FDMC86570L Rev. C 3 1.2 www.fairchildsemi.com FDMC86570L N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 10000 ID = 18 A Ciss VDD = 20 V 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 30 V 6 VDD = 40 V 4 1000 Coss 100 Crss 10 2 f = 1 MHz VGS = 0 V 0 0 14 28 42 56 1 0.1 70 1 10 60 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 100 50 o TJ = 100 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) RθJC = 2.3 C/W TJ = 25 oC oC 10 TJ = 125 1 0.001 0.01 0.1 oC 1 10 80 60 VGS = 10 V 40 20 0 25 100 400 50 125 150 Figure 10. Maximum Continuous Drain Current vs Case Temperature 300 100 10000 P(PK), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 100 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 100 μs 10 1 ms 10 ms 100 ms 1s 10 s DC 1 0.01 75 o tAV, TIME IN AVALANCHE (ms) 0.1 VGS = 4.5 V Limited by Package THIS AREA IS LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED RθJA = 125 oC/W o TA = 25 C 0.001 0.01 0.1 CURVE BENT TO MEASURED DATA 1 10 100 300 VDS, DRAIN to SOURCE VOLTAGE (V) 100 10 SINGLE PULSE RθJA = 125 oC/W 1 TA = 25 oC 0.1 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 11. Forward Bias Safe Operating Area ©2013 Fairchild Semiconductor Corporation FDMC86570L Rev. C 1000 Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDMC86570L N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted NORMALIZED THERMAL IMPEDANCE, ZθJA 2 1 0.1 0.01 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.001 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 125 C/W 0.0001 -4 10 -3 10 -2 10 -1 10 1 10 100 100 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2013 Fairchild Semiconductor Corporation FDMC86570L Rev. C 5 www.fairchildsemi.com FDMC86570L N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted FDMC86570L N-Channel Shielded Gate PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2013 Fairchild Semiconductor Corporation FDMC86570L Rev. C 6 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I64 ©2013 Fairchild Semiconductor Corporation FDMC86570L Rev. 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