FDMC86102L - Fairchild Semiconductor

FDMC86102L
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 18 A, 23 mΩ
Features
General Description
„ Shielded Gate MOSFET Technology
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced PowerTrench® process that
incorporates Shielded Gate technology. This process has been
optimized for the on-state resistance and yet maintain superior
switching performance.
„ Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 7 A
„ Max rDS(on) = 34 mΩ at VGS = 4.5 V, ID = 5.5 A
„ Low Profile - 1 mm max in Power 33
„ RoHS Compliant
Application
„ DC - DC Conversion
Top
Bottom
Pin 1
S
D
D
D
S
S
G
S
D
S
D
S
D
G
D
D
MLP 3.3x3.3
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
TC = 25 °C
-Continuous
TA = 25 °C
ID
TJ, TSTG
±20
V
(Note 1a)
7
A
30
Single Pulse Avalanche Energy
PD
Units
V
18
-Pulsed
EAS
Ratings
100
(Note 3)
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
63
41
(Note 1a)
Operating and Storage Junction Temperature Range
2.3
-55 to +150
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
3
(Note 1a)
53
°C/W
Package Marking and Ordering Information
Device Marking
FDMC86102L
Device
FDMC86102L
©2010 Fairchild Semiconductor Corporation
FDMC86102L Rev.C4
Package
Power 33
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMC86102L N-Channel Shielded Gate PowerTrench® MOSFET
June 2014
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 80 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3
V
100
V
71
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 7 A
18.9
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 5.5 A
24.9
34
VGS = 10 V, ID = 7 A, TJ = 125 °C
31.9
39
gFS
Forward Transconductance
1
1.8
-6
mV/°C
23
mΩ
VDS = 5 V, ID = 7 A
26
S
VDS = 50 V, VGS = 0 V,
f = 1 MHz
999
1330
pF
178
240
pF
7.6
15
pF
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Ω
0.5
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
Total Gate Charge
Qg(TOT)
Total Gate Charge
Qgs
Total Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 50 V, ID = 7 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V
VGS = 0 V to 4.5 V VDD = 50 V,
ID = 7 A
7.7
16
2.2
10
ns
ns
19
34
ns
2.4
10
ns
15
22
nC
7.3
11
nC
2.7
nC
2.3
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 7 A
(Note 2)
0.81
1.3
VGS = 0 V, IS = 2 A
(Note 2)
0.74
1.2
IF = 7 A, di/dt = 100 A/μs
V
45
72
ns
45
72
nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b) 125 °C/W when mounted on a
minimum pad of 2 oz copper
a) 53 °C/W when mounted on
a 1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25 °C; N-ch: L = 1 mH, IAS = 11.3 A, VDD = 90 V, VGS = 10 V.
©2010 Fairchild Semiconductor Corporation
FDMC86102L Rev.C4
2
www.fairchildsemi.com
FDMC86102L N-Channel Shielded Gate PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
5
VGS = 10 V
25
VGS = 4.5 V
VGS = 4 V
20
VGS = 3.5 V
15
VGS = 3 V
10
5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
30
4
VGS = 3 V
3
VGS = 3.5 V
2
1
0
5
10
15
20
25
30
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure 2. Normalized On-Resistance
vs. Drain Current and Gate Voltage
120
ID = 7 A
VGS = 10 V
1.8
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
0.6
-75
SOURCE ON-RESISTANCE (mΩ)
2.0
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
0
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID = 7 A
60
TJ = 125 oC
30
TJ = 25 oC
0
-50
-25
0
25
50
75
2
100 125 150
IS, REVERSE DRAIN CURRENT (A)
VDS = 5 V
TJ = 150 oC
15
TJ = 25 oC
10
TJ = -55 oC
5
1.5
2.0
2.5
8
10
30
20
0
1.0
6
Figure 4. On-Resistance vs. Gate to
Source Voltage
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
25
4
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
30
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
90
TJ, JUNCTION TEMPERATURE (oC)
ID, DRAIN CURRENT (A)
VGS = 4.5 V
VGS = 4 V
3.0
3.5
10
1
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
4.0
VGS = 0 V
0.2
0.4
0.6
0.8
1.0
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
©2010 Fairchild Semiconductor Corporation
FDMC86102L Rev.C4
3
1.2
www.fairchildsemi.com
FDMC86102L N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2000
1000
ID = 7 A
Ciss
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 25 V
6
VDD = 50 V
4
VDD = 75 V
Coss
100
10
Crss
2
f = 1 MHz
VGS = 0 V
0
0
4
8
12
1
0.1
16
1
Figure 7. Gate Charge Characteristics
30
10
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
100
Figure 8. Capacitance vs. Drain
to Source Voltage
30
TJ = 25 oC
TJ = 100 oC
TJ = 125 oC
25
20
VGS = 10 V
15
Limited by package
VGS = 4.5 V
10
5
o
RθJC = 3 C/W
1
0.01
0.1
1
10
0
25
30
50
125
150
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
40
P(PK), PEAK TRANSIENT POWER (W)
1000
10
100 us
1 ms
1
THIS AREA IS
LIMITED BY rDS(on)
10 ms
SINGLE PULSE
TJ = MAX RATED
100 ms
RθJA = 125 oC/W
1s
10s
DC
TA = 25 oC
0.01
0.01
100
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
0.1
75
o
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
0.1
1
10
100
500
TA = 25 oC
100
10
1
0.5 -4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 12. Single Pulse Maximum
Power Dissipation
Figure 11. Forward Bias Safe
Operating Area
©2010 Fairchild Semiconductor Corporation
FDMC86102L Rev.C4
SINGLE PULSE
RθJA = 125 oC/W
4
www.fairchildsemi.com
FDMC86102L N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 125 C/W
0.001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2010 Fairchild Semiconductor Corporation
FDMC86102L Rev.C4
5
www.fairchildsemi.com
FDMC86102L N-Channel Shielded Gate PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMC86102L N-Channel Shielded Gate PowerTrench® MOSFET
Dimensional Outline and Pad Layout
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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEU-C08
©2010 Fairchild Semiconductor Corporation
FDMC86102L Rev.C4
6
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
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Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I68
©2010 Fairchild Semiconductor Corporation
FDMC86102L Rev.C4
7
www.fairchildsemi.com
FDMC86102L N-Channel Shielded Gate PowerTrench® MOSFET
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