KERSEMI AUIRFR4105Z

AUIRFR4105Z
AUIRFU4105Z
AUTOMOTIVE GRADE
Features
●
●
●
●
●
●
●
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
V(BR)DSS
D
55V
RDS(on) max.
G
24.5mΩ
ID
S
Description
30A
D
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of this
design are a 175°C junction operating temperature,
fast switching speed and improved repetitive avalanche rating . These features combine to make this
design an extremely efficient and reliable device for
use in Automotive applications and a wide variety of
other applications.
S
D
G
G
D-Pak
AUIRFR4105Z
S
I-Pak
AUIRFU4105Z
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in
the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (T A) is 25°C, unless otherwise specified.
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
EAS (tested )
IAR
EAR
TJ
TSTG
c
h
g
Junction-to-Case j
Parameter
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
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i
d
Units
30
21
120
48
c
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case )
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
RθJC
RθJA
RθJA
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
A
W
0.32
± 20
29
46
See Fig.12a, 12b, 15, 16
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300
10 lbf in (1.1N m)
y
y
Typ.
Max.
Units
–––
–––
–––
3.12
50
110
°C/W
1
07/23/2010
AUIRFR/U4105Z
Parameter
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
VGS(th)
gfs
IDSS
IGSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
55
–––
–––
2.0
16
–––
–––
–––
–––
–––
0.053
19
–––
–––
–––
–––
–––
–––
–––
–––
24.5
4.0
–––
20
250
200
-200
Conditions
V VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 18A
V VDS = VGS, ID = 250µA
S VDS = 15V, ID = 18A
µA VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
e
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
–––
–––
–––
–––
–––
–––
–––
–––
18
5.3
7.0
10
40
26
24
4.5
27
–––
–––
–––
–––
–––
–––
–––
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
740
140
74
450
110
180
–––
–––
–––
–––
–––
–––
S
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
nC
ns
nH
pF
ID = 18A
VDS = 44V
VGS = 10V
VDD = 28V
ID = 18A
RG = 24.5 Ω
VGS = 10V
Between lead,
e
e
D
G
f
Diode Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
30
ISM
(Body Diode)
Pulsed Source Current
–––
–––
120
VSD
trr
Qrr
ton
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
19
14
1.3
29
21
2
c
Conditions
MOSFET symbol
A
V
ns
nC
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 18A, VGS = 0V
TJ = 25°C, IF = 18A, VDD = 28V
di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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AUIRFR/U4105Z
Automotive
(per AEC-Q101)
Qualification Level
††
Comments: This part number(s) passed Automotive qualification. IR’s
Industrial and Consumer qualification level is granted by extension of the
higher Automotive level.
D-PAK
MSL1
I-PAK
Machine Model
MSL1
Class M2 (200V)
Human Body Model
Class H1A (500V)
Charged Device
Model
Class C5 (1125V)
Moisture Sensitivity Level
AEC-Q101-002
ESD
AEC-Q101-001
RoHS Compliant
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AEC-Q101-005
Yes
3
AUIRFR/U4105Z
1000
1000
VGS
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
10
1
VGS
TOP
TOP
4.5V
60µs PULSE WIDTH
Tj = 25°C
0.1
100
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
4.5V
60µs PULSE WIDTH
Tj = 175°C
1
0.1
0
1
10
100
100
0.1
0
VDS, Drain-to-Source Voltage (V)
100
100
Fig 2. Typical Output Characteristics
30
Gfs, Forward Transconductance (S)
1000
ID, Drain-to-Source Current (Α)
10
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
T J = 175°C
10
T J = 25°C
1
VDS = 25V
60µs PULSE WIDTH
0
4
5
6
7
8
9
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
1
10
T J = 175°C
25
20
15
T J = 25°C
10
5
VDS = 8.0V
380µs PULSE WIDTH
0
0
10
20
30
40
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
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ance
AUIRFR/U4105Z
1200
20
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
1000
C, Capacitance (pF)
C oss = C ds + C gd
800
Ciss
600
400
Coss
200
ID= 18A
VDS= 44V
VDS= 28V
VDS= 11V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
Crss
0
0
1
10
0
100
10
15
20
25
30
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
5
100.0
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
T J = 175°C
10.0
T J = 25°C
1.0
10
100µsec
1
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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2.0
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
1
10msec
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
5
AUIRFR/U4105Z
2.5
30
RDS(on) , Drain-to-Source On Resistance
(Normalized)
25
ID , Drain Current (A)
ID = 18A
VGS = 10V
20
15
10
5
2.0
1.5
1.0
0.5
0
25
50
75
100
125
150
-60 -40 -20
175
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
Thermal Response ( Z thJC )
D = 0.50
1
0.20
0.10
0.05
0.1
0.02
0.01
0.01
τJ
SINGLE PULSE
( THERMAL RESPONSE )
R1
R1
τJ
τ1
τ1
R2
R2
τ2
τ2
Ci= τi/Ri
Ci i/Ri
R3
R3
τ3
τC
τ
τ3
Ri (°C/W) τi (sec)
1.100
0.000174
1.601
0.000552
0.418
0.007193
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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AUIRFR/U4105Z
120
DRIVER
L
VDS
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
15V
ID
2.0A
3.5A
BOTTOM 18A
TOP
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGS
QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
4.5
4.0
3.5
ID = 250µA
3.0
2.5
2.0
-75 -50 -25
VGS
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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Fig 14. Threshold Voltage Vs. Temperature
7
AUIRFR/U4105Z
100
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
30
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 18A
25
20
15
10
5
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
8
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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AUIRFR/U4105Z
D.U.T
Driver Gate Drive
ƒ
+
‚
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
„
-
D=
Period
P.W.
+
V DD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
*
ISD
VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
V GS
RG
RD
D.U.T.
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
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9
AUIRFR/U4105Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak Part Marking Information
Part Number
AUFR4105Z
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
XX
Lot Code
10
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AUIRFR/U4105Z
I-Pak (TO-251AA) Package Outline
I-Pak Part Marking Information
Part Number
AUFU4105Z
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
XX
Lot Code
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11
AUIRFR/U4105Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
… Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11).
avalanche performance.
‚ Limited by TJmax, starting TJ = 25°C, L = 0.18mH † This value determined from sample failure population,
RG = 25Ω, IAS = 18A, VGS =10V. Part not
starting TJ = 25°C, L = 0.18mH, RG = 25Ω, IAS = 18A, VGS =10V.
recommended for use above this value.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
application note #AN-994.
„ Coss eff. is a fixed capacitance that gives the
ˆ Rθ is measured at TJ approximately 90°C.
same charging time as Coss while VDS is rising
from 0 to 80% VDSS .
 Repetitive rating; pulse width limited by
12
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