IRF4410 Series SEMICONDUCTOR RoHS RoHS Nell High Power Products N-Channel Power MOSFET (97A, 100Volts) DESCRIPTION The Nell IRF4410 is a three-terminal silicon device with current conduction capability of 97A, fast switching speed, low on-state resistance, breakdown voltage rating of 100V ,and max. threshold voltage of 4 volts. They are designed for use in applications. such as switched mode power supplies, DC to DC converters, PWM motor controls, bridge circuits, UPS and general purpose switching applications . D D G G S D FEATURES S TO-263(D2PAK) (IRF4410H) TO-220AB (IRF4410A) RDS(ON) = 9.0mΩ @ VGS = 10V Ultra low gate charge(120nC max.) Low reverse transfer capacitance (C RSS = 170pF typical) Fast switching capability 100% avalanche energy specified D (Drain) Improved dv/dt capability 175°C operation temperature PRODUCT SUMMARY ID (A) G (Gate) 97 VDSS (V) 100 RDS(ON) (mΩ) 9.0 @ V GS = 10V QG(nC) max. 120 S (Source) ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise specified) SYMBOL TEST CONDITIONS PARAMETER VALUE VDSS Drain to Source voltage T J =25°C to 150°C 100 V DGR Drain to Gate voltage R GS =20KΩ 100 V GS ID Gate to Source voltage UNIT V ±20 T C =25°C 97 T C =100°C 69 Continuous Drain Current A I DM Pulsed Drain current(Note 1) I AR Avalanche current(Note 1) E AR Repetitive avalanche energy(Note 1) I AR =58A, R GS =50Ω, V GS =10V 105 E AS Single pulse avalanche energy(Note 2) I AS =58A, L=0.143mH 242 dv/dt Peak diode recovery dv/dt(Note 3) 390 58 mJ 16 V /ns 230 W PD Total power dissipation TJ Operation junction temperature -55 to 175 Storage temperature -55 to 175 T STG TL T C =25°C Maximum soldering temperature, for 10 seconds Mounting torque, #6-32 or M3 screw 300 10 (1.1) Note: 1. Repetitive rating: pulse width limited by junction temperature. . 2 . I AS = 58 A, V DD = 50V, L = 0.143mH, R GS = 25Ω, starting T J =25°C. 3 . I SD ≤ 58 A, di/dt ≤ 610 A/µs, V DD ≤ V (BR)DSS , starting T J≤175 °C. www.nellsemi.com 1.6mm from case Page 1 of 9 ºC lbf . in (N . m) RoHS RoHS IRF4410 Series SEMICONDUCTOR Nell High Power Products THERMAL RESISTANCE SYMBOL PARAMETER Rth(j-c) Thermal resistance, junction to case Rth(j-a) Thermal resistance, junction to ambient Min. Typ. UNIT Max. 0.65 TO-220AB 62 TO-263(D 2 PAK) 40 ºC/W ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified) SYMBOL V(BR)DSS ▲V (BR)DSS/▲T J I DSS PARAMETER TEST CONDITIONS Drain to source breakdown voltage I D = 250µA , V GS = 0V Breakdown voltage temperature coefficient I D = 5mA, V DS =V GS Drain to source leakage current Min. Typ. Max. 100 V V/ºC 0.12 V DS =100V, V GS =0V T C = 25°C 10 V DS =80V, V GS =0V T C =125°C 100 μA Gate to source forward leakage current V GS = 20V, V DS = 0V 100 Gate to source reverse leakage current V GS = -20V, V DS = 0V -100 R DS(ON) Static drain to source on-state resistance I D = 58A, V GS = 10V V GS(TH) Gate threshold voltage V GS =V DS , I D =150μA RG Internal gate resistance g fs Forward transconductance I GSS nA C ISS Input capacitance C OSS Output capacitance C RSS Reverse transfer capacitance t d(ON) Turn-on delay time tr t d(OFF) tf QG UNIT Rise time Turn-off delay time 7.2 2.0 9.0 mΩ 4.0 V 0.7 I D =58A, V DS =10V Ω 140 S 4820 V DS = 50V, V GS = 0V, f =1MHz pF 340 170 16 52 V DD = 65V, V GS = 10V, l D = 58A, R GS = 2.7Ω (Note 1 , 2 ) ns 43 Fall time 57 Total gate charge Q GS Gate to source charge Q GD Gate to drain charge (Miller charge) 83 V DD = 50V, V GS = 10V, I D = 58A (Note 1, 2) 120 19 nC 27 SOURCE TO DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25°C unless otherwise specified) SYMBOL VSD Is (Is D ) PARAMETER TEST CONDITIONS Min. Typ. Max. UNIT V Diode forward voltage I SD = 58A, V GS = 0V 1.3 Continuous source to drain current Integral reverse P-N junction diode in the MOSFET 97 D (Drain) A I SM Pulsed source current 390 G (Gate) S (Source) t rr Reverse recovery time Q rr Reverse recovery charge I SD = 58A, V R = 85V, dI F /dt = 100A/µs t ON Forward turn-on time Intrinsic turn-on time is negligible (turn-on is domonated by LS+LD) Note: 1. Pulse test: Pulse width ≤ 400μs, duty cycle ≤ 2% . 2. Essentially independent of operating temperature. www.nellsemi.com Page 2 of 9 38 60 ns 53 80 nC IRF4410 Series SEMICONDUCTOR RoHS RoHS Nell High Power Products ORDERING INFORMATION SCHEME 4410 IRF A MOSFET series N-Channel, IR series Current & Voltage rating, lD & VDS 97A / 100V Package type A = TO-220AB H = TO-263 (D2PAK) Fig.1 Typical output characteristics 10 3 V GS Top: 15V 10V 8V 6V 5.5V 5V 4.8V Bottorm: 4.5V 10 2 Drain-to-Source current,l D (A) Drain-to-Source current,l D (A) 10 3 Fig.2 Typical output characteristics 4.5V 10 1 ≤60µs pulse width T J =25°C 1 0.1 10 0 1 10 2 4.5V 10 1 ≤60µs pulse width T J =175°C 1 10 2 0.1 Drain-to-Source voltage, V DS (V) Drain-to-Source on-resistance, R DS(on) (Normalized) Drain-to-Source current,l D (A) V DS =50V ≤60µs pulse width 10 2 T J =175°C T J =25°C 1 0.1 3 4 5 6 7 Gate-to-Source voltage, V GS (V) www.nellsemi.com 10 0 10 2 Fig.4 Normalized on-resistance vs. Junction temperature 10 3 2 1 Drain-to-Source voltage, V DS (V) Fig.3 Typical transfer characteristics 10 1 V GS Top: 15V 10V 8V 6V 5.5V 5V 4.8V Bottorm: 4.5V 2.5 2.0 1.5 1.0 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 Junction Temperature, T J (°C) Page 3 of 9 IRF4410 Series SEMICONDUCTOR RoHS RoHS Nell High Power Products Fig.5 Typical capacitance vs. Drain-to-Source voltage Fig.6 Typical gate charge vs. Gate-to-Source voltage 12 V GS = 0V, f=1MHz C iss = C gs +C gd ( C ds = shorted ) C rss = C gd C oss = C ds +C gd 10 4 Gate-Source voltage,V GS (V) Capacitance, C (pF) 10 5 C iss C oss 10 3 C rss 10 2 10 1 V DS = 80V 10 V DS = 40V V DS = 20V 8 6 4 2 0 100 0 Fig.7 Typical Source-Drain diode forward voltage 10 3 Drain-to-Source current, l D (A) 10 2 T J =175°C 10 1 T J =25°C 1 V GS = 0V 0.1 0.0 0.5 1.0 1.5 2.0 60 80 100 Fig.8 Maximum safe operating area 10 3 Reverse drain current, l SD (A) 40 Total gate charge, Q G (nC) Drain-to-Source voltage, V DS (V) Operation in this area limited by R DS (on) 100µsec 1msec 10 2 10msec DC 10 1 T C = 25°C T J = 175°C Single Pulse 1 2.5 0 1 10 100 Source-to-Drain voltage, V SD (V) Drain-to-Source voltage, V DS (V) Fig.9 Maximum drain current vs. Case temperature Fig.10 Drain-to-Source breakdown voltage vs. Junction temperature Drain-to-Source breakdown voltage , V (BR)DSS (V) 100 Drain Current, l D (A) 20 80 60 40 20 50 75 100 125 150 Case temperature, T C ( ° C) www.nellsemi.com I D = 5mA 120 115 110 105 100 95 90 -60 -40 -20 0 0 25 125 20 40 60 80 100 120 140 160 180 Junction temperature, T J ( ° C) Page 4 of 9 IRF4410 Series SEMICONDUCTOR RoHS RoHS Nell High Power Products Fig.11 Typical C OSS stored energy Fig.12 Maximum avalanche energy vs. Drain current 1000 1.8 900 Single pulse avalanche energy , E AS (mJ) 2.0 1.6 Energy ( µ J) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -10 800 700 I D = 6.4A 600 500 I D = 9.4A 400 300 I D = 58A 200 100 0 0 25 10 20 30 40 50 60 70 80 90 100 75 50 Drain-to-Source voltage, V DS (V) 100 125 150 175 Starting T J , Junction temperature(°C) Fig.13 Maximum effective transient thermal lmpedance, Junction-to-Case Thermal response, Rth(j-c) (°C/W) 1 D = 0.5 0.2 0.1 0.1 R1 0.05 τJ 0.02 0.01 τ2 τ1 0.01 R2 τC Ri (°C/W) τi (sec) 0.237 0.000178 0.413 0.003772 τ Ci = i/Ri Notes: 1. Duty factor, D = t1/ t2 2. Peak Tj = PDM * Rth(j-c) +TC Single pulse (Thermal response) 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 Rectangular pulse duration (sec.), t 1 Fig.14 Typical avalanche current vs. Pulse width 100 Allowed avalanche current vs avalanche pulse width, t av, assuming ▲Tj=150°C and Duty Cycle = Single Pulse Tstart = 25 ° C (Single Pulse) Avalanche current (A) 0.01 10 0.05 0.10 1 Allowed avalanche current vs avalanche 0.1 10 -6 pulse width, t av, assuming ▲T j =25 ° C and Tstart=150 ° C 10 -5 10 -4 10 -3 t av (sec.) www.nellsemi.com Page 5 of 9 10 -2 10 -1 RoHS RoHS IRF4410 Series SEMICONDUCTOR Nell High Power Products Fig.15 Maximum avalanche energy vs. Junction temperature Avalanche energy, E AR (mJ) 150 Notes on Repetitive Avalanche Curves. Fig. 14, 15: TOP BOTTOM l D = 58A Single Pulse 1.0% Duty Cycle 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as T jmax is not exceeded. 100 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4.P D(ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 50 6.l av = Allowable avalanche current. 7. ▲T = Allowable rise in junction temperature, not to exceed T max (assumed as 25°C in Fig.14, 15). t av = Average time in avalanche. 0 25 75 50 100 125 150 175 D = Duty cycle in avalanche = t av · f R th(j-c) (D, t av ) = Transient thermal resistance, see fig.13 Starting T J , junction temperature (°C) P D(ave) = ½ (1.3·BV·l av ) = ▲T/R th(j-c) l av = 2▲T/[1.3· BV·R th( j-c ) ] E AS(AR) = P D(ave) ·t av Fig.16 Threshold voltage vs. Junction Temperature Fig.17 Typical recovery current vs. di f /dt 20 I F = 39A V R = 85V 4.0 15 3.5 l RRM (A) Gate threshold voltage, V GS(th) (V) 4.5 3.0 2.5 T J =125°C 10 T J =25°C I D = 150μA I D = 250μA I D = 1.0mA I D = 1.0A 2.0 1.5 1.0 -75 -50 -25 5 0 0 25 50 100 75 100 125 150 175 200 200 Junction temperature, T J (°C) 400 500 600 700 di f /dt (A/μs) Fig.18 Typical recovery current vs. di f /dt Fig.19 Typical stored charge vs. di f /dt 20 400 I F = 58A V R = 85V 350 15 I F = 39A V R = 85V 300 Q rr (nC) l RRM (A) 300 T J =125°C 10 250 T J =125°C 200 150 T J =25°C T J =25°C 5 100 50 0 100 200 300 400 500 600 0 700 di f /dt (A/μs) www.nellsemi.com 100 200 300 400 500 di f /dt (A/μs) Page 6 of 9 600 700 IRF4410 Series SEMICONDUCTOR RoHS RoHS Nell High Power Products Fig.20 Typical stored charge vs. di f /dt 450 I F = 58A V R = 85V 400 Q rr (nC) 350 300 T J =125°C 250 200 150 T J =25°C 100 50 0 100 200 300 400 500 600 700 di f /dt (A/μs) Fig.21 Peak diode recovery dv/dt test circuit for N-Channel D.U.T. Driver Gate Drive + P.W. - - - • • • • RG D.U.T. I SD Waveform Reverse Recovery Current + dv/dt controlled by R G Driver same type as D.U.T. l SD controlled by Duty Factor " D " D.U.T. -Device Under Test P.W. Period VGS=10V Circuit Layout Considerations • Low Stray lnductance • Ground Plane • Low Leakage lnductance Current Transformer + D= Period Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage V DD + Body Diode VDD Forward Drop Inductor Curent - Ripple ≤ 5% ISD *V GS = 5V for Logic Level Devices Fig.22a Unclamped lnductive test circuit Fig.22b Unclamped inductive waveforms V (BR)DSS 15V DRIVER L V DS RG tp D.U.T. l AS + V - DD A 20V tP www.nellsemi.com 0.01Ω l AS Page 7 of 9 * IRF4410 Series SEMICONDUCTOR RoHS RoHS Nell High Power Products Fig.23a Switching time test circuit Fig.23b Switching time Waveforms LD V DS V DS 90% + V DD - D.U.T. V GS 10% t d(ON) V GS t d(OFF) tR Second Pulse Width ≤ 1µs Duty Factor ≤ 0.1% Fig.24a Gate charge test circuit tF Fig.24b Gate charge waveform ID VDS VGS L 0 D.U.T. + V CC VGS(TH) 20K Qgodr www.nellsemi.com Page 8 of 9 Qgd Qgs2 Qgs1 IRF4410 Series SEMICONDUCTOR RoHS RoHS Nell High Power Products Case Style TO-220AB 10.54 (0.415) MAX. 9.40 (0.370) 9.14 (0.360) 4.70 (0.185) 4.44 (0.1754) 3.91 (0.154) 3.74 (0.148) 1.39 (0.055) 1.14 (0.045) 2.87 (0.113) 2.62 (0.103) 3.68 (0.145) 3.43 (0.135) 1 PIN 2 15.32 (0.603) 14.55 (0.573) 16.13 (0.635) 15.87 (0.625) 8.89 (0.350) 8.38 (0.330) 29.16 (1.148) 28.40 (1.118) 3 4.06 (0.160) 3.56 (0.140) 2.79 (0.110) 2.54 (0.100) 1.45 (0.057) 1.14 (0.045) 2.67 (0.105) 2.41 (0.095) 2.65 (0.104) 2.45 (0.096) 14.22 (0.560) 13.46 (0.530) 0.90 (0.035) 0.70 (0.028) 0.56 (0.022) 0.36 (0.014) 5.20 (0.205) 4.95 (0.195) TO-263(D 2 PAK) 10.45 (0.411) 9.65 (0.380) 4.83 (0.190) 4.06 (0.160) 6.22 (0.245) 9.14 (0.360) 8.13 (0.320) 1.40 (0.055) 1.14 (0.045) 1.40 (0.055) 1.19 (0.047) 15.85 (0.624) 15.00 (0.591) 0 to 0.254 (0 to 0.01) 2.79 (0.110) 2.29 (0.090) 0.940 (0.037) 0.686 (0.027) 0.53 (0.021) 0.36 (0.014) 2.67 (0.105) 2.41 (0.095) 3.56 (0.140) 5.20 (0.205) 4.95 (0.195) D (Drain) 2.79 (0.110) G (Gate) S (Source) All dimensions in millimeters(inches) www.nellsemi.com Page 9 of 9