H7N0310LD, H7N0310LS, H7N0310LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1125-0500 (Previous: ADE-208-1422C) Rev.5.00 Apr 07, 2006 Features • Low on-resistance RDS (on) = 8 mΩ typ. • Low drive current Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 4 4 1 1 2 1. Gate 2. Drain 3. Source 4. Drain 2 3 3 H7N0310LD H7N0310LS RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) D 4 G 1 2 3 H7N0310LM Rev.5.00 Apr 07, 2006 page 1 of 7 S H7N0310LD, H7N0310LS, H7N0310LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Symbol VDSS Value 30 Unit V VGSS ID ±20 30 V A 120 30 A A Pch θ ch-c 50 2.5 W °C/W Tch Tstg 150 –55 to +150 °C °C Note 1 Drain peak current Body to drain diode reverse drain current ID (pulse) IDR Note 2 Channel dissipation Channel to case thermal impedance Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit V (BR) DSS V (BR) GSS 30 ±20 — — — — V V ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 Gate to source leak current Zero gate voltage drain current IGSS IDSS — — — — ±10 10 µA µA VGS = ±16 V, VDS = 0 VDS = 30 V, VGS = 0 Gate to source cutoff voltage Static drain to source on state resistance VGS (off) RDS (on) 1.0 — — 8.0 2.5 10 V mΩ ID = 1 mA, VDS = 10 V Note 3 ID = 15 A, VGS = 10 V |yfs| — 21 13 35 19 — mΩ S ID = 15 A, VGS = 5 V Note 3 ID = 15 A, VDS = 10 V Input capacitance Output capacitance Ciss Coss — — 1400 380 — — pF pF Reverse transfer capacitance Total gate charge Crss Qg — — 210 24 — — pF nC VDS = 10 V VGS = 0 f = 1 MHz Gate to source charge Gate to drain charge Qgs Qgd — — 4.8 4.6 — — nC nC Turn-on delay time Rise time td (on) tr — — 21 250 — — ns ns Turn-off delay time Fall time td (off) tf — — 55 16 — — ns ns Body to drain diode forward voltage Body to drain diode reverse recovery time VDF trr — — 0.90 35 — — V ns Drain to source breakdown voltage Gate to source breakdown voltage Forward transfer admittance Note: 3. Pulse test Rev.5.00 Apr 07, 2006 page 2 of 7 Test Conditions Note 3 Note 3 VDD = 10 V VGS = 10 V ID = 30 A VGS = 10 V, ID = 15 A RL = 0.67 Ω Rg = 4.7 Ω IF = 30 A, VGS = 0 IF = 30 A, VGS = 0 diF/dt = 50 A/µs H7N0310LD, H7N0310LS, H7N0310LM Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 500 (A) 10 µs ID 60 Drain Current Channel Dissipation Pch (W) 80 40 20 100 1m 1 s 00 10 DC 0 50 100 ati = on 10 Operation in this area is limited by RDS (on) 1 ms 0.1 0.01 0.1 200 150 Case Temperature Tc (°C) 3 10 30 100 VDS (V) 50 10 V VDS = 10 V Pulse Test 4V Pulse Test 6V 40 1 Typical Transfer Characteristics 3.5 V 20 VGS = 3 V 10 40 30 Drain Current 30 ID (A) 50 0.3 Drain to Source Voltage Typical Output Characteristics ID (A) PW er Tc = 25°C 1 shot Pulse 0 Drain Current Op µs 20 Tc = 75°C 10 25°C –25°C 0 0 0 2 4 6 Drain to Source Voltage 8 10 0 VDS (V) 0.4 0.3 0.2 ID = 20 A 0.1 10 A 5A 0 0 4 8 12 Gate to Source Voltage Rev.5.00 Apr 07, 2006 page 3 of 7 16 20 VGS (V) 3 4 5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) (mΩ) Drain to Source Saturation Voltage VDS(on) (V) Pulse Test 2 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage 0.5 1 100 Pulse Test 50 20 VGS = 5 V 10 10 V 5 2 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 50 100 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (mΩ) H7N0310LD, H7N0310LS, H7N0310LM 40 Pulse Test 32 ID = 20 A 24 ID = 5 A, 10 A VGS = 5 V 16 8 5 A, 10 A, 20 A 10 V 0 –40 0 40 80 Case Temperature 120 Tc 160 100 30 Tc = –25°C 10 75°C 25°C 3 1 0.3 VDS = 10 V Pulse Test 0.1 0.1 Capacitance C (pF) Reverse Recovery Time trr (ns) 100 50 3000 Coss 300 100 1 3 10 30 100 12 VDS 20 8 VDD = 25 V 10 V 5V 10 4 0 0 0 8 16 Gate Charge Rev.5.00 Apr 07, 2006 page 4 of 7 24 32 Qg (nc) 20 30 40 50 40 500 Switching Time t (ns) 16 VGS (V) VGS VDD = 25 V 10 V 5V 10 Switching Characteristics 20 ID = 30 A 30 VGS = 0 f = 1 MHz Drain to Source Voltage VDS (V) IDR (A) Gate to Source Voltage (V) VDS Crss 0 Dynamic Input Characteristics Drain to Source Voltage Ciss 10 0.3 Reverse Drain Current 40 100 1000 30 20 10 0.1 30 10000 200 50 10 Typical Capacitance vs. Drain to Source Voltage di / dt = 50 A / µs VGS = 0, Ta = 25°C 500 3 Drain Current ID (A) (°C) Body to Drain Diode Reverse Recovery Time 1000 1 0.3 200 100 tr td(off) 50 td(on) 20 tf 10 5 0.1 0.2 0.5 1 VGS = 10 V, VDS = 10 V Rg = 4.7 Ω, duty ≤ 1 % 2 5 10 20 Drain Current ID (A) 50 100 H7N0310LD, H7N0310LS, H7N0310LM Reverse Drain Current vs. Souece to Drain Voltage Reverse Drain Current IDR (A) 50 40 10 V 30 VGS = 0 5V 20 10 Pulse Test 0 0 0.4 0.8 1.2 2.0 1.6 Source to Drain Voltage VSD (V) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θch – c (t) = γ s (t) • θch – c θch – c = 2.5°C/W, Tc = 25°C 0.1 0.05 0.02 0.03 PDM 1 e 0.0 puls t ho 1s D= PW T PW T 0.01 10 µ 100 µ 1m 10 m 100 m 1 10 Pulse Width PW (S) Switching Time Test Circuit Switching Time Waveform 90% Vout Monitor Vin Monitor D.U.T. Rg Vin Vout Vin 10 V VDS = 10 V 10% 10% 90% td(on) Rev.5.00 Apr 07, 2006 page 5 of 7 10% RL tr 90% td(off) tf H7N0310LD, H7N0310LS, H7N0310LM Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.5.00 Apr 07, 2006 page 6 of 7 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 H7N0310LD, H7N0310LS, H7N0310LM JEITA Package Code RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g 7.8 6.6 (2.3) 10.0 2.49 ± 0.2 7.8 7.0 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(2) 0.2 0.1 +– 0.1 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 +– 0.5 1.3 ± 0.2 Ordering Information Part Name H7N0310LD-E H7N0310LSTL-E Quantity 500 pcs 1000 pcs Shipping Container Box (Conductive Sack) Taping H7N0310LMTL-E 1000 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.5.00 Apr 07, 2006 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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