H7N0307LD, H7N0307LS, H7N0307LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1121-0700 (Previous: ADE-208-1516E) Rev.7.00 Apr 07, 2006 Features • Low on-resistance RDS (on) = 4.6 mΩ typ. • Low drive current • 4.5 V gate drive device can be driven from 5 V source Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 4 4 1 1 2 1. Gate 2. Drain 3. Source 4. Drain 2 3 3 H7N0307LD H7N0307LS RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) D 4 G 1 2 3 H7N0307LM Rev.7.00 Apr 07, 2006 page 1 of 7 S H7N0307LD, H7N0307LS, H7N0307LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Symbol VDSS Value 30 Unit V VGSS ID ±20 60 V A 240 60 A A Pch θ ch-c 90 1.39 W °C/W Channel to ambient thermal impedance Channel temperature θ ch-a Tch 89 150 °C/W °C Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C Tstg –55 to +150 °C Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current ID (pulse) IDR Note 1 Note 2 Channel dissipation Channel to case thermal impedance Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min 30 Typ — Max — Unit V Test Conditions ID = 10 mA, VGS = 0 Gate to source breakdown voltage Gate to source leak current V (BR) GSS IGSS ±20 — — — — ±10 V µA IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 IDSS — 1.0 — — 10 2.5 µA V VDS = 30 V, VGS = 0 Note 3 ID = 1 mA, VDS = 10 V RDS (on) — — 4.6 8.0 5.8 11.5 mΩ mΩ ID = 30 A, VGS = 10 V Note 3 ID = 30 A, VGS = 4.5 V Forward transfer admittance Input capacitance |yfs| Ciss 40 — 65 2500 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 650 350 — — pF pF ID = 30 A, VDS = 10 V VDS = 10 V VGS = 0 f = 1 MHz Total gate charge Gate to source charge Qg Qgs — — 40 7 — — nC nC Gate to drain charge Turn-on delay time Qgd td (on) — — 8 20 — — nC ns Rise time Turn-off delay time tr td (off) — — 300 70 — — ns ns Fall time Body to drain diode forward voltage tf VDF — — 20 0.92 — — ns V trr — 60 — ns Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Body to drain diode reverse recovery time Note: 3. Pulse test Rev.7.00 Apr 07, 2006 page 2 of 7 VGS (off) Note 3 VDD = 10 V VGS = 10 V ID = 60 A VGS = 10 V, ID = 30 A RL = 0.33 Ω Rg = 4.7 Ω IF = 60 A, VGS = 0 IF = 60 A, VGS = 0 diF/dt = 50 A/µs Note 3 H7N0307LD, H7N0307LS, H7N0307LM Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area (A) 500 ID 120 Drain Current Channel Dissipation Pch (W) 160 80 40 10 1m 100 DC 0 50 100 150 Case Temperature on = 10 ms Operation in this area is limited by RDS (on) 1 0.1 0.01 0.1 200 Tc (°C) 3 10 30 100 VDS (V) 50 10 V VDS = 10 V Pulse Test 3.5 V Pulse Test 4.5 V 40 1 Typical Transfer Characteristics ID (A) 50 0.3 Drain to Source Voltage Typical Output Characteristics ID (A) PW ati µs Tc = 25°C 1 shot Pulse 0 30 40 30 20 Drain Current Drain Current Op er 10 s 100 µs 3V 10 25°C 20 Tc = 75°C –25°C 10 VGS = 2.5 V 0 0 0 2 4 6 Drain to Source Voltage 8 10 0 VDS (V) 0.16 0.12 0.08 ID = 10 A 0.04 5A 2A 0 0 4 8 12 Gate to Source Voltage Rev.7.00 Apr 07, 2006 page 3 of 7 16 20 VGS (V) 3 4 5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) (mΩ) Drain to Source Saturation Voltage VDS(on) (V) Pulse Test 2 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage 0.20 1 100 Pulse Test 50 20 VGS = 4.5 V 10 5 10 V 2 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 50 100 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (mΩ) H7N0307LD, H7N0307LS, H7N0307LM 20 Pulse Test 16 ID = 2 A, 5 A, 10 A 12 VGS = 4.5 V 8 2 A, 5 A, 10 A 4 10 V 0 –40 0 40 80 Case Temperature 120 Tc 160 100 Tc = –25°C 30 75°C 10 25°C 3 1 0.3 VDS = 10 V Pulse Test 0.1 0.1 500 3000 Capacitance C (pF) Reverse Recovery Time trr (ns) 10000 200 100 50 Coss 300 Crss 100 1 3 10 30 100 0 8 10 4 VDD = 25 V 10 V 5V 0 20 40 Gate Charge Rev.7.00 Apr 07, 2006 page 4 of 7 60 80 Qg (nc) 30 40 50 0 100 VGS (V) 500 Switching Time t (ns) VDD = 25 V 10 V 12 5V Gate to Source Voltage (V) VDS Drain to Source Voltage 16 20 20 Switching Characteristics VGS VDS 10 Drain to Source Voltage VDS (V) IDR (A) 20 0 VGS = 0 f = 1 MHz 10 0.3 ID = 60 A 30 100 1000 Dynamic Input Characteristics 40 30 Ciss 30 di / dt = 50 A / µs VGS = 0, Ta = 25°C Reverse Drain Current 50 10 Typical Capacitance vs. Drain to Source Voltage 1000 10 0.1 3 Drain Current ID (A) (°C) Body to Drain Diode Reverse Recovery Time 20 1 0.3 200 100 tr td(off) 50 td(on) 20 tf 10 VGS = 10 V, VDS = 10 V Rg = 4.7 Ω, duty ≤ 1 % 5 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) 50 100 H7N0307LD, H7N0307LS, H7N0307LM Reverse Drain Current vs. Souece to Drain Voltage Reverse Drain Current IDR (A) 100 80 10 V 60 VGS = 0 5V 40 20 Pulse Test 0 0 0.4 0.8 1.2 2.0 1.6 Source to Drain Voltage VSD (V) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θch – c (t) = γ s (t) • θch – c θch – c = 1.38°C/W, Tc = 25°C 0.1 0.05 0.02 0.03 PDM 1 e 0.0 puls t ho 1s D= PW T PW T 0.01 10 µ 100 µ 1m 10 m 100 m 1 10 Pulse Width PW (S) Switching Time Test Circuit Switching Time Waveform 90% Vout Monitor Vin Monitor D.U.T. Rg Vin Vout Vin 10 V VDS = 10 V 10% 10% 90% td(on) Rev.7.00 Apr 07, 2006 page 5 of 7 10% RL tr 90% td(off) tf H7N0307LD, H7N0307LS, H7N0307LM Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.7.00 Apr 07, 2006 page 6 of 7 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 H7N0307LD, H7N0307LS, H7N0307LM JEITA Package Code RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g 7.8 6.6 (2.3) 10.0 2.49 ± 0.2 7.8 7.0 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(2) 0.2 0.1 +– 0.1 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 +– 0.5 1.3 ± 0.2 Ordering Information Part Name H7N0307LD-E H7N0307LSTL-E Quantity 500 pcs 1000 pcs Shipping Container Box (Conductive Sack) Taping H7N0307LMTL-E 1000 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.7.00 Apr 07, 2006 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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