HA16141P/FP, HA16142P/FP
PFC and PWM Controller
REJ03F0145-0500
(Previous: ADE-204-036D)
Rev.5.00
Jun 15, 2005
Description
The HA16141P/FP and the HA16142P/FP are power supply controller ICs combining an AC-DC converter switching
controllers for power factor correction and off-line power supply switching controllers. PFC (Power factor correction)
section employs average current mode PWM and off-line power supply control section employs peak current mode
PWM.
The HA16142P/FP is the change version of HA16141P/FP’s PWM maximum on duty cycle.
The PFC operation can be turned on and off by external control signal. Use of this on/off function makes it possible to
disable PFC operation at a low line voltage, or to perform remote control operation from the transformer secondary
side. The PFC power supply boosted output voltage is not only fed to an error amplifier input signal but also fed to as
the boost voltage monitor circuit. PG signal is put out if the boost voltage is out-of-spec.
The PWM controller, which begins operation at the same time as release of the IC’s UVLO (under-voltage lockout) is
suitable for auxiliary power supply use in a multi-output power supply system.
Features
• Synchronized PFC and PWM timing
• Self oscillation with fixed frequency
PFC
: 100 kHz (±15 %)
PWM
: 200 kHz (±15 %)
• PFC function on/off control
• PFC boosted output voltage monitor
• High-output current gate drivers
PFC driver peak current
: ±1.5 A typ.
PWM driver peak current
: ±1.0 A typ.
• PWM maximum on duty cycle
72% min (HA16141P/FP)
49.5% max (HA16142P/FP)
Rev.5.00 Jun 15, 2005 page 1 of 17
HA16141P/FP, HA16142P/FP
Pin Arrangement
GND
1
16
PWM-CS
PWM-OUT
2
15
PWM-EO
PFC-OUT
3
14
O.C
VCC
4
13
PFC-EO
VREF
5
12
TIM
PG
6
11
PFC-FB
CAO
7
10
IAC
PFC-CS
8
9
PFC-ON
(Top view)
Pin Description
Pin No.
Symbol
Function
1
2
GND
PWM-OUT
Ground
Power MOS FET driver output (PWM control)
3
4
PFC-OUT
VCC
Power MOS FET driver output (PFC control)
Supply voltage
5
6
VREF
PG
Reference voltage
Power Good signal output (open-drain output)
7
8
CAO
PFC-CS
Average current control error amp. output
PFC control current sense signal input
9
10
PFC-ON
IAC
PFC function on/off signal input
Multiplier reference current input
11
12
PFC-FB
TIM
PFC control error amp. input
Overcurrent timer time setting
13
14
PFC-EO
O.C
PFC control error amp. output
Overcurrent detector signal input
15
PWM-EO
PWM control error amp. output (photocoupler input also possible) (HA16141 only)
PWM control feedback voltage signal input (HA16142 only)
16
PWM-CS
PWM control current sense signal input
Rev.5.00 Jun 15, 2005 page 2 of 17
HA16141P/FP, HA16142P/FP
Block Diagram
PFC-EO
13
IAC
10
PFC-CS
8
VCC
4
UVLO
PFC-VAMP
2.7k
PFC-FB 11
2.5V
CAO
7
Multiplier
VREF
−0.5V
PFC-CLIMIT
5 VREF
±1.5A
PFC Control
3 PFC-OUT
PFC-CAMP
Gain
Selector
PFC/PWM
Supervisor
RES
PFC-ON 9
100kHz
1 GND
VCC
Over
Current Det.
Oscillator
200kHz
5R
LATCH
O.C 14
VCC HA16141 only
R
Integrator
PWM-VAMP
±1.0A
PWM Control
2.5V
2 PWM-OUT
16 PWM-CS
Rev.5.00 Jun 15, 2005 page 3 of 17
12
6
15
TIM
PG
PWM-EO
HA16141P/FP, HA16142P/FP
System Diagram
B+ OUT
B+
Rec+
1.8m
Q1
Rec−
(385V dc)
T1
+
470µ
(600V)
From PFC-OUT
710k
To
PFC-FB
570k
(1/2W)
+
4.7µ
VRB
4.7k
From
Q2 drain
GND
VCC
Oscillator
5V Internal Bias
200kHz
CT
1µs (HA16141)
2.3µs (HA16142) PWM-RES
5µs
VREF
22.2V
VREF
H
5V VREF
Generator
UVLO
L
0.1µ
500ns
PFC-DT
820k
CAO
36k
3.3n
UVL
RAMP
100kHz
VREF GOOD
IMO = K {IAC × (VEO − 1V)}
220p
IAC
IAC
VEO
910k
K
0.1
(5W)
−
+
−
+
IMO
VREF
PFC
-CS
100
3.4V
10µs
0.65V
VREF H
GOOD L
2.7k
PFC-CAMP
Q
Gate Driver
±1.5A(PEAK)
R
Q
+
−
To T1
S
PFC-CLIMIT
10n
Gate Driver
±1A(PEAK)
PWM
-OUT
K = 0.25
PFC
-EO
750k
47n
K = 0.05
PWM-RES
PFC
-FB
Q
PFC-VAMP
+
−
VCC
3.83V
3.63V
+
−
−
+
51k
0.1µ
×1
External parts of
PWM-EO pin are
applies to HA16141
only.
PWM
-CS
Over
Current
Detector
+B LOW
0.1µ
O.C
+
−
PFC-OFF
+
−
1V
1.5V
1.2V
1n
0.47µ
R
0.3V
0.1
(1W)
Current Monitor
Latch Block
PWM-OFF
VREF GOOD
S
Q
VREF
+
−
4V
R
−
+
5.1k
Enable to
secondary
51k
2R
2.34V
1.70V
−
+
33k
RB
−
+
+B HIGH
2.75V
2.60V
PFC
-ON
−
+
2.5V
Supervisor
720k
PWM
-EO
PWM-VAMP
5RB
HA16141 only
−
+
Gain Selector
From
VRB(B+monitor)
2.2µ
1
(1W)
R
S
2.5V
4.7n
To
Q1 gate
S
−0.5V
55k
PFC
-OUT
R
LOGIC
LOGIC
5V
3V
38.2µ
26.2µ
VCC
TIM
7.1V
R
PG
Q
S
+
−
Integrator
5.2µ
1n
2.5V
Circuit Ground Level
GND
Unit R: Ω
C: F
Note: The constants for the external components are for reference. Please confirm the operation when designing the system.
Rev.5.00 Jun 15, 2005 page 4 of 17
HA16141P/FP, HA16142P/FP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Supply voltage
Rating
20
Unit
V
VCC
Peak PFC-OUT current
Peak PWM-OUT current
Ipk-pfc
Ipk-pwm
±1.5
±1.0
A
A
DC PFC-OUT current
DC PWM-OUT current
Idc-pfc
Idc-pwm
±0.15
±0.10
A
A
Terminal voltage
Vi-group1
Vi-group2
–0.3 to VCC
–0.3 to Vref
V
V
CAO voltage
PFC-EO voltage
Vcao
Vpfc-eo
–0.3 to Veoh-ca
–0.3 to Veoh-pfc
V
V
PWM-EO voltage
PFC-ON voltage
Vpwm-eo
Vpfc-on
–0.3 to Veoh-pwm
–0.3 to +7
V
V
IAC voltage
IAC current
Vi-ac
Ii-ac
–0.3 to +5
0.8
V
mA
PFC-CS voltage
TIM voltage
Vi-cs
Vi-tim
–1.5 to +0.3
–0.3 to +6
V
V
VREF current
PG voltage
Io-ref
Vo-pg
–20
–0.3 to +7
mA
V
PG current
Power dissipation
Io-pg
PT
15
1
mA
W
Operating temperature
Storage temperature
Topr
Tstg
–40 to +105
–55 to +150
°C
°C
Junction temperature
Tj
150
°C
Note
3
3
4
5
6
Rated voltages are with reference to the GND pin.
For rated currents, inflow to the IC is indicated by (+), and outflow by (–).
Shows the transient current when driving a capacitive load.
Group1 is the rated voltage for the following pins: PFC-OUT, PWM-OUT
Group2 is the rated voltage for the following pins: VREF, PFC-FB, PWM-CS
This is the value when the ambient temperature (Ta) is 25°C or below. If Ta exceeds 25°C, the graph below
applies. For the SOP package, this value is based on actual measurements on a 10% wiring density glass
epoxy circuit board (40 mm × 40 mm × 1.6 mm).
Maximum power
dissipation PT (W)
Notes: 1.
2.
3.
4.
5.
6.
Symbol
25°C
105°C
1
0.5
0
Rev.5.00 Jun 15, 2005 page 5 of 17
−8mW/°C
−40
0
50
100
Ambient temperature Ta (°C)
150
HA16141P/FP, HA16142P/FP
Electrical Characteristics
(Ta = 25°C, VCC = 14 V)
Supply
PFC-OUT
PWM-OUT
VREF
Item
Start threshold
Shutdown threshold
UVLO hysteresis
Symbol
VH
Min
12.2
Typ
13.0
Max
13.8
Unit
V
Test Conditions
VL
dVUVL
9.4
2.6
10.0
3.0
10.6
3.4
V
V
Start-up current
Is temperature stability
IS
dIS/dTa
150
–
200
–0.3
300
–
µA
%/°C
Operating current
Latch current
ICC
ILATCH
4
230
7
310
9
375
mA
µA
Shunt zener voltage
Vz temperature
stability
VZ
dVZ/dTa
21.2
–
22.2
+4
23.2
–
V
mV/°C
Minimum duty cycle
Maximum duty cycle
Dmin-pfc
Dmax-pfc
–
90
–
95
0
98
%
%
CAO = 3.6V
CAO = 0V
Rise time
Fall time
tr-pfc
tf-pfc
–
–
30
30
100
100
ns
ns
CL = 1000p
CL = 1000p
Peak current
Low voltage
Ipk-pfc
Vol1-pfc
–
–
1.5
0.05
–
0.2
A
V
CL = 0.01µF *
Iout = 20mA
Vol2-pfc
Vol3-pfc
–
–
0.35
0.03
1.4
0.7
V
V
Iout = 200mA
Iout = 10mA, VCC = 5V
High voltage
Voh1-pfc
Voh2-pfc
13.5
12.6
13.9
13.3
–
–
V
V
Iout = −20mA
Iout = −200mA
Minimum duty cycle
Dmin-pwm
–
–
0
%
Maximum duty cycle
Dmax-pwm
72
80
88
%
PWM-EO = 1.3V
PWM-CS = 0V
PWM-EO = 5V
2
PWM-CS = 0V *
42.5
46
49.5
%
VCC = 12V
1
*
IAC = 100µA, CL = 0F
VCC = 9V
ICC = 14mA
1
ICC = 14mA *
1
Rise time
tr-pwm
–
30
100
ns
PWM-EO = 5V
3
PWM-CS = 0V *
CL = 1000p
Fall time
Peak current
tf-pwm
Ipk-pwm
–
–
30
1.0
100
–
ns
A
CL = 1000p
1
CL = 0.01µF *
Low voltage
Vol1-pwm
Vol2-pwm
Vol3-pwm
–
–
0.05
0.5
0.2
2.0
V
V
Iout = 20mA
Iout = 200mA
High voltage
Voh1-pwm
Voh2-pwm
–
13.5
0.03
13.9
0.7
–
V
V
Iout = 10mA, VCC = 5V
Iout = −20mA
Output voltage
Vref
12.0
4.9
13.0
5.0
–
5.1
V
V
Iout = −200mA
Isource = 1mA
Line regulation
Vref-line
–
5
20
mV
Load regulation
Vref-load
–
5
20
mV
dVref
–
80
–
ppm/°C
Temperature stability
Notes: 1. Design spec.
2. Apply to HA16141.
3. Apply to HA16142.
Rev.5.00 Jun 15, 2005 page 6 of 17
Isource = 1mA
VCC = 12V to 18V
Isource = 1mA to 20mA
Ta = −40 to 105°C *
1
HA16141P/FP, HA16142P/FP
Electrical Characteristics (cont.)
(Ta = 25°C, VCC = 14 V)
Oscillator
Item
Initial accuracy
Symbol
fpwm
Min
170
Typ
200
Max
230
Unit
kHz
Test Conditions
Measured pin: PWM-OUT
fpfc
dfpwm/dTa
85
–
100
±0.1
115
–
kHz
%/°C
Measured pin: PFC-OUT
1
Ta = −40 to 105°C *
fpwm voltage stability
Ramp peak voltage
fpwm(line)
Vramp-H
–1.5
–
+0.5
3.4
+1.5
3.6
%
V
VCC = 12V to 18V
Ramp valley volatge
PFC on voltage
Vramp-L
Von-pfc
–
1.3
0.65
1.5
–
1.7
V
V
*
PFC off voltage
PFC on-off hysteresis
Voff-pfc
dVon-off
1.0
0.15
1.2
0.30
1.4
0.45
V
V
Input current
PFC GOOD
threshold voltage
Ipfc-on
Vb-good
–
2.29
0.1
2.34
1.0
2.39
µA
V
PFC-ON = 2V
Input pin: PFC-FB
PFC FAIL
threshold voltage
+B High
PFC inhibit voltage
Vb-fail
1.66
1.70
1.74
V
Input pin: PFC-FB
Vb-h
2.69
2.75
2.81
V
Input pin: PFC-FB
+B High
PFC restart voltage
PG leak current
Vb-res
2.54
2.60
2.66
V
Input pin: PFC-FB
Ioff-pg
–
0.001
1.0
µA
PG = 5V
PG shunt current
Delay to PG
Ion-pg
tg-pg
5
–
15
0.2
–
1
mA
µs
PG = 3V *
Step signal (5 to 0V) to
PFC-ON
O.C threshold voltage
PWM-CS threshold
voltage
VOC
VCS
0.27
0.9
0.30
1.0
0.33
1.1
V
V
O.C input current
Sink current
IOC
Isnk-tim
–
3.9
–0.1
5.2
–1.0
6.5
µA
µA
O.C = 0V
TIM = 2V
Source current
O.C trigger
Source Current
PWM-CS trigger
Isrc-tim1
–16
–21
–26
µA
TIM = 2V, O.C = 0.5V *
Isrc-tim2
–25
–33
–41
µA
TIM = 2V, PWM-CS = 2V
1
*
Integrated time
O.C trigger
t-tim1
88
110
132
µs
Integrated Time
PWM-CS trigger
t-tim2
53
67
81
µs
Step signal (0 to
O.C, Ctim =
Measured pin: PG
Step signal (0 to
PWM-CS, Ctim =
Measured pin: PG
fpwm temperature
stability
PFC-ON
Supervisor/
PG
O.C
(Over
Current
Detector)
Integrator
1
2
1
Notes: 1. Design spec.
2. Maximum rating of PG current is 15 mA. Use series resistor to limit PG current lower than 15 mA.
Rev.5.00 Jun 15, 2005 page 7 of 17
1V) to
1000p,
2V) to
1000p,
HA16141P/FP, HA16142P/FP
Electrical Characteristics (cont.)
(Ta = 25°C, VCC = 14 V)
Item
Threshold voltage
for PFC stop
Symbol
Vlch-pfc
Min
2.4
Typ
2.5
Max
2.6
Unit
V
Threshold Voltage
for PWM stop
Latch Reset Voltage
Vlch-sys
3.8
4.0
4.2
V
Vcc-res
6.1
7.1
8.1
V
Feedback VCC voltage
Open loop gain
Vfb-pwm
Av-pwm
14.2
–
14.8
45
15.4
–
V
dB
PWM-EO = 2.5V *
1, 2
* *
High voltage
Veoh-pwm
5.1
5.7
6.3
V
Low voltage
Veol-pwm
–
0.1
0.3
V
VCC = 14V,
PWM-EO: Open
VCC = 16V,
2
PWM-EO: Open *
Source current
Sink current
Isrc-pwm
Isnk-pwm
–
–
−77
77
–
–
µA
µA
Transconductance
respect to VCC
Delay to output
Gm-pwm
19
27
35
µA/V
td-cs
–
210
300
ns
PFC current
limit
Threshold voltage
Delay to output
VLM
td-LM
–0.47
–
–0.50
280
–0.53
500
V
ns
PFC-CS = 0 to −1V
PFC-VAMP
Feedback voltage
Input bias current
Vfb-pfc
Ifb-pfc
2.45
–0.30
2.50
−0.07
2.55
+0.30
V
µA
PFC-EO = 2.5V
Measured pin: PFC-FB
Open loop gain
High voltage
Av-pfc
Veoh-pfc
–
5.1
65
5.7
–
6.3
dB
V
*
PFC-FB = 2.3V,
PFC-EO: Open
Low voltage
Veol-pfc
–
0.1
0.3
V
Source current
Isrc-pfc
–62
–77
–93
µA
PFC-FB = 2.7V,
PFC-EO: Open
PFC-FB = 1.0V,
PFC-EO = 2.5V
Sink current
Isnk-pfc
62
77
93
µA
Transconductance
Gm-pfcv
120
160
200
µA/V
Latch
PWM-VAMP
PWM
current
sense
Notes: 1. Design spec.
2. Apply to HA16141.
Rev.5.00 Jun 15, 2005 page 8 of 17
Test Conditions
Input pin: TIM
Input pin: TIM
2
1
* VCC = 11V
1
2
* VCC = 18V *
VCC = 15V,
2
PWM-EO = 2.5V *
PWM-EO = 5V,
PWM-CS = 0 to 2V
1
PFC-FB = 4.0V,
PFC-EO = 2.5V
PFC-FB = 2.5V,
PFC-EO = 2.5V
HA16141P/FP, HA16142P/FP
Electrical Characteristics (cont.)
(Ta = 25°C, VCC = 14 V)
PFC-CAMP
IAC/
Multiplier
Item
Input offset voltage
Symbol
Vio-ca
Min
–
Typ
±7
Max
–
Unit
mV
Open loop gain
High voltage
Av-ca
Veoh-ca
–
5.1
65
5.7
–
6.3
dB
V
Low voltage
Source current
Veol-ca
Isrc-ca
–
–
0.1
–77
0.3
–
V
µA
CAO = 2.5V *
Sink current
Transconductance
Isnk-ca
Gm-pfcc
–
120
77
160
–
200
µA
µA/V
CAO = 2.5V *
1
*
IAC PIN voltage
Terminal offset current
Viac
Imo-offset
0.7
–56
1.0
–75
1.3
–94
V
µA
IAC = 100µA
IAC = 0A, PFC-CS = 0V,
Measured pin: PFC-CS
Output current
(PFC-ON = 3.4V)
Imo1
–
–25
–
µA
Imo2
–
–75
–
µA
PFC-EO = 2V,
1, 2
IAC = 100µA * *
PFC-EO = 4V,
1, 2
IAC = 100µA * *
Imo3
–
–5
–
µA
Imo4
–
–15
–
µA
PFC-CS resistance
Threshold voltage
for K = 0.05
Rmo
VK-H
–
3.71
2.7
3.83
–
3.95
kΩ
V
Threshold voltage
for K = 0.25
VK hysteresis voltage
VK-L
3.51
3.63
3.75
V
dVK
0.15
0.20
0.25
V
Output current
(PFC-ON = 3.9V)
Gain
selector
Notes: 1. Design spec.
2. Imo1 to Imo4 are defined as,
Imo = (PFC-CS Terminal Current) – (Imo-offset)
Imo = K {IAC × (VEO − 1V)}
IAC
IAC
VEO
K
Imo
−
+
−
+
VREF
2.7k
PFC-CAMP
55k
PFC-CS
PFC-CS Terminal
Current
Rev.5.00 Jun 15, 2005 page 9 of 17
Imo-offset
−0.5V
+
−
PFC-CLIMIT
Test Conditions
1
*
1
*
1
1
PFC-EO = 2V,
1, 2
IAC = 100µA * *
PFC-EO = 4V,
1, 2
IAC = 100µA * *
1
*
1
*
HA16141P/FP, HA16142P/FP
Internal Timing
1. UVLO
13V
10V
VCC
5V
VREF
4.6V
0V
VREF GOOD
(internal signal)
System Enable
0V
2. Oscillator, Gate driver output
3.2V
Reference
triangle wave CT
200 kHz
(internal signal) 1.6V
PWM-RES
(internal signal)
PFC-DT
(internal signal)
PFC triangle wave
Ramp
100 kHz
(internal signal)
PFC current amp.
output
CAO
3.4V
0.65V
PWM voltage feedback
(internal signal)
PWM current sense
PWM-CS
PWM-OUT
(Trailing Edge control)
PFC-OUT
(Leading Edge control)
Note: All numeric values in the figure are typical values.
Rev.5.00 Jun 15, 2005 page 10 of 17
HA16141P/FP, HA16142P/FP
3. PFC controller status
Precondition: VREF GOOD, Non latched.
1.5V
PFC-ON 1.5V
1.2V
2.75V
1.2V
2.60V
PFC-FB
2.34V
2.34V
1.70V
PG
PFC-OUT
PFC pulses stopped
by PFC-ON,
and PG signal high
PG signal high due to
low PFC-FB voltage
PFC pulses stopped
by PFC-ON,
and PG signal high
PFC pulses stopped due to
high PFC-FB voltage
(overshoot prevention)
Normal
operation
PFC pulses stopped
by PFC-ON,
and PG signal high
Normal
operation
Normal
operation
PG signal high due to
low PFC-FB voltage
Normal
operation
Notes: 1. All numeric values in the figure are typical values.
2. PFC-ON
The HA16141P/FP can perform on/off control of the PFC function using the PFC-ON pin.
If an AC voltage that has undergone primary rectification and has been divided with an external resistance is input,
PFC stoppage is possible in the event of a low input voltage.
On/off control by means of a logic signal is also possible.
3. PFC-FB
The input to this pin is the voltage obtained by dividing the stepped-up PFC output voltage.
The pin voltage is fed back to the PFC control system, and is also used for step-up voltage logic decisions.
This is outlined in the figure below.
PFC-OUT pulse stoppage
(Reduction of step-up voltage overshoot)
Hysteresis
2.75V
Feedback voltage
2.50V
2.60V
PG (Power Good) signal is output
2.34V
Hysteresis
1.70V
(Note 3 is continued on the next page)
Rev.5.00 Jun 15, 2005 page 11 of 17
HA16141P/FP, HA16142P/FP
3. PFC controller status (cont.)
Notes: 3. PFC-FB (cont.)
The actual input voltage to the PFC-FB pin is the step-up voltage divided with a resistance (see figure below).
If R1 is set as 710 kΩ and R2 as 4.7 kΩ, the decision voltage at the step-up pin (+B) is as shown in the figure below.
+B
R1
710kΩ
PFC-FB
R2
4.7kΩ
PFC-VAMP
−
+
To Multiplier
2.5V
PFC-EO
Precondition: VREF GOOD, PFC-ON, Non latched.
418V
Step-up voltage
+B
356V
395V
380V
(Typical Output Voltage)
259V
2.75V
PFC-FB
2.60V
2.5V
(PFC Feedback Voltage)
2.34V
1.70V
PG
Power Good Period
PFC-OUT
Notes: 4. All numeric values in the figure are typical values.
Rev.5.00 Jun 15, 2005 page 12 of 17
HA16141P/FP, HA16142P/FP
4. PFC-ON pin
The following functions are effected by inputting an AC voltage that has undergone primary rectification
and has been divided with an external resistance to the PFC-ON pin (see figure below).
a) Turning PFC operation off when AC voltage is low
b) Switching multiplier gain with AC 100 V system and 200 V system input
Em
Rec+
R1
3.83V
3.63V
720kΩ
−
+
Switching Multiplier Gain
−
+
PFC-ON/OFF Control
PFC-ON
2.2µF
R2
20kΩ
1.5V
1.2V
PFC-ON(dc) = 2 ⋅ Em / π ⋅ R2 / (R1 + R2)
= 2 ⋅ (√2) ⋅ Vac / π ⋅ R2 / (R1 + R2)
Precondition: VREF GOOD, Non latched.
AC voltage
Vac
157Vac
149Vac
62Vac
49Vac
0Vac
3.83V
3.63V
PFC-ON
1.5V
1.2V
0V
PFC Status
(internal status)
ON
PFC-ON Period
OFF
Multiplier gain
(internal status)
0.25
0.05
Note: All numeric values in the figure are typical values.
Rev.5.00 Jun 15, 2005 page 13 of 17
HA16141P/FP, HA16142P/FP
5. Integrator (OC detection operation)
PWM-RES
(internal signal)
O.C
(overcurrent
detection input)
0.3V
5.2µA
TIM pin current
(integral output
current)
0
−21µA
3V
2.5V
TIM pin voltage
(integral output
voltage)
0.2V
t-tim1
LATCH STATUS
(for PFC-STOP)
LATCH STATUS
(for PWM-STOP)
PFC Stop
PFC Enable
PWM Enable
Note: Timer time calculation equation
Timer time t-tim1 is the time until PG pin inversion (from low to high) after the O.C pin trigger.
t-tim1 can be set using the following approximate equation.
t-tim1 = −Ctim ⋅ (Vlch − pfc − 0.2V) / Isrc − tim1
= −Ctim ⋅ (2.5V − 0.2V) / (−21µA) ⋅ ⋅ ⋅ ⋅ ⋅ Typical calculation
Rev.5.00 Jun 15, 2005 page 14 of 17
HA16141P/FP, HA16142P/FP
6. Integrator (PWM-CS detection operation)
PWM-RES
(internal signal)
PWM-CS
(current sense
input)
1V
5.2µA
TIM pin current
(integral output
current)
0
−33µA
4V
2.5V
TIM pin voltage
(integral output
voltage)
0.2V
t-tim2
LATCH STATUS
(for PFC-STOP)
LATCH STATUS
(for PWM-STOP)
PFC Stop
PFC Enable
t-tim2'
PWM Stop
PWM Enable
Note: Timer time calculation equation
Timer time t-tim2 is the time until PG pin inversion (from low to high) after the PWM-CS pin trigger.
t-tim2 can be set using the following approximate equation.
t-tim2 = −Ctim ⋅ (Vlch − pfc − 0.2V) / Isrc − tim2
= −Ctim ⋅ (2.5V − 0.2V) / (−33µA) ⋅ ⋅ ⋅ ⋅ ⋅ Typical calculation
The time at which both the PFC and PWM functions are stopped by this timer can be calculated
using the following approximate equation.
t-tim2' = 1.65 ⋅ t − tim2 ⋅ ⋅ ⋅ ⋅ ⋅ Typical calculation
Rev.5.00 Jun 15, 2005 page 15 of 17
HA16141P/FP, HA16142P/FP
Mark Pattern
Control code
1, 2: Lot indication
Ejector pin
123
HA16141P
(HA16142P)
Ejector pin
Type code
Notes: 1. Example of lot indication.
For example, a product manufactured in May 2000 has the markings "0E" in
positions 1 2 in the above figure.
Production
Indication
Month
Year
1
2
May
2000
0
E
Month
Jan
Feb
Mar
Apr
May
Jun
Jul
Aug
Sep
Oct
Nov
Dec
Code
A
B
C
D
E
F
G
H
J
K
L
M
2. Laser marking is used.
Rev.5.00 Jun 15, 2005 page 16 of 17
HA16141P/FP, HA16142P/FP
Package Dimensions
As of January, 2003
19.20
20.00 Max
Unit: mm
7.40 Max
9
6.30
16
1
8
1.3
1.11 Max
2.54 Min 5.06 Max
0.48 ± 0.10
0.51 Min
2.54 ± 0.25
7.62
+ 0.13
0.25 – 0.05
0° − 15°
Package Code
JEDEC
JEITA
Mass (reference value)
JEITA Package Code
P-SOP16-5.5x10.06-1.27
RENESAS Code
PRSP0016DH-A
*1
Previous Code
FP-16DA
DP-16
Conforms
Conforms
1.07 g
MASS[Typ.]
0.24g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
D
F
16
9
bp
c
c1
HE
*2
E
b1
Index mark
Reference
Symbol
Terminal cross section
1
Z
*3
bp
Nom
Max
D
10.06
10.5
E
5.5
A2
8
e
Dimension in Millimeters
Min
x
A1
M
0.00
0.10
0.34
0.42
A
L1
2.20
b
p
b
1
A
A1
θ
y
L
Detail F
0.22
0.27
0.20
1
θ
0°
HE
7.50
e
8°
7.80
8.00
1.27
x
0.12
y
0.15
0.80
Z
L
L
Rev.5.00 Jun 15, 2005 page 17 of 17
0.50
0.40
0.17
c
c
0.20
0.50
1
0.70
1.15
0.90
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