FDMC7664 N-Channel PowerTrench® MOSFET 30 V, 18.8 A, 4.2 mΩ Features General Description This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced Power Trench® process that has been especially tailored to minimize the on-state resistance. This device is well suited for Power Management and load switching applications common in Notebook Computers and Portable Battery Packs. Max rDS(on) = 4.2 mΩ at VGS = 10 V, ID = 18.8 A Max rDS(on) = 5.5 mΩ at VGS = 4.5 V, ID = 16.1 A High performance technology for extremely low rDS(on) Termination is Lead-free and RoHS Compliant Applications DC - DC Buck Converters Notebook battery power management Load switch in Notebook Top Bottom Pin 1 S S S D 5 4 G D 6 3 S D 7 2 S D 8 1 S G D D D D MLP 3.3x3.3 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID -Continuous TC = 25 °C -Continuous TA = 25 °C TJ, TSTG ±20 V (Note 1a) 18.8 A 60 Single Pulse Avalanche Energy PD Units V 24 -Pulsed EAS Ratings 30 (Note 3) Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C 188 45 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to +150 mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case 2.8 RθJA Thermal Resistance, Junction to Ambient (Note 1a) 53 °C/W Package Marking and Ordering Information Device Marking FDMC7664 Device FDMC7664 ©2009 Fairchild Semiconductor Corporation FDMC7664 Rev.C4 Package MLP 3.3x3.3 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC7664 N-Channel PowerTrench® MOSFET June 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current, Forward 30 V 12 VDS = 24 V, VGS = 0 V mV/°C 1 TJ = 125 °C μA 250 VGS = 20 V, VDS = 0 V 100 nA 3.0 V On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 1.0 1.9 -7 mV/°C VGS = 10 V, ID = 18.8 A 3.6 4.2 VGS = 4.5 V, ID = 16.1 A 4.5 5.5 VGS = 10 V, ID = 18.8 A TJ = 125 °C 4.4 5.4 VDD = 5 V, ID = 18.8 A 115 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 15 V, VGS = 0 V f = 1 MHz 3655 4865 pF 1100 1465 pF 115 170 pF 0.8 2.2 Ω 15 27 ns 7 14 ns 37 59 ns 6 12 ns nC Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time VDD = 15 V, ID = 18.8 A VGS = 10 V, RGEN = 6 Ω Qg(TOT) Total Gate Charge VGS = 0 V to 10 V 55 76 Qg Total Gate Charge 25 34 Qgs Gate to Source Charge VGS = 0 V to 4.5 V VDD = 15 V ID = 18.8 A Qgd Gate to Drain “Miller” Charge nC 12 nC 6 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 18.8 A (Note 2) 0.83 1.2 VGS = 0 V, IS = 1.9 A (Note 2) 0.71 1.2 IF = 18.8 A, di/dt = 100 A/μs V 41 65 ns 20 35 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 53 °C/W when mounted on a 1 in2 pad of 2 oz copper b.125 °C/W when mounted on a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 3. EAS of 188 mJ is based on starting TJ = 25 oC, L = 1 mH, IAS = 19.4 A, VDD = 27 V, VGS = 10 V. ©2009 Fairchild Semiconductor Corporation FDMC7664 Rev.C4 2 www.fairchildsemi.com FDMC7664 N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 60 VGS = 10 V VGS = 6 V VGS = 4.5 V VGS = 4 V ID, DRAIN CURRENT (A) 45 VGS = 3.5 V 30 VGS = 3 V 15 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.3 0.6 0.9 VGS = 3 V 4 3 VGS = 4 V 1 VGS = 10 V VGS = 6 V 0 1.2 0 Figure 1. On Region Characteristics 15 30 ID, DRAIN CURRENT (A) 45 60 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage 12 ID = 18.8 A VGS = 10 V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 0.6 -75 SOURCE ON-RESISTANCE (mΩ) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 3.5 V VGS = 4.5 V 2 VDS, DRAIN TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 9 ID = 18.8 A 6 TJ = 125 oC 3 TJ = 25 oC 0 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs. Junction Temperature Figure 4. On-Resistance vs. Gate to Source Voltage 60 100 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 45 VDS = 5 V 30 TJ = 150 oC TJ = 25 oC 15 TJ = -55 oC 0 1 2 3 VGS = 0 V 10 1 0.1 TJ = -55 oC 0.01 0.001 0.0 4 TJ = 25 oC TJ = 150 oC 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current ©2009 Fairchild Semiconductor Corporation FDMC7664 Rev.C4 3 1.2 www.fairchildsemi.com FDMC7664 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 7000 Ciss ID = 18.8 A 8 VDD = 10 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 15 V 6 VDD = 20 V 4 Coss 1000 Crss 2 100 0 0 15 30 45 f = 1 MHz VGS = 0 V 50 0.1 60 Figure 7. Gate Charge Characteristics 30 90 80 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 10 Figure 8. Capacitance vs. Drain to Source Voltage 30 10 TJ = 25 oC TJ = 100 oC TJ = 125 oC 70 60 VGS = 10 V 50 40 VGS = 4.5 V 30 20 10 1 0.01 0.1 1 10 100 0 25 1000 P(PK), PEAK TRANSIENT POWER (W) 100 us 10 1 ms 10 ms 0.1 100 ms SINGLE PULSE TJ = MAX RATED 1s 10 s DC RθJA = 125 oC/W TC = 25 oC 0.01 0.01 0.1 1 10 100 200 VDS, DRAIN to SOURCE VOLTAGE (V) 100 125 150 2000 1000 VGS = 10 V 100 10 SINGLE PULSE RθJA = 125 oC/W 1 TC = 25 oC 0.5 -4 -3 -2 10 10 10 -1 10 1 10 2 10 3 10 t, PULSE WIDTH (sec) Figure 11. Forward Bias Safe Operating Area ©2009 Fairchild Semiconductor Corporation FDMC7664 Rev.C4 75 Figure 10. Maximum Continuous Drain Current vs. Case Temperature 100 THIS AREA IS LIMITED BY rDS(on) 50 o Figure 9. Unclamped Inductive Switching Capability 1 Limited by Package o RθJC = 3.0 C/W TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDMC7664 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted NORMALIZED THERMAL IMPEDANCE, ZθJA 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 125 C/W 0.001 0.0005 -4 10 (Note 1b) -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FDMC7664 Rev.C4 5 www.fairchildsemi.com FDMC7664 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted FDMC7664 N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEU-C08 ©2009 Fairchild Semiconductor Corporation FDMC7664 Rev.C4 6 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I68 ©2009 Fairchild Semiconductor Corporation FDMC7664 Rev.C4 7 www.fairchildsemi.com FDMC7664 N-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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