CS48N78 Pb Free Plating Product ® Pb CS48N78 70V,80A N-Channel Trench Process Power MOSFET General Description The CS48N78 is N-channel MOS Field Effect Transistor designed for high current switching applications. Rugged EAS CS48N78 capability and ultra low RDS(ON) is suitable for PWM, load (TO-220 HeatSink) switching especially for E-Bike controller applications. Features ● VDS=70V；ID=80A@ VGS=10V； G D S RDS(ON)<7.2mΩ @ VGS=10V ● Special Designed for E-Bike Controller Application ● Ultra Low On-Resistance ● High UIS and UIS 100% Test Schematic Diagram Application VDS = 70 V ● 48V E-Bike Controller Applications ● Hard Switched and High Frequency Circuits ● Uninterruptible Power Supply ID = 80 A RDS(ON) = 5.9 mΩ Table 1. Absolute Maximum Ratings (TA=25℃) Symbol Parameter Value Unit 70 V VDS Drain-Source Voltage (VGS=0V） VGS Gate-Source Voltage (VDS=0V) ±25 V ID (DC) Drain Current (DC) at Tc=25℃ 80 A ID (DC) Drain Current (DC) at Tc=100℃ 56 A 320 A Peak Diode Recovery Voltage 30 V/ns Maximum Power Dissipation(Tc=25℃) 100 W Derating Factor 0.66 W/℃ 410 mJ -55 To 175 ℃ IDM (pluse) dv/dt PD EAS TJ,TSTG Drain Current-Continuous@ Current-Pulsed Single Pulse Avalanche Energy (Note 1) (Note 2) Operating Junction and Storage Temperature Range Notes 1.Repetitive Rating: Pulse width limited by maximum junction temperature 2.EAS condition:TJ=25℃,VDD=33V,VG=10V,ID=40.5A Rev.05 © 2006 Thinki Semiconductor Co.,Ltd. Page 1/5 http://www.thinkisemi.com/ CS48N78 ® Table 2. Thermal Characteristic Symbol RJC Parameter Thermal Resistance,Junction-to-Case Table 3. Electrical Characteristics (TA=25℃unless otherwise noted) Symbol Parameter Conditions Min Value Unit 1.5 ℃/W Typ Max Unit On/Off States BVDSS Drain-Source Breakdown Voltage VGS=0V ID=250μA 70 V IDSS Zero Gate Voltage Drain Current(Tc=25℃) VDS=68V,VGS=0V 1 μA IDSS Zero Gate Voltage Drain Current(Tc=125℃) VDS=68V,VGS=0V 10 μA IGSS Gate-Body Leakage Current VGS=±25V,VDS=0V ±100 nA VGS(th) Gate Threshold Voltage VDS=VGS,ID=250μA 4 V RDS(ON) Drain-Source On-State Resistance 7.2 mΩ 2 VGS=10V, ID=40A 5.9 Dynamic Characteristics gFS Forward Transconductance Ciss Input Capacitance VDS=10V,ID=15A VDS=25V,VGS=0V, f=1.0MHz Coss Output Capacitance Crss Reverse Transfer Capacitance Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDS=50V,ID=40A, VGS=10V 20 S 3483 pF 459 pF 214 pF 82 nC 16.2 nC 36.7 nC 11 nS 13 nS 22 nS 27 nS Switching Times td(on) Turn-on Delay Time tr Turn-on Rise Time td(off) tf VDD=30V,ID=2A,RL=15Ω VGS=10V,RG=2.5Ω Turn-Off Delay Time Turn-Off Fall Time Source-Drain Diode Characteristics ISD Source-Drain Current(Body Diode) 80 A ISDM Pulsed Source-Drain Current(Body Diode) 320 A VSD Forward On Voltage (Note 1) TJ=25℃,ISD=40A,VGS=0V 0.69 TJ=25℃,IF=75A di/dt=100A/μs 40 nS 81 nC (Note 1) trr Reverse Recovery Time Qrr Reverse Recovery Charge ton Forward Turn-on Time (Note 1) 0.95 V Intrinsic turn-on time is negligible(turn-on is dominated by LS+LD) Notes 1.Pulse Test: Pulse Width ≤ 300μs, Duty Cycle ≤ 1.5%, RG=25Ω, Starting TJ=25℃ Rev.05 © 2006 Thinki Semiconductor Co.,Ltd. Page 2/5 http://www.thinkisemi.com/ CS48N78 ® Test Circuit 1）E AS Test Circuits 2）Gate Charge Test Circuit: 3）Switch Time Test Circuit： Rev.05 © 2006 Thinki Semiconductor Co.,Ltd. Page 3/5 http://www.thinkisemi.com/ CS48N78 ® TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS (Curves) ID (A) 10us 1ms 10ms DC IS - Source Current (A) Figure2. Source-Drain Diode Forward Voltage RDS(ON) Figure1. Safe Operating Area Tc = 25℃ VDS (Volts) VSD (Volts) Figure4. Transfer Characteristics ID (A) ID (A) Figure3. Output Characteristics VDS (Volts) Figure6. RDS(ON) vs Junction Temperature RDS(ON) (mΩ) Figure5. Static Drain-Source On Resistance VGS (Volts) ID (A) Rev.05 © 2006 Thinki Semiconductor Co.,Ltd. Page 4/5 http://www.thinkisemi.com/ CS48N78 ® Figure7. BVDSS vs Junction Temperature Figure8. VGS(th) vs Junction Temperature Temperature（℃） Temperature（℃） Temperature（℃） Figure10. Capacitance VGS (Volts) C Capacitance (pF) Figure9. Gate Charge Waveforms Qg Gate Charge (nC) VDS Drain-Source Voltage (V) Transient Thermal Impedance R(t), Normalized Effective Figure11. Normalized Maximum Transient Thermal Impedance Square Wave Pluse Duration(sec) Rev.05 © 2006 Thinki Semiconductor Co.,Ltd. Page 5/5 http://www.thinkisemi.com/