CEZ6R46 N-Channel Enhancement Mode Field Effect Transistor PRELIMINARY FEATURES 60V, 87A, R DS(ON) = 5.5mΩ @VGS = 10V. Super high dense cell design for extremely low RDS(ON). D D D D 8 7 6 5 1 S 2 S 3 S 4 G High power and current handing capability. Lead-free plating ; RoHS compliant. Surface mount Package. D D D D G S S S PR-PACK (5*6) ABSOLUTE MAXIMUM RATINGS Parameter TA = 25 C unless otherwise noted Symbol Limit Drain-Source Voltage VDS 60 Units V Gate-Source Voltage VGS ± 20 V Drain Current-Continuous ID @TA 24 A Drain Current-Continuous 87 A Drain Current-Pulsed a ID @TC IDM @TA Drain Current-Pulsed a IDM @TC 96 348 A A Maximum Power Dissipation PD 83 W Single Pulsed Avalanche Energy e EAS IAS 162 60 mJ A TJ,Tstg -55 to 150 C Symbol Limit Units RθJC 1.5 C/W RθJA 20 C/W Single Pulsed Avalanche Current e Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient b This is preliminary information on a new product in development now . Details are subject to change without notice . 1 Rev 1. 2011.Sep http://www.cetsemi.com CEZ6R46 Electrical Characteristics Parameter TA = 25 C unless otherwise noted Symbol Test Condition Min Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA 60 Zero Gate Voltage Drain Current IDSS Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse Typ Max Units VDS = 60V, VGS = 0V 1 µA IGSSF VGS = 20V, VDS = 0V 100 nA IGSSR VGS = -20V, VDS = 0V -100 nA Off Characteristics V On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance Gate input resistance VGS(th) VGS = VDS, ID = 250µA 2 4 V mΩ RDS(on) VGS = 10V, ID =20A 4.6 Rg f=1MHz,open Drain 3 Ω 3215 pF 375 pF 215 pF 5.5 Dynamic Characteristics d Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VDS = 25V, VGS = 0V, f = 1.0 MHz Switching Characteristics d Turn-On Delay Time td(on) Turn-On Rise Time tr Turn-Off Delay Time td(off) VDD = 30V, ID = 50A, VGS = 10V, RGEN = 3.6Ω 27 54 ns 15 30 ns 58 116 ns Turn-Off Fall Time tf 15 30 ns Total Gate Charge Qg 77 100 nC Gate-Source Charge Qgs Gate-Drain Charge Qgd VDS = 48V, ID = 50A, VGS = 10V 15 nC 30 nC Drain-Source Diode Characteristics and Maximun Ratings Drain-Source Diode Forward Current b IS Drain-Source Diode Forward Voltage c VSD VGS = 0V, IS = 20A Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. e.L = 0.09mH, IAS =60A, VDD = 25V, RG = 25Ω, Starting TJ = 25 C 2 80 A 1 V CEZ6R46 100 125 25 C 80 60 ID, Drain Current (A) ID, Drain Current (A) VGS=10,9,8V VGS=6V 40 20 0 VGS=5V 0 0.5 1 1.5 0 2 -55 C 4 6 8 10 Figure 1. Output Characteristics Figure 2. Transfer Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) Ciss 2400 1600 800 Coss Crss 0 5 10 15 20 25 2.2 1.9 ID=20A VGS=10V 1.6 1.3 1.0 0.7 0.4 -100 -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature( C) Figure 3. Capacitance Figure 4. On-Resistance Variation with Temperature VDS=VGS ID=250µA 1.1 1.0 0.9 0.8 0.7 0.6 -50 TJ=125 C VGS, Gate-to-Source Voltage (V) IS, Source-drain current (A) C, Capacitance (pF) VTH, Normalized Gate-Source Threshold Voltage 25 VDS, Drain-to-Source Voltage (V) 3200 1.2 50 0 4000 1.3 75 2 4800 0 100 -25 0 25 50 75 100 125 150 VGS=0V 10 1 10 0 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) VSD, Body Diode Forward Voltage (V) Figure 5. Gate Threshold Variation with Temperature Figure 6. Body Diode Forward Voltage Variation with Source Current 3 10 VDS=48V ID=50A 8 6 4 2 0 0 10 3 10 2 10 1 10 0 10 -1 RDS(ON)Limit ID, Drain Current (A) VGS, Gate to Source Voltage (V) CEZ6R46 20 40 60 80 100 10ms 100ms 1s DC TA=25 C TJ=150 C Single Pulse 10 -2 10 -1 10 0 10 1 10 Qg, Total Gate Charge (nC) VDS, Drain-Source Voltage (V) Figure 7. Gate Charge Figure 8. Maximum Safe Operating Area VDD t on V IN RL D VGS RGEN toff tr td(on) td(off) tf 90% 90% VOUT VOUT 10% INVERTED 10% G 90% S VIN 50% 50% 10% PULSE WIDTH Figure 10. Switching Waveforms Figure 9. Switching Test Circuit r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 10 0.2 -1 0.1 0.05 10 PDM 0.02 0.01 -2 t1 Single Pulse 10 -3 10 -4 t2 1. RθJA (t)=r (t) * RθJA 2. RθJA=See Datasheet 3. TJM-TA = P* RθJA (t) 4. Duty Cycle, D=t1/t2 10 -3 10 -2 10 -1 10 0 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4 10 1 10 2 2