F1LC10 Data sheet Bluetooth 4.1 Low Energy Confidential / Preliminary Documentation Revision 1.0 www.f1-media.com [email protected] List of contents 1. General Part 1.1 Overview 1.2 General Features 1.3 Internal Block Diagram 2. Package Information 2.1 Signal Layout, Views 2.2 Terminal Functions 3. Electrical Specifications 3.1 Absolute Maximum Ratings 3.2 Recommended Operating Conditions 3.3 Current consumption 3.4 Digital Terminals 3.5 AIO 3.5.1 Auxiliary ADC 3.5.2 Auxiliary DAC 3.6 ESD Protection 4. Applications 4.1 LED Flasher / PWM Module 4.2 Temperature Sensor 4.3 Battery Monitor 4.4 UART Interface 4.4.1 UART Configuration While in Deep Sleep 4.5 SPI Master Interface 4.6 Programming and Debug Interface 4.6.1 Multi-slave Operation 4.7 Reset 4.7.1 Digital Pin States on Reset 4.7.2 Power-on Reset 5. Dimension (Top view) 6. PCB Layout (Top view) 7. Reflow Temperature Profile 8. PACKING INFORMATION 9. REVISION HISTORY www.f1-media.com [email protected] 1. General Part 1.1 Overview The F1LC10 Bluetooth module, which built in a CSR1010 Bluetooth chip, is a single mode μ-Energy platform device. μ-Energy enables ultra low-power connectivity and basic data transfer for applications previously limited by the power consumption, size constraints and complexity of other wireless standards. The F1LC10 Bluetooth module complies with Bluetooth specification version 4.1. It supports profiles for health and fitness sensors, watches, keyboards, mice and remote controls. It integrates RF, Baseband controller, antenna, etc. And it also provides UART interface, programmable I/O, etc. 1.2 General Features ‣ Small overall dimension : 13.0 X 10.0 X 1.6 ± 0.05 mm ‣ Bluetooth Specification V4.1 LE (Low Energy) ‣ Integrated switch-mode power supply ‣ Built-in chip Antenna ‣ Physical connection as SMD type ‣ 128KB Memory; 64KB RAM and 64KB ROM ‣ EEPROM ‣ 12 Digital PIOs and 3 analogue AIOs ‣ 32KHz and 16MHz crystal or system clock ‣ Security including AES Encryption ‣ Wake-up interrupt and watchdog timer ‣ I 2C and SPI peripherals ‣ 4 PWMs ‣ Stack including ATT, GATT, L2CAP, SM E2PROM FILTER 1.3 Internal Block Diagram UART Serial Flash CSR1010 16MHz PIO/AIO I2C SPI for Debug 32KHz www.f1-media.com [email protected] 2. Package Information 2.1 Signal Layout, Views (Top View) www.f1-media.com [email protected] 2.2 Terminal Functions PIN UART Serial Flash I2C PIO & AIO SPI Description TXD/PIO0 9 UART TX or PIO RXD/PIO1 10 UART RX or PIO PIO3/SF_DIN 11 PIO or Serial Flash Data Input PIO4/SF_CS# 14 PIO or Serial Flash Chip Select SDA/SF_DOUT 26 I2C data in/out or Serial Flash Data Output SCL/SF_CLK 25 I2C clock or Serial Flash clock Output PIO2 24 PIO9 20 PIO10 21 PIO11 22 AIO0 8 AIO1 7 AIO2 6 MOSI/PIO7 17 CLK/PIO5 15 MISO/PIO8 19 CSB/PIO6 16 SPI_PIO# 23 ANT 35 GND Other Pins Name Debug_SPI or PIO If SPI_PIO is high, 15,16,17,19 is Debug_SPI 1,2,3,4,5,12,13,29,30,31,32,33,34,36,37 VDD_PADS 18 +3V input VBAT 27 Battery input WAKE 28 Input to wake F1LC10 from hibernate or dormant www.f1-media.com [email protected] 3. Electrical Specifications 3.1 Absolute Maximum Ratings Rating Min Max Unit Storage temperature -40 85 ℃ Battery (VDD_BAT) operation 1.8 4.4 V I/O supply voltage -0.4 4.4 V VSS - 0.4 VDD + 0.4 V Other terminal voltages(a) (a) VDD = Terminal Supply Domain 3.2 Recommended Operating Conditions Operating Condition Min Typ Max Unit Operating temperature range -30 85 ℃ Battery (VDD_BAT) operation(a) 1.8 3.6 V I/O supply voltage (VDD_PADS)(b) 1.2 3.6 (a) CSR1010 QFN is reliable and qualifiable to 4.3V (idle, active and deep sleep modes) and 3.8V (all modes), but there are minor deviations in performance relative to published performance values for 1.8V to 3.6V. For layout guidelines for 4.3V operation. (b) Safe to 4.3V if VDD_BAT = 4.3V. 3.3 Current consumption CSR1010 QFN total typical current consumption measured at the battery. ( When VCC = 3V ) Mode Description Total Typical Current at 3V Dormant All functions are shut down. To wake them up, toggle the WAKE pin. <900nA Hibernate VDD_PADS = ON, REFCLK = OFF, SLEEPCLK = ON, VDD_BAT = ON <1.9μA VDD_PADS = ON, REFCLK = OFF, SLEEPCLK = ON, Deep sleep VDD_BAT = ON, RAM = ON, digital circuits = ON, <5μA SMPS = ON (low-power mode), 2.2ms wake-up time Idle RX / TX active VDD_PADS = ON, REFCLK = ON, SLEEPCLK = ON,VDD_BAT = ON, RAM = ON, digital circuits = ON,MCU = IDLE, <1μs wake-up time ~1mA ~16mA @ 3V peak current www.f1-media.com [email protected] 3.4 Digital Terminals Input Voltage Levels VIL input logic level low VIH input logic level high Tr/Tf Min Typ Max Unit -0.4 - 0.3 x VDD_PADS V 0.7 x VDD_PADS - VDD_PADS + 0.4 V - - 25 ns Output Voltage Levels Min Typ Max Unit - - 0.4 V 0.75 x VDD_PADS - - V - - 5 ns VOL output logic level low, lOL = 4.0mA VOH output logic level high, lOH = -4.0mA Tr/Tf Input and Tristate Currents Min Typ Min Typ Max Unit With strong pull-up -150 -40 -10 μA I²C with strong pull-up -250 - - μA With strong pull-down 10 40 150 μA With weak pull-up -5.0 -1.0 -1.0 μA With weak pull-down 0.33 1.0 5.0 μA CI input capacitance 1.0 - 5.0 pF Min Typ Max Unit Input voltage 0 - VDD_AUX V Output voltage 0 - VDD_AUX V Min Typ Max Unit Resolution - - 10 Bits Input voltage range(a) 0 - VDD_AUX V 3.5 AIO Input / Output Voltage Levels 3.5.1 Auxiliary ADC Auxiliary ADC Accuracy INL -1 - 1 LSB (Guaranteed monotonic) DNL 0 - 1 LSB -1 - 1 LSB -0.8 - 0.8 % - kHz Offset Gain error Input bandwidth - Conversion time 1.38 1.69 2.75 μs - - 700 Samples/s Sample rate(b) www.f1-media.com [email protected] 3.5.2 Auxiliary DAC Auxiliary DAC Min Typ Max Unit - - 10 Bits 1.30 1.35 1.40 V 0 - VDD_AUX V 1.30 1.35 1.40 V 0 1.32 2.64 mV -1.32 0 1.32 mV Integral non-linearity -1 0 1 LSB Settling time - - 250 ns Resolution Supply voltage, VDD_ANA Output voltage range Full-scale output voltage LSB size Offset Important Note : Access to the auxiliary DAC is firmware-dependent, 3.6 ESD Protection ESD Handling Ratings Condition Class Max Rating Human Body Model Contact Discharge per JEDEC EIA/JESD22-A114 2 2000V (all pins) Charged Device Model Contact Discharge per JEDEC EIA/JESD22-C101 III 500V (all pins) www.f1-media.com [email protected] 4. Applications 4.1 LED Flasher / PWM Module CSR1010 QFN contains a LED flasher / PWM module that works in sleep modes. These functions are controlled by the on-chip firmware.. 4.2 Temperature Sensor CSR1010 QFN contains a temperature sensor that measures the temperature of the die to an accuracy of 1 °C. 4.3 Battery Monitor CSR1010 QFN contains an internal battery monitor that reports the battery voltage to the software. 4.4 UART Interface The CSR1010 QFN UART interface provides a simple mechanism for communicating with other serial devices using the RS232 protocol. 2 signals implement the UART function, UART_TX and UART_RX. When CSR1010 QFN is connected to another digital device, UART_RX and UART_TX transfer data between the 2 devices. UART configuration parameters, e.g. baud rate and data format, are set using CSR1010 QFN firmware. When selected in firmware PIO[0] is assigned to a UART_TX output and PIO[1] is assigned to a UART_RX input, Note: To communicate with the UART at its maximum data rate using a standard PC, the PC requires an accelerated serial port adapter card 4.4.1 UART Configuration While in Deep Sleep The maximum baud rate is 2400 baud during deep sleep. 4.5 SPI Master Interface The SPI master memory interface in the CSR1010 QFN is overlaid on the I²C interface and uses a further 3 PIOs for the extra pins, SPI Flash Interface Pin Flash_VDD PIO[2] SF_DIN PIO[3] SF_CS# PIO[4] SF_CLK I2C_SCL SF_DOUT I2C_SDA Note: If an application using CSR1010 QFN is designed to boot from SPI serial flash, it is possible for the firmware to map the I²C interface to alternative PIOs. www.f1-media.com [email protected] Device Starts Hardware copies content of ROM to RAM Hardware checks i2c interface (default Pins) Hardware checks SPI interface (default Pins) No Presence of SPI Serial Flash Device Yes Presence of E2PROM Yes Copy content of E2PROM to RAM Copy content of SPI Serial Flash to RAM Start MCU executing from RAM Memory Boot-up Sequence 4.6 Programming and Debug Interface Important Note: The CSR1010 QFN debug SPI interface is available in SPI slave mode to enable an external MCU to program and control the CSR1010 QFN, generally via libraries or tools supplied by CSR. The protocol of this interface is proprietary. The 4 SPI debug lines directly support this function. The SPI programs, configures and debugs the CSR1010 QFN. It is required in production. Ensure the 4 SPI signals are brought out to either test points or a header. Take SPI_PIO#_SEL high to enable the SPI debug feature on PIO[8:5]. CSR1010 QFN uses a 16-bit data and 16-bit address programming and debug interface. Transactions occur when the internal processor is running or is stopped. Data is written or read one word at a time, or the auto-increment feature is available for block access. 4.6.1 Multi-slave Operation Do not connect the CSR1010 QFN in a multi-slave arrangement by simple parallel connection of slave MISO lines. When CSR1010 QFN is deselected (DEBUG_CS# = 1), the DEBUG_MISO line does not float. Instead, CSR1010 QFN outputs 0 if the processor is running or 1 if it is stopped. www.f1-media.com [email protected] 4.7 Reset CSR1010 QFN is reset by: ■ Power-on reset ■ Software-configured watchdog timer 4.7.1 Digital Pin States on Reset Table shows the pin states of CSR1010 QFN on reset. PU and PD default to weak values unless specified otherwise. Pin Name / Group On Reset I2C_SDA Strong PU I2C_SCL Strong PU PIO[11:0] Weak PD Pin States on Reset 4.7.2 Power-on Reset Table shows how the power-on reset occurs. Power-on Reset Typ Reset release on VDD_CORE rising 1.05 Reset assert on VDD_CORE falling 1.00 Reset assert on VDD_CORE falling (Sleep mode) 0.60 Hysteresis 50 Unit V mV Power-on Reset www.f1-media.com [email protected] 5. Dimension (Top view) www.f1-media.com [email protected] 6. PCB Layout (Top view) www.f1-media.com [email protected] 7. Reflow Temperature Profile Recommended solder reflow profile are shown in below and follow the lead-free profile in accordance with JEDEC Std 20C. Table lists the critical reflow temperatures. Flux residue remaining from board assembly can contribute to electrochemical migration (ECM) over time. This depends on a number of factors, including flux type, amount of flux residue remaining after reflow, and stress conditions during product use, such as temperature, humidity, and potential difference between pins. Care should be taken in selecting production board/module assembly processes Temperature (degree) and materials, taking into account these factors. Max. 260 degree Min. 230 degree 220 180 150 Max. 60 sec. Min. 120 sec. Max. 30 sec. Min.90 sec. Time < Figure : Recommended Pb-Free Reflow Profile > < Table : Recommended Critical Reflow Parameters > Process Step Lead-Free Solder Ramp rate 3°C/sec Preheat Max. 150°C to 180°C, 60 to 180 sec Time above liquidus +220°C 30 to 90 sec Peak temperature +255°C ±5°C Time within 5°C of peak temperature 10 to 20 sec Ramp-down rate 6°C/sec max www.f1-media.com [email protected] 8. PACKING INFORMATION T.B.D 9. REVISION HISTORY Revision Date 01 03.17.15 Change Descriptions First revision Issued by Landrover www.f1-media.com [email protected]