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TXS0108E
SCES642C – DECEMBER 2007 – REVISED DECEMBER 2014
TXS0108E 8-Bit Bidirectional Voltage-Level Translator for Open-Drain and Push-Pull
Applications
1 Features
3 Description
•
•
This 8-bit noninverting translator uses two separate
configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed to
track VCCB. VCCB accepts any supply voltage from
1.65 V to 5.5 V. This allows for low-voltage
bidirectional translation between any of the 1.2-V,
1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
1
•
•
•
•
•
No Direction-Control Signal Needed
Max Data Rates
– 60 Mbps (Push Pull)
– 2 Mbps (Open Drain)
1.2 V to 3.6 V on A Port and 1.65 V to 5.5 V on B
Port (VCCA ≤ VCCB)
No Power-Supply Sequencing Required – Either
VCCA or VCCB Can Be Ramped First
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22 (A Port)
– 2000-V Human Body Model (A114-B)
– 150-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
IEC 61000-4-2 ESD (B Port)
– ±8-kV Contact Discharge
– ±6-kV Air-Gap Discharge
2 Applications
•
•
•
•
Handsets
Smartphones
Tablets
Desktop PCs
When the output-enable (OE) input is low, all outputs
are placed in the high-impedance (Hi-Z) state.
To ensure the Hi-Z state during power up or power
down, OE should be tied to GND through a pulldown
resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
Device Information(1)
PART NUMBER
TXS0108E
PACKAGE
BODY SIZE (NOM)
TSSOP (20)
6.50 mm × 6.40 mm
VQFN (20)
4.50 mm × 3.50 mm
UFBGA (20)
3.00 mm × 2.50 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application Block Diagram for TXS010x
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TXS0108E
SCES642C – DECEMBER 2007 – REVISED DECEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
1
1
1
2
3
4
Absolute Maximum Ratings ..................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions ...................... 5
Thermal Information .................................................. 5
Electrical Characteristics .......................................... 6
Timing Requirements: VCCA = 1.2 V ........................ 7
Timing Requirements: VCCA = 1.5 V ± 0.1 V ............ 7
Timing Requirements: VCCA = 1.8 V ± 0.15 V .......... 7
Timing Requirements: VCCA = 2.5 V ± 0.2 V ............ 7
Timing Requirements: VCCA = 3.3 V ± 0.3 V .......... 7
Switching Characteristics: VCCA = 1.2 V ................. 8
Switching Characteristics: VCCA = 1.5 V ± 0.1 V .... 8
Switching Characteristics: VCCA = 1.8 V ± 0.15 V .. 9
Switching Characteristics: VCCA = 2.5 V ± 0.2 V .... 9
Switching Characteristics: VCCA = 3.3 V ± 0.3 V .. 10
6.16 Operating Characteristics...................................... 11
6.17 Typical Characteristics .......................................... 11
7
8
Parameter Measurement Information ................ 13
Detailed Description ............................................ 14
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
14
14
15
16
Application and Implementation ........................ 17
9.1 Application Information............................................ 17
9.2 Typical Application ................................................. 17
10 Power Supply Recommendations ..................... 19
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 19
12 Device and Documentation Support ................. 20
12.1 Trademarks ........................................................... 20
12.2 Electrostatic Discharge Caution ............................ 20
12.3 Glossary ................................................................ 20
13 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
Changes from Revision B (November 2013) to Revision C
•
2
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
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SCES642C – DECEMBER 2007 – REVISED DECEMBER 2014
5 Pin Configuration and Functions
PW PACKAGE
(TOP VIEW)
ZXY PACKAGE
(BOTTOM VIEW)
1
2
3
4
A1
VCCA
1
20
2
19
A2
A3
A4
A5
A6
A7
A8
OE
3
18
4
17
5
16
6
15
7
14
8
13
5
D
C
B
A
9
12
10
11
B1
VCCB
B2
B3
B4
B5
B6
B7
B8
GND
B1
1
20
2
19
3
18
4
5
6
7
17
Exposed
Center
Pad
16
15
14
13
8
12
10
11
GND
9
OE
VCCA
A2
A3
A4
A5
A6
A7
A8
A1
The exposed center pad, if used, must be connected as a secondary ground or left electrically open.
RGY PACKAGE
(TOP VIEW)
VCCB
B2
B3
B4
B5
B6
B7
B8
Pin Assignments
1
2
3
4
5
D
VCCB
B2
B4
B6
B8
C
B1
B3
B5
B7
GND
B
A1
A3
A5
A7
OE
A
VCCA
A2
A4
A6
A8
Pin Functions
PIN
TYPE
DESCRIPTION
PW, RGY
NO.
ZXY NO.
A1
1
B1
I/O
VCCA
2
A1
S
A2
3
A2
I/O
Input/output 2. Referenced to VCCA
A3
4
B2
I/O
Input/output 3. Referenced to VCCA
A4
5
A3
I/O
Input/output 4. Referenced to VCCA
A5
6
B3
I/O
Input/output 5. Referenced to VCCA
A6
7
A4
I/O
Input/output 6. Referenced to VCCA
A7
8
B4
I/O
Input/output 7. Referenced to VCCA
A8
9
A5
I/O
Input/output 8. Referenced to VCCA
OE
10
B5
I
3-state output-mode enable. Pull OE low to place all outputs in 3-state mode.
Referenced to VCCA.
GND
11
C5
S
Ground
B8
12
D5
I/O
NAME
Input/output 1. Referenced to VCCA
A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V, VCCA ≤ VCCB.
Input/output 8. Referenced to VCCB
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Pin Functions (continued)
PIN
TYPE
DESCRIPTION
PW, RGY
NO.
ZXY NO.
B7
13
C4
I/O
Input/output 7. Referenced to VCCB
B6
14
D4
I/O
Input/output 6. Referenced to VCCB
B5
15
C3
I/O
Input/output 5. Referenced to VCCB
B4
16
D3
I/O
Input/output 4. Referenced to VCCB
B3
17
C2
I/O
Input/output 3. Referenced to VCCB
B2
18
D2
I/O
Input/output 2. Referenced to VCCB
VCCB
19
D1
S
B1
20
C1
I/O
Input/output 1. Referenced to VCCB
Thermal
Pad
—
—
—
For the RGY package, the exposed center thermal pad must be connected to
ground
NAME
B-port supply voltage. 1.65 V ≤ VCCB ≤ 5.5 V.
6 Specifications
6.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
MIN
MAX
UNIT
–0.5
4.6
V
–0.5
5.5
V
A port
–0.5
4.6
B port
–0.5
6.5
A port
–0.5
4.6
B port
–0.5
6.5
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
Supply voltage
VI
Input voltage (2)
VO
Voltage range applied to any output
in the high-impedance or power-off state (2)
VO
Voltage range applied to any output in the high or low state (2)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
–50
50
mA
Continuous current through VCCA, VCCB, or GND
–100
100
mA
Storage temperature
–65
150
°C
Tstg
(1)
(2)
(3)
(3)
V
V
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
4
Electrostatic discharge
(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
Machine model (MM)
±150
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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SCES642C – DECEMBER 2007 – REVISED DECEMBER 2014
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1) (2)
VCCA
VCCA
VCCB
1.2 V to 1.95 V
High-level input voltage
1.95 V to 3.6 V
B-Port I/Os
1.2 V to 3.6 V
OE
1.2 V to 1.95 V
A-Port I/Os
VIL
Low-level input voltage
1.95 V to 3.6 V
B-Port I/Os
OE
1.65 V to 5.5 V
1.65 V to 5.5 V
MIN
MAX
1.2
3.6
1.65
5.5
VCCI – 0.2
VCCI
VCCI – 0.4
VCCI
VCCI – 0.4
VCCI
Supply voltage (3)
A-Port I/Os
VIH
VCCB
VCCA × 0.65
5.5
0
0.15
0
0.15
0
0.15
0
VCCA × 0.35
1.65 V to 5.5 V
1.2 V to 3.6 V
1.65 V to 5.5 V
1.2 V to 3.6 V
1.65 V to 5.5 V
UNIT
V
V
V
A-Port I/Os pushpull driving
Δt/Δv
Input transition rise or fall
rate
TA
Operating free-air
temperature
B-Port I/Os pushpull driving
10
ns/V
85
°C
Control input
(1)
(2)
(3)
–40
VCCI is the VCC associated with the data input port.
VCCO is the VCC associated with the output port.
VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
6.4 Thermal Information
TXS0108E
THERMAL METRIC (1)
PW
RGY
ZXY
20 PINS
20 PINS
20 PINS
RθJA
Junction-to-ambient thermal resistance
101.5
34.7
101.5
RθJC(top)
Junction-to-case (top) thermal resistance
35.9
39.5
35.9
RθJB
Junction-to-board thermal resistance
52.4
12.7
52.4
ψJT
Junction-to-top characterization parameter
2.3
0.9
2.3
ψJB
Junction-to-board characterization parameter
51.9
12.7
51.9
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
7.5
—
(1)
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics (1) (2) (3)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
IOH = –20 μA,
VIB ≥ VCCB – 0.4 V
VOHA
VOLA
VCCB
1.2 V
1.4 V to 3.6 V
IOZ
IOL = 300 μA,
VIB ≤ 0.15 V
2.3 V
0.4
IOL = 400 μA,
VIB ≤ 0.15 V
3V
0.55
VI = VCCI or GND
0.4
1.2 V
1.4 V to 3.6 V
0.4
3V
0.55
4.5 V
0.55
V
–1
1
1.5
2
μA
–2
2
μA
–2
2
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
2.3 V to 5.5 V
2
3.6 V
0V
2
0V
5.5 V
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
2.3 V to 5.5 V
6
3.6 V
0V
–1
0V
5.5 V
ICCZB
VI = VO = Open,
IO = 0, OE = GND
1.4 V to 3.6 V
6
2.3 V
1.65 V to 5.5 V
1.4 V to 3.6 V
(1)
(2)
(3)
0.4
1.2 V
VI = VO = Open,
IO = 0, OE = GND
B port
1.65 V
1
1.2 V
1.2 V
1.2 V
3.3 V
3.3 V
V
V
VCCB × 0.67
–1
ICCZA
Cio
VCCB × 0.67
1.65 V to 5.5 V
1.65 V to 5.5 V
1.4 V to 3.6 V
A port
0.4
1.2 V
VI = VCCI or GND,
IO = 0
OE
1.65 V to 5.5 V
1.2 V to 3.6 V
ICCA + ICCB
Ci
UNIT
V
VCCA × 0.67
1.65 V
VI = VO = Open,
IO = 0
ICCB
VCCA × 0.67
1.65 V to 5.5 V
IOL = 220 μA,
VIB ≤ 0.15 V
VI = VO = Open,
IO = 0
ICCA
MAX
0.25
IOL = 620 μA,
VIA ≤ 0.15 V
A or
B port
MIN
1.4 V
IOL = 400 μA,
VIA ≤ 0.15 V
OE
MAX
IOL = 180 μA,
VIB ≤ 0.15 V
IOL = 300 μA,
VIA ≤ 0.15 V
II
–40°C to 85°C
TYP
1.2 V
IOL = 220 μA,
VIA ≤ 0.15 V
VOLB
TA = 25°C
MIN
IOL = 135 μA,
VIB ≤ 0.15 V
IOH = –20 μA,
VIA ≥ VCCA – 0.2 V
VOHB
VCCA
2.3 V to 5.5 V
1.65 V to 5.5 V
1.65 V to 5.5 V
3.3 V
3.3 V
μA
–1
1.5
μA
1
3
8
0.05
2
4
6
4.5
5.5
6
7
5.5
6
μA
μA
μA
pF
pF
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
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6.6 Timing Requirements: VCCA = 1.2 V
TA = 25°C, VCCA = 1.2 V
Data rate
tw
Pulse duration
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
TYP
TYP
TYP
TYP
Push-pull driving
20
20
20
20
Open-drain driving
2
2
2
2
50
50
50
50
500
500
500
500
Push-pull driving
Data inputs
Open-drain driving
UNIT
Mbps
ns
6.7 Timing Requirements: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
VCC B = 1.8 V
± 0.15 V
MIN
Data rate
MAX
Push-pull driving
Pulse duration
Push-pull driving
Data inputs
Open-drain driving
MIN
MAX
VCC B= 3.3 V
± 0.3 V
MIN
VCC B= 5 V
± 0.5 V
MAX
MIN
UNIT
MAX
40
60
60
50
2
2
2
2
Open-drain driving
tw
VCC B = 2.5 V
± 0.2 V
25
16.7
16.7
20
500
500
500
500
Mbps
ns
6.8 Timing Requirements: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
VCC B = 1.8 V
± 0.15 V
MIN
Data rate
Push-pull driving
Open-drain driving
tw
Pulse duration
Push-pull driving
Open-drain driving
Data inputs
VCC B = 2.5 V
± 0.2 V
VCC B= 3.3 V
± 0.3 V
VCC B= 5 V
± 0.5 V
MIN
UNIT
MAX
MIN MAX
MIN MAX
40
60
60
60
2
2
2
2
25
16.7
16.7
16.7
500
500
500
500
MAX
Mbps
ns
6.9 Timing Requirements: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
VCCB = 2.5 V
± 0.2 V
MIN
Data rate
tw
Pulse duration
Push-pull driving
VCCB = 3.3 V
± 0.3 V
MAX
Open-drain driving
Data inputs
MAX
MIN
UNIT
MAX
60
60
60
2
2
2
Open-drain driving
Push-pull driving
MIN
VCC = 5 V
± 0.5 V
16.7
16.7
16.7
500
500
500
Mbps
ns
6.10 Timing Requirements: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
VCCB = 3.3 V
± 0.3 V
MIN
Data rate
tw
Pulse duration
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Data inputs
VCC = 5 V
± 0.5 V
MAX
MIN
UNIT
MAX
60
60
2
2
16.7
16.7
500
500
Mbps
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6.11 Switching Characteristics: VCCA = 1.2 V
over recommended operating free-air temperature range, VCCA = 1.2 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPHL
A
B
tPLH
tPHL
B
A
ten
OE
A or B
tdis
OE
A or B
tPLH
trA
A-port rise time
trB
B-port rise time
tfA
A-port fall time
tfB
B-port fall time
tSK(O)
Channel-to-channel
skew
Max data rate
A or B
TEST
CONDITIONS
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
TYP
TYP
TYP
TYP
UNIT
Push-pull driving
6.5
5.9
5.7
5.5
Open-drain driving
11.9
11.1
11.0
11.1
Push-pull driving
7.1
6.3
6.2
6.6
Open-drain driving
293
236
197
152
Push-pull driving
6.4
6
5.8
5.6
Open-drain driving
8.5
6.8
6.2
5.9
Push-pull driving
5.6
4.1
3.6
3.2
Open-drain driving
312
248
192
132
200
200
200
200
ns
ns
Push-pull driving
16.8
13.9
13.2
13.5
Push-pull driving
7.9
6.7
6.5
6.4
Open-drain driving
296
238
185
127
Push-pull driving
6.3
3.3
1.8
1.5
Open-drain driving
236
164
115
60
Push-pull driving
5.8
4.8
4.3
3.8
Open-drain driving
5.9
4.7
4.1
3.5
Push-pull driving
4.6
2.8
2.2
1.9
Open-drain driving
4.5
2.7
2.2
1.9
1
1
1
1
Push-pull driving
20
20
20
20
Open-drain driving
2
2
2
2
Push-pull driving
ns
ns
ns
ns
ns
ns
Mbps
6.12 Switching Characteristics: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.8 V
± 0.15 V
MIN MAX
Push-pull driving
tPHL
A
B
tPLH
Open-drain driving
4
A
tPLH
Open-drain driving
182
ten
OE
A or B
tdis
OE
A or B
trA
A-port rise time
trB
B-port rise time
14.4
720
3.4
13.2
3.6
Push-pull driving
745
MIN
12.8
3.5
10
143
554
3.1
9.6
114
603
MAX
MIN MAX
8.6
8.6
12.2
3.5
473
2.8
8.5
81
519
UNIT
ns
384
12
2.5
5.1
118
12
9.7
11
6.2
147
VCCB = 5 V
± 0.5 V
9.8
11.1
9.5
186
MAX
VCCB = 3.3 V
± 0.3 V
9.2
12.7
Push-pull driving
Open-drain driving
MIN
12
Push-pull driving
B
VCCB = 2.5 V
± 0.2 V
11
Push-pull driving
Open-drain driving
tPHL
8
TEST
CONDITIONS
7.5
1.6
84
ns
407
200
200
200
200
ns
28.1
22
20.1
19.6
ns
Push-pull driving
3.5
13.1
3
9.8
3.1
9
3.2
8.3
Open-drain driving
147
982
115
716
92
592
66
481
Push-pull driving
2.9
11.4
1.9
7.4
0.9
4.7
0.7
2.6
Open-drain driving
135 1020
91
756
58
653
20
370
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ns
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Switching Characteristics: VCCA = 1.5 V ± 0.1 V (continued)
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tfA
A-port fall time
tfB
B-port fall time
tSK(O)
Channel-to-channel
skew
Max data rate
A or B
TEST
CONDITIONS
VCCB = 1.8 V
± 0.15 V
MIN MAX
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
UNIT
MIN MAX
Push-pull driving
2.3
9.9
1.7
7.7
1.6
6.8
1.7
6
Open-drain driving
2.4
10
2.1
7.9
1.7
7
1.5
6.2
2
8.7
1.3
5.5
0.9
3.8
0.8
3.1
1.2
11.5
1.3
8.6
1
9.6
0.5
7.7
1
1
1
Push-pull driving
Open-drain driving
Push-pull driving
Push-pull driving
1.1
1
40
60
60
50
2
2
2
2
Open-drain driving
ns
ns
Mbps
6.13 Switching Characteristics: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
VCCB = 1.8 V
± 0.15 V
MIN
MAX
3.6
11.4
Push-pull driving
tPHL
A
Open-drain driving
B
Open-drain driving
194
B
Open-drain driving
A
Push-pull driving
tPLH
Open-drain driving
ten
OE
A or B
tdis
OE
A or B
trA
A-port rise time
trB
B-port rise time
tfA
A-port fall time
B-port fall time
tSK(O)
Channel-to-channel skew
Max data rate
90
346
2.1
6.2
7.4
8.5
159
6.3
466
2.5
5.8
578
129
5
459
93
200
200
200
200
ns
25.1
18.8
16.5
15.3
ns
2.6
8.6
2.7
7.8
2.8
7.2
Open-drain driving
155
996
124
691
100
508
72
350
Push-pull driving
2.8
10.5
1.8
7.2
1.2
5.2
0.7
2.7
Open-drain driving
132
1001
106
677
73
546
32
323
Push-pull driving
2.1
8.8
1.6
6.6
1.4
5.7
1.4
4.9
Open-drain driving
2.2
9
1.7
6.7
1.4
5.8
1.2
5.2
2
8.3
1.3
5.4
0.9
3.9
0.7
3
0.8
10.5
0.7
10.7
1
9.6
0.6
7.8
Push-pull driving
1
1
1
1
40
60
60
60
2
2
2
2
Open-drain driving
ns
323
11.9
Push-pull driving
ns
7
7.3
7
733
8.9
3.1
Open-drain driving
A or B
2.8
3.1
Push-pull driving
Push-pull driving
tfB
126
UNIT
MAX
5.6
9.3
6.5
584
10.2
Push-pull driving
3.1
8
12.1
MIN
5.7
9.9
155
VCCB = 5 V
± 0.5 V
MAX
2.1
729
197
MIN
6.4
3.2
9.8
3.4
VCCB = 3.3 V
± 0.3 V
MAX
9
Push-pull driving
tPHL
MIN
8.2
Push-pull driving
tPLH
VCCB = 2.5 V
± 0.2 V
ns
ns
ns
ns
Mbps
6.14 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
VCCB = 2.5 V
± 0.2 V
MIN MAX
Push-pull driving
tPHL
A
B
tPLH
Open-drain driving
6.9
MAX
2.3
6.3
592
3.7
2.2
4.3
125
488
5.8
3.9
93
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368
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UNIT
MIN MAX
4
5.2
149
VCCB = 5 V
± 0.5 V
MIN
5
2.4
Push-pull driving
Open-drain driving
VCCB = 3.3 V
± 0.3 V
9
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Switching Characteristics: VCCA = 2.5 V ± 0.2 V (continued)
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
VCCB = 2.5 V
± 0.2 V
MIN MAX
Push-pull driving
tPHL
Open-drain driving
B
A
ten
OE
A or B
tdis
OE
A or B
Open-drain driving
150
trA
A-port rise time
trB
B-port rise time
tfA
A-port fall time
tfB
B-port fall time
tSK(O)
Channel-to-channel skew
Max data rate
A or B
Open-drain driving
VCCB = 5 V
± 0.5 V
MAX
2.2
4.2
6
1.8
4.9
4.4
595
126
3.5
481
200
94
12.9
200
ns
11.2
ns
2
7.3
2.1
6.4
2.2
5.8
110
692
93
529
68
369
Push-pull driving
1.8
6.5
1.3
5.1
0.7
3.4
Open-drain driving
107
693
79
483
41
304
Push-pull driving
1.5
5.7
1.2
4.7
1.3
3.8
Open-drain driving
1.5
5.6
1.2
4.7
1.1
4
Push-pull driving
1.4
5.4
0.9
4.1
0.7
3
Open-drain driving
0.4
14.2
0.5
19.4
0.4
3
Push-pull driving
Push-pull driving
Open-drain driving
1
1.2
1
60
60
60
2
2
2
ns
345
200
15.7
UNIT
MIN MAX
4.7
7.3
5.9
Push-pull driving
Push-pull driving
MIN
5.4
2.5
Push-pull driving
tPLH
VCCB = 3.3 V
± 0.3 V
ns
ns
ns
ns
Mbps
6.15 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 3.3 V
± 0.3 V
MIN
Push-pull driving
tPHL
A
B
tPLH
Open-drain driving
B
A
ten
OE
A or B
tdis
OE
A or B
tPLH
111
trA
A-port rise time
trB
B-port rise time
tfA
A-port fall time
tfB
B-port fall time
tSK(O)
Channel-to-channel skew
Max data rate
A or B
MIN
5.3
439
2.1
5.5
449
87
352
4.5
4.3
86
11.9
200
ns
9.8
ns
1.8
5.7
1.9
5
Open-drain driving
75
446
57
337
Push-pull driving
1.5
5
1
3.6
Open-drain driving
72
427
40
290
Push-pull driving
1.2
4.5
1.1
3.5
Open-drain driving
1.1
4.4
1
3.7
Push-pull driving
1.1
4.2
0.8
3.1
1
4.2
0.8
3.1
Push-pull driving
Push-pull driving
Open-drain driving
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1
1
60
60
2
2
ns
339
Push-pull driving
Open-drain driving
ns
3.8
1.7
200
Push-pull driving
4.8
3.5
3.8
112
UNIT
MAX
3.1
1.9
4.2
Push-pull driving
Open-drain driving
MAX
3.9
Push-pull driving
Open-drain driving
VCCB = 5 V
± 0.5 V
3.8
2
Push-pull driving
Open-drain driving
tPHL
10
TEST
CONDITIONS
ns
ns
ns
ns
Mbps
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6.16 Operating Characteristics
TA=25°C
VCCA
1.2 V
PARAMETER
1.2 V
CpdB
CpdA
CpdB
1.8 V
2.5 V
2.5 V
3.3 V
2.5 V
5V
3.3 V to 5 V
VCCB
5V
CpdA
1.5 V
TEST CONDITIONS
1.8 V
1.8 V
1.8 V
UNIT
TYP
TYP
TYP
TYP
TYP
TYP
TYP
5.9
5.7
5.9
5.9
6.7
6.9
8
10.2
10.3
9.9
9.7
9.7
9.4
9.8
29.9
22.2
21.5
20.8
21
23.4
23
B-port input,
A-port output
22.9
16.7
16.7
16.8
17.8
20.8
20.9
A-port input,
B-port output
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.06
0.01
0.01
0.01
0.01
0.01
0.01
0.06
0.01
0.01
0.01
0.01
0.03
0.02
0.06
0.01
0.01
0.01
0.01
0.03
0.02
A-port input,
B-port output
B-port input,
A-port output
A-port input,
B-port output
B-port input,
A-port output
A-port input,
B-port output
CL = 0, f = 10 MHz,
tr= tf= 1 ns,
OE = VCCA
(outputs enabled)
pF
CL = 0, f = 10 MHz,
tr= tf= 1 ns,
OE = GND
(outputs disabled)
pF
B-port input,
A-port output
0.6
0.6
0.5
0.5
Low-Level Output Voltage (V)
Low-Level Output Voltage (V)
6.17 Typical Characteristics
0.4
0.3
0.2
0.1
0.4
0.3
0.2
0.1
VCCB = 5.5V
VCCB = 2.7V
0
0
0
200
VCCA = 2.3 V
400
600
Low-Level Current (µA)
800
1000
0
200
D001
VIL(A) = 0.15 V
VCCA = 3.0 V
Figure 1. Low-Level Output Voltage (VOL(Bx)) vs Low-Level
Current (IOL(Bx))
400
600
Low-Level Current µA)
800
1000
D002
VIL(A) = 0.15 V
Figure 2. Low-Level Output Voltage (VOL(Bx)) vs Low-Level
Current (IOL(Bx))
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Typical Characteristics (continued)
Low-Level Output Voltage (V)
0.6
0.5
0.4
0.3
0.2
0.1
VCCB = 1.95 V
VCCB = 5.5 V
0
0
100
VCCA = 1.2 V
200
300
400
Low-Level Current (µA)
500
600
D003
VIL(A) = 0.15 V
Figure 3. Low-Level Output Voltage (VOL(Bx)) vs Low-Level Current (IOL(Bx))
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7 Parameter Measurement Information
VCCI
VCCO
VCCI
VCCO
DUT
IN
DUT
IN
OUT
OUT
1M
15 pF
15 pF
1M
DATA RATE, PULSE DURATION, PROPAGATION DELAY,
OUTPUT RISE AND FALL TIME MEASUREMENT USING
AN OPEN-DRAIN DRIVER
DATA RATE, PULSE DURATION, PROPAGATION DELAY,
OUTPUT RISE AND FALL TIME MEASUREMENT USING
A PUSH-PULL DRIVER
2 × VCCO
50 k
From Output
Under Test
15 pF
S1
Open
50 k
LOAD CIRCUIT FOR ENABLE/DISABLE
TIME MEASUREMENT
TEST
S1
tPZL/tPLZ
tPHZ/tPZH
2 × VCCO
Open
tw
VCCI
VCCI/2
Input
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
VCCA/2
0V
tPLZ
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VCCO/2
0.9
VCCO
0.1
VCCO
tr
VOH
VCCO/2
VOL
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VCCO/2
0.1
VCCO
VOL
tPHZ
tPZH
0.9
VOH
VCCO
VCCO/2
0V
tf
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 W, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. t PZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
J. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
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8 Detailed Description
8.1 Overview
The TXS0108E device is a directionless voltage-level translator specifically designed for translating logic voltage
levels. The A-port is able to accept I/O voltages ranging from 1.2 V to 3.6 V, while the B-port can accept I/O
voltages from 1.65V to 5.5 V. The device is a pass gate architecture with edge rate accelerators (one shots) to
improve the overall data rate. The pull-up resistors, commonly used in open-drain applications, have been
conveniently integrated so that an external resistor is not needed. While this device is designed for open-drain
applications, the device can also translate push-pull CMOS logic outputs.
8.2 Functional Block Diagram
VccB
VccA
OE
One Shot
Accelerator
One Shot
Accelerator
Gate Bias
Rpua
Rpub
A1
B1
6 channels
A2
A3
A4
A5
A6
A7
One Shot
Accelerator
One Shot
Accelerator
Gate Bias
Rpub
Rpua
One Shot
Accelerator
B2
B3
B4
B5
B6
B7
One Shot
Accelerator
Gate Bias
Rpua
Rpub
A8
B8
Each A-port I/O has a pull-up resistor (Rpua) to VCCA and each B-port I/O has a pull-up resistor (Rpub) to VCCB.
Rpua and Rpub have a value of 40 kΩ when the output is driving low. Rpua and Rpub have a value of 4 kΩ when the
output is driving high. Rpua and Rpub are disabled when OE = Low.
14
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8.3 Feature Description
8.3.1 Architecture
To address the application requirements for both push-pull and open-drain mode, a semi-buffered architecture
design is used and is illustrated below (see Figure 5). Edge-rate accelerator circuitry (for both the high-to-low and
low-to-high edges), a High-Ron n-channel pass-gate transistor (on the order of 300 Ω to 500 Ω) and pull-up
resistors (to provide DC-bias and drive capabilities) are included to realize this solution. A direction-control signal
(to control the direction of data flow from A to B or from B to A) is not needed. The resulting implementation
supports both low-speed open-drain operation as well as high-speed push-pull operation.
VCCB
VCCA
OS3
One-Shot
Rpua
Translator
Rpub
OS4
T1
One-Shot
Bias
R1
A
P2
N2
B
R2
Npass
OS1
One-Shot
P1
OS2
One-Shot
N1
Translator
T2
Figure 5. Architecture of a TXS0108 Cell
When transmitting data from A- to B-ports, during a rising edge the One-Shot (OS3) turns on the PMOS
transistor (P2) for a short-duration and this speeds up the low-to-high transition. Similarly, during a falling edge,
when transmitting data from A to B, the One-Shot (OS4) turns on NMOS transistor (N2) for a short-duration and
this speeds up the high-to-low transition. The B-port edge-rate accelerator consists of one-shots OS3 and
OS4,Transistors P2 and N2 and serves to rapidly force the B port high or low when a corresponding transition is
detected on the A port.
When transmitting data from B- to A-ports, during a rising edge the One-Shot (OS1) turns on the PMOS
transistor (P1) for a short-duration and this speeds up the low-to-high transition. Similarly, during a falling edge,
when transmitting data from B to A, the One-Shot (OS2) turns on NMOS transistor (N1) for a short-duration and
this speeds up the high-to-low transition. The A-port edge-rate accelerator consists of one-shots OS1 and OS2,
transistors P1 and N1 components and form the edge-rate accelerator and serves to rapidly force the A port high
or low when a corresponding transition is detected on the B port.
8.3.2 Input Driver Requirements
The continuous DC-current "sinking" capability is determined by the external system-level open-drain (or pushpull) drivers that are interfaced to the TXS0108E I/O pins. Because the high bandwidth of these bidirectional I/O
circuits is used to facilitate this fast change from an input to an output and an output to an input, they have a
modest DC-current "sourcing" capability of hundreds of micro-Amps, as determined by the internal pull-up
resistors.
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Feature Description (continued)
The fall time (tfA, tfB) of a signal depends on the edge-rate and output impedance of the external device driving
TXS0108E data I/Os, as well as the capacitive loading on the data lines.
Similarly, the tPHL and max data rates also depend on the output impedance of the external driver. The values for
tfA, tfB, tPHL, and maximum data rates in the data sheet assume that the output impedance of the external driver is
less than 50 Ω.
8.3.3 Output Load Considerations
TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading
and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths should be kept short enough
such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity
by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay
on for approximately 30 ns. The maximum capacitance of the lumped load that can be driven also depends
directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is
driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic ICC,
load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the
capacitance of the TXS0108E output. Therefore, TI recommends that this lumped-load capacitance is considered
in order to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level
affects.
8.3.4 Enable and Disable
The TXS0108E has an OE input that is used to disable the device by setting OE low, which places all I/Os in the
Hi-Z state. The disable time (tdis) indicates the delay between the time when OE goes low and when the outputs
actually get disabled (Hi-Z). The enable time (ten) indicates the amount of time the user must allow for the oneshot circuitry to become operational after OE is taken high.
8.3.5 Pull-up or Pulldown Resistors on I/O Lines
The TXS0108E has the smart pull-up resistors dynamically change value based on whether a low or a high is
being passed through the I/O line. Each A-port I/O has a pull-up resistor (Rpua) to VCCA and each B-port I/O has a
pull-up resistor (Rpub) to VCCB. Rpua and Rpub have a value of 40 kΩ when the output is driving low. Rpua and Rpub
have a value of 4 kΩ when the output is driving high. Rpua and Rpub are disabled when OE = Low. This feature
provides lower static power consumption (when the I/Os are passing a low), and supports lower VOL values for
the same size pass-gate transistor, and helps improve simultaneous switching performance.
8.4 Device Functional Modes
The TXS0108E device has two functional modes, enabled and disabled. To disable the device set the OE input
low, which places all I/Os in a high impedance state. Setting the OE input high will enable the device.
16
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TXS0108E can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another. The TXS0108E is ideal for use in applications where an open-drain
driver is connected to the data I/Os. The TXS0108E can also be used in applications where a push-pull driver is
connected to the data I/Os, but the TXB0104 might be a better option for such push-pull applications. The
TXS0108E device is a semi-buffered auto-direction-sensing voltage translator design is optimized for translation
applications (for example, MMC Card Interfaces) that require the system to start out in a low-speed open-drain
mode and then switch to a higher speed push-pull mode.
9.2 Typical Application
1.8V
3.3V
0.1mF
VccA
0.1mF
VccB
OE
A1
B1
A2 TXS0108E B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
A8
B8
1.8V
System Controller
Data
3.3V
System
Data
GND
Figure 6. Typical Application Circuit
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1. Make sure the VCCA ≤ VCCB.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
1.2 V to 3.6 V
Output voltage range
1.65 V to 5.5 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
– Use the supply voltage of the device that is driving the TXS0108E device to determine the input voltage
range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low the value
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•
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must be less than the VIL of the input port.
Output voltage range
– Use the supply voltage of the device that the TXS0108E device is driving to determine the output voltage
range.
– The TXS0108E device has smart internal pull-up resistors. External pull-up resistors can be added to
reduce the total RC of a signal trace if necessary.
An external pulldown resistor decreases the output VOH and VOL. Use Equation 1 to calculate the VOH as a
result of an external pulldown resistor.
VOH = VCCx × RPD / (RPD + 4 kΩ)
(1)
9.2.3 Application Curves
VCCA = 1.8 V
VCCB = 3.3 V
Figure 7. Level-Translation of a 2.5-MHz Signal
18
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10 Power Supply Recommendations
During operation, ensure that VCCA ≤ VCCB at all times. The sequencing of each power supply will not damage the
device during the power up operation, so either power supply can be ramped up first. The output-enable (OE)
input circuit is designed so that it is supplied by VCCA and when the (OE) input is low, all outputs are placed in the
high-impedance state. To ensure the high-impedance state of the outputs during power up or power down, the
OE input pin must be tied to GND through a pulldown resistor and must not be enabled until VCCA and VCCB are
fully ramped and stable. The minimum value of the pulldown resistor to ground is determined by the currentsourcing capability of the driver.
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
• Bypass capacitors should be used on power supplies. Place the capacitors as close as possible to the VCCA,
VCCB pin and GND pin.
• Short trace lengths should be used to avoid excessive loading.
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one shot duration, approximately 30 ns, ensuring that any reflection encounters low impedance at the
source driver.
11.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to Power Plane
VIA to GND Plane (Inner Layer)
TXS0108EPWR
To Controller
1
A1
B1
20
0.1uF
0.1uF
0.1uF
Bypass capacitor 0.1uF
2
VCCA
VCCB
19
3
A2
B2
18
4
A3
B3
17
5
A4
B4
16
6
A5
B5
15
7
A6
B6
14
8
A7
B7
13
To system
Bypass capacitor
To system
To Controller
To system
To Controller
To system
To Controller
To Controller
To system
To system
To Controller
To Controller
9
A8
B8
12
10
OE
GND
11
To system
To system
To Controller
Keep OE low until VCCA and VCCB are
powered up
Figure 8. Layout Example
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12 Device and Documentation Support
12.1 Trademarks
All trademarks are the property of their respective owners.
12.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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PACKAGE OPTION ADDENDUM
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29-Oct-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TXS0108EPWR
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
YF08E
TXS0108EPWRG4
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
YF08E
TXS0108ERGYR
ACTIVE
VQFN
RGY
20
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
YF08E
TXS0108EZXYR
ACTIVE
BGA
MICROSTAR
JUNIOR
ZXY
20
2500
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
YF08E
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
29-Oct-2014
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Oct-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TXS0108EPWR
TXS0108ERGYR
TXS0108EZXYR
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TSSOP
PW
20
2000
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
VQFN
RGY
20
3000
330.0
12.4
3.8
4.8
1.6
8.0
12.0
Q1
ZXY
20
2500
330.0
12.4
2.8
3.3
1.0
4.0
12.0
Q2
BGA MI
CROSTA
R JUNI
OR
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Oct-2014
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TXS0108EPWR
TSSOP
PW
20
2000
367.0
367.0
38.0
TXS0108ERGYR
VQFN
RGY
20
3000
367.0
367.0
35.0
TXS0108EZXYR
BGA MICROSTAR
JUNIOR
ZXY
20
2500
338.1
338.1
20.6
Pack Materials-Page 2
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