STL4N10F7 N-channel 100 V, 0.062 Ω typ., 4.5 A STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 3.3x3.3 package Datasheet - production data Features 1 2 Order code VDS RDS(on) max ID STL4N10F7 100 V 0.07 Ω 4.5 A • N-channel enhancement mode 3 • Lower RDS(on) x area vs previous generation 4 • 100% avalanche rated PowerFLAT™ 3.3x3.3 Applications • Switching applications Figure 1. Internal schematic diagram D(5, 6, 7, 8) 8 7 6 5 1 2 3 4 Description This device utilizes the 7th generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages. G(4) S(1, 2, 3) AM15810v1 Table 1. Device summary Order code Marking Package Packaging STL4N10F7 4N1F7 PowerFLAT™ 3.3x3.3 Tape and reel March 2014 This is information on a product in full production. DocID023898 Rev 4 1/14 www.st.com Contents STL4N10F7 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 .............................................. 8 DocID023898 Rev 4 STL4N10F7 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0) 100 V VGS Gate-source voltage ± 20 V ID(1) Drain current (continuous) at Tamb = 25 °C 4.5 A ID (1) Drain current (continuous) at Tamb=100 °C 3.2 A IDM (1)(2) Drain current (pulsed) 18 A ID(3) Drain current (continuous) at Tc = 25 °C 18 A ID(3) Drain current (continuous) at Tc = 100 °C 11.25 A IDM(2)(3) Drain current (pulsed) 72 A PTOT (3) Total dissipation at TC = 25 °C 50 W PTOT (1) Total dissipation at Tamb = 25 °C 2.9 W TJ Operating junction temperature °C -55 to 150 Tstg Storage temperature °C 1. The value is rated according Rthj-amb 2. Pulse width limited by safe operating area. 3. This value is rated according to Rthj-case Table 3. Thermal resistance Symbol Parameter Rthj-case Value Unit Thermal resistance junction-case 2.50 °C/W (1) Thermal resistance junction-amb 42.8 °C/W Rthj-amb (2) Thermal resistance junction-amb 63.5 °C/W Rthj-amb 1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10sec 2. When mounted on FR-4 board of 1inch², 2oz Cu, steady state DocID023898 Rev 4 3/14 14 Electrical characteristics 2 STL4N10F7 Electrical characteristics (TCASE=25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 250 μA, VGS= 0 Min. Typ. Max. 100 Unit V VDS = 100 V 1 μA VDS = 100 V, TC= 125 °C 100 μA Gate body leakage current (VDS = 0) VGS = + 20 V 100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 μA 4.5 V RDS(on) Static drain-source onresistance VGS= 10 V, ID= 2.25 A 0.062 0.07 Ω Min. Typ. Max. Unit - 408 - pF - 112 - pF - 10 - pF - 7.8 - nC - 3 - nC - 1.7 - nC Min. Typ. Max. Unit - 6.3 - ns - 3 - ns - 11 - ns - 4 - ns IDSS IGSS Zero gate voltage drain current (VGS = 0) 2.5 Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS =50 V, f=1 MHz, VGS=0 VDD=50 V, ID = 4.5 A VGS =10 V (see Figure 14) Table 6. Switching times Symbol td(on) tr td(off) tf 4/14 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD=50 V, ID= 2.25 A, RG=4.7 Ω, VGS= 10 V (see Figure 13) Fall time DocID023898 Rev 4 STL4N10F7 Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 4.5 A (1) Source-drain current (pulsed) - 18 A (2) Forward on voltage ISD= 2.25 A, VGS=0 - 1.1 V trr Reverse recovery time - 30 ns Qrr Reverse recovery charge - 24 nC IRRM Reverse recovery current ISD= 2.25 A, di/dt = 100 A/μs, VDD= 80 V, Tj=150 °C (see Figure 18) - 1.6 A ISD ISDM VSD 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5 % DocID023898 Rev 4 5/14 14 Electrical characteristics 2.1 STL4N10F7 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance GIPG120220140926SA ID (A) ZthPowerFlat_3.3x3.3 K δ=0.5 Operation in this area is Limited by max RDS(on) 100 0.2 0.1 10 0.05 10µs 10 -1 100µs 1 0.01 0.02 1ms Single pulse Tj=150°C Tc=25°C 0.1 Sinlge pulse 0.01 0.1 1 10 VDS(V) 100 Figure 4. Output characteristics GIPG200120141028FSR ID (A) VGS= 10 V 10 -2 10 -4 10 -2 10 -3 10 -1 tp(s) Figure 5. Transfer characteristics GIPG200120141040FSR ID (A) VDS= 9V 30 30 9V 8V 24 7V 18 25 20 15 12 6 0 0 2 4 6 8 6V 10 5V 5 Figure 6. Gate charge vs gate-source voltage GIPG200120141048FSR VGS (V) VDD= 50V ID= 4.5A 12 0 VDS(V) 2 4 6 8 10 VGS(V) Figure 7. Static drain-source on-resistance GIPG210120141012FSR RDS(on) (mΩ) VGS=10V 62.4 10 62 8 6 61.6 4 61.2 2 0 2 6/14 4 6 8 10 QG(nC) 60.8 0.5 DocID023898 Rev 4 1 1.5 2 2.5 ID(A) STL4N10F7 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized V(BR)DSS vs temperature GIPG200120141330FSR C (pF) 500 GIPG210120141040FSR V(BR)DSS (norm) ID= 250µA 1.04 Ciss 400 1.02 300 1.0 200 0.98 100 0 0 20 40 60 80 Coss Crss VDS(V) Figure 10. Normalized gate threshold voltage vs temperature GIPG210120141021FSR VGS(th) (norm) ID=250 µA VDS=VGS 1.1 0.96 -75 -25 25 75 125 TJ(°C) Figure 11. Normalized on-resistance vs temperature GIPG210120141030FSR RDS(on) (norm) VGS=10V ID=2.25 A 1.7 1 1.3 0.9 0.8 0.9 0.7 0.6 -75 -25 25 75 125 TJ(°C) 0.5 -75 -25 25 75 125 TJ(°C) Figure 12. Source-drain diode forward characteristics GIPG210120141051FSR VSD (V) 1.2 TJ=-55°C 1.0 TJ=25°C 0.8 TJ=175°C 0.6 0.4 0.5 1 1.5 2 2.5 ISD(A) DocID023898 Rev 4 7/14 14 Test circuits 3 STL4N10F7 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/14 0 DocID023898 Rev 4 10% AM01473v1 STL4N10F7 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID023898 Rev 4 9/14 14 Package mechanical data STL4N10F7 Figure 19. PowerFLAT™ 3.3 x 3.3 drawing BOTTOM VIEW SIDE VIEW TOP VIEW 8465286_A 10/14 DocID023898 Rev 4 STL4N10F7 Package mechanical data Table 8. PowerFLAT™ 3.3 x 3.3 mechanical data mm Dim. Min. Typ. Max. A 0.70 0.80 0.90 b 0.25 0.30 0.39 c 0.14 0.15 0.20 D 3.10 3.30 3.50 D1 3.05 3.15 3.25 D2 2.15 2.25 2.35 e 0.55 0.65 0.75 E 3.10 3.30 3.50 E1 2.90 3.00 3.10 E2 1.60 1.70 1.80 H 0.25 0.40 0.55 K 0.65 0.75 0.85 L 0.30 0.45 0.60 L1 0.05 0.15 0.25 L2 ϑ 0.15 8° 10° DocID023898 Rev 4 12° 11/14 14 Package mechanical data STL4N10F7 Figure 20. PowerFLAT™ 3.3 x 3.3 recommended footprint 8465286_footprint 12/14 DocID023898 Rev 4 STL4N10F7 5 Revision history Revision history Table 9. Document revision history Date Revision Changes 10-Jul-2013 1 First release. 21-Jan-2014 2 – Inserted Section 2.1: Electrical characteristics (curves). – Document status promoted form preliminary to production data. 19-Feb-2014 3 – Added: ID (at TC=25 °C and 125 °C), IDM and PTOT in Table 2 – Modified: Figure 2 and 3 – Minor text changes 10-Mar-2014 4 – Modified: marking in Table 1 – Minor text changes DocID023898 Rev 4 13/14 14 STL4N10F7 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2014 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 14/14 DocID023898 Rev 4