2SK1623(L), 2SK1623(S) Silicon N Channel MOS FET REJ03G0958-0300 (Previous: ADE-208-1299) Rev.3.00 Jan 10, 2006 Application High speed power switching Features • Low on-resistance • High speed switching • 4 V gate drive device Can be driven from 5 V source • Suitable for motor drive, DC-DC converter, power switch and solenoid drive Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK(L)) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK(S)-(1)) 4 4 D 1. Gate 2. Drain 3. Source 4. Drain G 1 1 2 3 Rev.3.00 Jan 10, 2006 page 1 of 7 2 3 S 2SK1623(L), 2SK1623(S) Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Symbol V(BR)DSS Ratings 100 Unit V VGSS ID ±20 20 V A 80 20 A A ID(pulse) IDR *1 *2 Channel dissipation Channel temperature Pch Tch 50 150 W Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at TC = 25°C Tstg –55 to +150 °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V(BR)DSS Min 100 Typ — Max — Unit V Gate to source breakdown voltage Gate to source leak current V(BR)GSS IGSS ±20 — — — — ±10 V µA IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 Zero gate voltage drain current Gate to source cutoff voltage IDSS VGS(off) — 1.0 — — 250 2.0 µA V VDS = 80 V, VGS = 0 ID = 1 mA, VDS = 10 V Static drain to source on state resistance RDS(on) — — 0.065 0.085 0.085 0.12 Ω Ω ID = 10 A, VGS = 10 V * 3 ID = 10 A, VGS = 4 V * Forward transfer admittance Input capacitance |yfs| Ciss 10 — 16 1300 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 540 160 — — pF pF ID = 10 A, VDS = 10 V * VDS = 10 V, VGS = 0, f = 1 MHz Turn-on delay time Rise time td(on) tr — — 12 100 — — ns ns Turn-off delay time Fall time td(off) tf — — 300 150 — — ns ns Body to drain diode forward voltage Body to drain diode reverse recovery time VDF trr — — 1.3 300 — — V ns Note: 3. Pulse test Rev.3.00 Jan 10, 2006 page 2 of 7 Test conditions ID = 10 mA, VGS = 0 3 3 ID = 10 A, VGS = 10 V, RL = 3 Ω IF = 20 A, VGS = 0 IF = 20 A, VGS = 0, diF/dt = 50 A/µs 2SK1623(L), 2SK1623(S) Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 100 10 0 C m O s pe (1 ra Sh tio 3 ) n ot Drain Current ID (A) 10 D (T c 1 = 2 5° Operation in C ) this area is limited by RDS (on) Ta = 25°C 0.1 0 50 100 Case Temperature 1 150 50 10 V 3.5 V 20 3V VGS = 2.5 V 4 8 12 300 1000 16 12 8 Tc = 75°C 4 25°C –25°C 0 0 0 100 VDS = 10 V Pulse Test Drain Current ID (A) 40 10 30 20 4V 30 10 Typical Transfer Characteristics Pulse Test 7V 5V 3 Drain to Source Voltage VDS (V) Tc (°C) Typical Output Characteristics Drain Current ID (A) µs 10 0.3 0 16 0 20 1 2 3 4 5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 2.0 Pulse Test 1.6 ID = 20 A 1.2 0.8 10 A 0.4 5A 0 0 2 4 6 8 Gate to Source Voltage VGS (V) Rev.3.00 Jan 10, 2006 page 3 of 7 10 Static Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Saturation Voltage VDS (on) (V) µs 10 s = 20 m 40 1 30 PW Channel Dissipation Pch (W) 60 0.5 Pulse Test 0.2 VGS = 4 V 0.1 0.05 10 V 0.02 0.01 0.005 2 5 10 20 50 100 Drain Current ID (A) 200 Static Drain to Source on State Resistance vs. Temperature 0.20 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance yfs (S) Static Drain to Source on State Resistance RDS (on) (Ω) 2SK1623(L), 2SK1623(S) Pulse Test 0.16 ID = 20 A 10 A 5A 0.12 VGS = 4 V 0.08 20 A 5 A, 10 A 0.04 10 V 0 –40 0 40 80 Case Temperature 120 Tc 160 50 Tc = –25°C 20 25°C 10 5 75°C 2 1 0.5 0.2 1 VGS = 0 f = 1 MHz Capacitance C (pF) 500 200 100 50 di / dt = 50 A / µs VGS = 0, Ta = 25°C Pulse Test 5 2 10 20 Crss 0 10 20 30 40 50 Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 20 ID = 20 A VDS VDD = 25 V 50 V 80 V 16 VGS 60 12 8 40 20 4 VDD = 80 V 50 V 25 V 0 100 Reverse Drain Current IDR (A) 80 0 Coss 50 20 40 60 80 Gate Charge Qg (nc) Rev.3.00 Jan 10, 2006 page 4 of 7 0 100 1000 500 Switching Time t (ns) 100 Ciss 1000 10 1 Gate to Source Voltage VGS (V) 10 0.5 20 Typical Capacitance vs. Drain to Source Voltage 10000 20 10 5 2 Drain Current ID (A) 1000 Reverse Recovery Time trr (ns) 0.5 (°C) Body to Drain Diode Reverse Recovery Time Drain to Source Voltage VDS (V) VDS = 10 V Pulse Test td(off) 200 tf 100 tr 50 VGS = 10 V, VDD = 30 V PW = 2 µs, duty ≤ 1 % 20 10 0.5 td(on) 1 2 5 10 20 Drain Current ID (A) 50 2SK1623(L), 2SK1623(S) Reverse Drain Current vs. Source to Drain Voltage 20 Reverse Drain Current IDR (A) Pulse Test 16 10 V 12 5V 8 4 VGS = 0, –5 V 0 0 0.4 0.8 1.2 1.6 Source to Drain Voltage 2.0 VSD (V) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 1 Tc = 25°C D=1 0.5 0.3 0.2 0.1 0.1 0.0 0.03 θch – c (t) = γ s (t) • θch – c θch – c = 2.5°C/W, Tc = 25°C 0.05 2 0.0 D= PDM 1 h 1s p ot uls 0.01 10 µ e PW T PW T 100 µ 1m 10 m 100 m 1 10 Pulse Width PW (S) Switching Time Test Circuit Waveform 90% Vout Monitor Vin Monitor D.U.T. Vin 10% RL Vout Vin 10 V 50 Ω VDD = 30 V 10% 90% td(on) Rev.3.00 Jan 10, 2006 page 5 of 7 10% tr 90% td(off) tf 2SK1623(L), 2SK1623(S) Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.3.00 Jan 10, 2006 page 6 of 7 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 2SK1623(L), 2SK1623(S) Ordering Information Part Name 2SK1623L-E 2SK1623STL-E Quantity 500 pcs 1000 pcs Shipping Container Box (Sack) Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00 Jan 10, 2006 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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