DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUITS PC2709TB 5 V, SUPER MINIMOLD SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER DESCRIPTION The PC2709TB is a silicon monolithic integrated circuits designed as 1st IF amplifier for DBS tuners. This IC is packaged in super minimold package which is smaller than conventional minimold. The PC2709TB has compatible pin connections and performance to PC2709T of conventional minimold version. So, in the case of reducing your system size, PC2709TB is suitable to replace from PC2709T. These IC is manufactured using NEC’s 20 GHz f T NESAT™III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability. FEATURES • High-density surface mounting : 6-pin super minimold package (2.0 • Wideband response • Medium output power • Supply voltage • Power gain : f u = 2.3 GHz TYP. @3 dB bandwidth 1.25 0.9 mm) : P O (sat) = +11.5 dBm@f = 1 GHz with external inductor : VCC = 4.5 to 5.5 V : GP = 23 dB TYP. @f = 1 GHz • Port impedance : input/output 50 APPLICATIONS • 1st IF amplifiers in DBS converters • RF stage buffer in DBS tuners, etc. ORDERING INFORMATION (PB-Free) Part Number PC2709TB-E3-A Remark Package 6-pin super minimold Marking C1E Supplying Form Embossed tape 8 mm wide. 1, 2, 3 pins face the perforation side of the tape. Qty 3 kpcs/reel. To order evaluation samples, please contact your local sales office (Part number for sample order: PC2709TB-A). Caution Electro-static sensitive devices The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Document No. P12653EJ3V0DS00 (3rd edition) Date Published November 2000 N CP(K) The mark shows major revised points. +PC2709TB PIN CONNECTIONS 3 2 1 Pin No. Pin Name 1 INPUT 2 GND 3 GND 4 OUTPUT 5 GND 6 VCC (Bottom View) C1E (Top View) 4 4 3 5 5 2 6 6 1 PRODUCT LINE-UP OF 5 V-BIAS SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER (TA = +25°C, VCC = Vout = 5.0 V, ZS = ZL = 50 1) Part No. fu (GHz) PO (sat) (dBm) GP (dB) NF (dB) ICC (mA) 2.9 +10.0 15 6.5 @f = 1 GHz 26 5 @f = 1 GHz 25 3.5 @f = 0.5 GHz 22 6.0 @f = 1 GHz 25 +PC2708T +PC2708TB +PC2709T 2.3 +11.5 23 +PC2709TB +PC2710T 1.0 +13.5 33 +PC2710TB +PC2776T 2.7 +PC2776TB +8.5 23 Package 6-pin minimold C1D 6-pin super minimold 6-pin minimold C1E 6-pin super minimold 6-pin minimold C1F 6-pin super minimold 6-pin minimold C2L 6-pin super minimold Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. Caution The package size distinguishes between minimold and super minimold. 2 Data Sheet P12653EJ3V0DS00 Marking +PC2709TB SYSTEM APPLICATION EXAMPLE EXAMPLE OF DBS CONVERTERS BS Antenna (DBS ODU) IF Amp. RF Amp. Mixer To IDU Parabola Antenna + PC2709TB Oscillator EXAMPLE OF 900 MHz BAND, 1.5 GHz BAND DIGITAL CELLULAR TELEPHONE RX DEMOD. I Q PLL PLL SW I Driver TX 0$ PA =2 F/F +PC2709TB 90 $ Q Data Sheet P12653EJ3V0DS00 3 +PC2709TB PIN EXPLANATION Pin No. Pin Name Applied Voltage (V) Pin Voltage Note (V) 1 INPUT < 1.05 4 6 2 3 5 OUTPUT VCC GND Voltage as same as VCC through external inductor < 4.5 to 5.5 < 0 < Function and Applications Signal input pin. A internal matching circuit, configured with resistors, enables 50 1 connection over a wide band. A multi-feedback circuit is designed to cancel the deviations of hFE and resistance. This pin must be coupled to signal source with capacitor for DC cut. Signal output pin. The inductor must be attached between VCC and output pins to supply current to the internal output transistors. Power supply pin, which biases the internal input transistor. This pin should be externally equipped with bypass capacitor to minimize its impedance. Ground pin. This pin should be connected to system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. All the ground pins must be connected together with wide ground pattern to decrease impedance defference. Note Pin voltage is measured at VCC = 5.0 V 4 Internal Equivalent Circuit Data Sheet P12653EJ3V0DS00 6 VCC 4 OUT IN 1 3 GND 2 5 GND +PC2709TB ABSOLUTE MAXIMUM RATINGS Parameter Symbol Conditions Ratings Unit Supply Voltage VCC TA = +25°C, Pin 4 and 6 6 V Total Circuit Current ICC TA = +25°C 60 mA Power Dissipation PD Mounted on double copper clad 50 = 50 = 1.6 mm epoxy glass PWB (TA = +85°C) 270 mW Operating Ambient Temperature TA <40 to +85 °C Storage Temperature Tstg <55 to +150 °C Input Power Pin +10 dBm TA = +25°C RECOMMENDED OPERATING RANGE Parameter Symbol MIN. TYP. MAX. Unit Supply Voltage VCC 4.5 5.0 5.5 V Operating Ambient Temperature TA <40 +25 +85 °C Remark The same voltage should be applied to pin 4 and 6. ELECTRICAL CHARACTERISTICS (TA = +25°C, VCC = Vout = 5.0 V, ZS = ZL = 50 1) Parameter Circuit Current Power Gain Saturated Output Power Noise Figure Upper Limit Operating Frequency Symbol Test Conditions MIN. TYP. MAX. Unit 19 25 32 mA ICC No input signal GP f = 1 GHz 21.0 23.0 26.5 dB f = 1 GHz, Pin = 0 dBm +9.0 +11.5 < dBm < 5.0 6.5 dB 3 dB down below flat gain at f = 0.1 GHz 2.0 2.3 < GHz PO (sat) NF fu f = 1 GHz Isolation ISL f = 1 GHz 26 31 < dB Input Return Loss RLin f = 1 GHz 7 10 < dB Output Return Loss RLout f = 1 GHz 7 10 < dB Gain Flatness 6GP f = 0.1 to 1.8 GHz < (1.0 < dB Data Sheet P12653EJ3V0DS00 5 +PC2709TB TEST CIRCUIT VCC 1 000 pF C3 L 6 50 1 C1 IN C2 4 1 1 000 pF 50 1 OUT 1 000 pF 2, 3, 5 COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS Type Value C1 to C2 Bias Tee 1 000 pF C3 Capacitor 1 000 pF L Bias Tee 1 000 nH EXAMPLE OF ACTURAL APPLICATION COMPONENTS Type Value Operating Frequency C1 to C3 Chip capacitor 1 000 pF 100 MHz or higher L Chip inductor 300 nH 10 MHz or higher 100 nH 100 MHz or higher 10 nH 1.0 GHz or higher INDUCTOR FOR THE OUTPUT PIN The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output transistor, connect an inductor between the VCC pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above. The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get enough gain. In this case, large inductance and Q is suitable. CAPACITORS FOR THE VCC, INPUT, AND OUTPUT PINS Capacitors of 1 000 pF are recommendable as the bypass capacitor for the V CC pin and the coupling capacitors for the input and output pins. The bypass capacitor connected to the VCC pin is used to minimize ground impedance of VCC pin. So, stable bias can be supplied against VCC fluctuation. The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 1 load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC. To obtain a flat gain from 100 MHz upwards, 1 000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are determined by equation, C = 1/(2 /Rfc). 6 Data Sheet P12653EJ3V0DS00 +PC2709TB ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD AMP-2 Top View 3 2 1 IN OUT C E C1 5 C L 4 6 Mounting direction VCC C COMPONENT LIST Notes 1. 30 = 30 = 0.4 mm double sided copper clad polyimide board. Value 2. Back side: GND pattern C 1 000 pF 3. Solder plated on pattern L 300 nH 4. : Through holes For more information on the use of this IC, refer to the following application note: USAGE AND APPLICATION OF SILICON MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER MMIC (P12152E). Data Sheet P12653EJ3V0DS00 7 +PC2709TB TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°C) CIRCUIT CURRENT vs. OPERATING AMBIENT TEMPERATURE CIRCUIT CURRENT vs. SUPPLY VOLTAGE 40 40 No input signal VCC = 5.0 V No input signal 35 Circuit Current ICC (mA) Circuit Current ICC (mA) 35 30 25 20 15 10 5 30 25 20 15 10 5 1 0 2 3 4 5 0 –60 –40 –20 6 Supply Voltage VCC (V) NOISE FIGURE, POWER GAIN vs. FREQUENCY 30 5 Power Gain GP (dB) 6 25 4.5 V GP VCC = 5.0 V 5.5 V NF 15 4.5 V 0.3 1.0 25 +85$C 20 15 10 0.1 3.0 Frequency f (GHz) 0 0 Input Return Loss RLin (dB) Output Return Loss RLout (dB) –10 –20 –30 –40 1.0 3.0 3.0 VCC = 5.0 V –10 RLin –20 RLout –30 –40 –50 0.1 0.3 1.0 Frequency f (GHz) Frequency f (GHz) 8 1.0 INPUT RETURN LOSS, OUTPUT RETURN LOSS vs. FREQUENCY VCC = 5.0 V 0.3 0.3 Frequency f (GHz) ISOLATION vs. FREQUENCY –50 0.1 VCC = 5.0 V –40$C TA = +25$C 5.0 V 20 10 0.1 4 Isolation ISL (dB) Noise Figure NF (dB) VCC = 5.5 V 7 +20 +40 +60 +80 +100 POWER GAIN vs. FREQUENCY 30 Power Gain GP (dB) 8 0 Operating Ambient Temperature TA ($C) Data Sheet P12653EJ3V0DS00 3.0 +PC2709TB OUTPUT POWER vs. INPUT POWER OUTPUT POWER vs. INPUT POWER +15 +15 f = 1.0 GHz 5.5 V VCC = 5.0 V f = 1.0 GHz +10 Output Power Pout (dBm) Output Power Pout (dBm) +10 VCC = 5.0 V +5 4.5 V 0 –5 –10 –15 –20 –35 –30 –25 –20 –15 –10 –5 0 +25$C +5 TA = –40$C –5 –10 –15 –20 –35 –30 –25 –20 –15 –10 –5 +5 +10 Input Power Pin (dBm) OUTPUT POWER vs. INPUT POWER f = 2.0 GHz OUTPUT POWER vs. INPUT POWER +10 Output Power Pout ( dBm) Output Power Pout (dBm) VCC = 5.0 V 5.5 V +5 4.5 V 0 VCC = 5.0 V –5 –10 –15 –20 –35 –30 –25 –20 –15 –10 –5 0 +5 –5 –10 –15 5.5 V 14 12 VCC = 5.0 V 8 4.5 V 4 2 0.3 1.0 +5 +10 3.0 3RD ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE 3rd Order Intermodulation Distortion IM3 (dBc) Pin = 0 dBm 6 0 Input Power Pin (dBm) 20 16 f = 2.0 GHz –20 –35 –30 –25 –20 –15 –10 –5 +5 +10 SATURATED OUTPUT POWER vs. FREQUENCY 18 f = 0.5 GHz f = 1.0 GHz 0 Input Power Pin (dBm) Saturated Output Power PO(sat) (dBm) +5 +10 +15 +10 0 0.1 0 Input Power Pin (dBm) +15 10 +85$C 0 60 f1 = 1.000 GHz f2 = 1.002 GHz 50 VCC = 5.0 V 40 5.5 V 30 20 4.5 V 10 –10 –8 –6 –4 –2 Frequency f (GHz) 0 +2 +4 +6 +8 +10 Output Power of Each Tone PO(each) (dBm) Remark The graphs indicate nominal characteristics. Data Sheet P12653EJ3V0DS00 9 +PC2709TB S-PARAMETERS (TA = +25$$C, VCC = Vout = 5.0 V) S11-FREQUENCY 0.1 G 1.0 G 3.0 G S22-FREQUENCY 3.0 G 2.0 G 10 0.1 G 1.0 G Data Sheet P12653EJ3V0DS00 +PC2709TB TYPICAL S-PARAMETER VALUES (TA = +25°C) VCC = Vout = 5.0 V, ICC = 26 mA Frequency MHz MAG. S11 ANG. MAG. ANG. MAG. ANG. MAG. ANG. 100.0000 200.0000 300.0000 400.0000 500.0000 600.0000 700.0000 800.0000 900.0000 1000.0000 1100.0000 1200.0000 1300.0000 1400.0000 1500.0000 1600.0000 1700.0000 1800.0000 1900.0000 2000.0000 2100.0000 2200.0000 2300.0000 2400.0000 2500.0000 2600.0000 2700.0000 2800.0000 2900.0000 3000.0000 3100.0000 0.227 0.239 0.245 0.244 0.243 0.247 0.265 0.284 0.301 0.305 0.299 0.300 0.314 0.328 0.354 0.359 0.373 0.371 0.379 0.386 0.387 0.374 0.360 0.339 0.338 0.334 0.330 0.311 0.291 0.258 0.240 0.2 1.0 2.9 2.5 1.5 –1.5 –3.2 –3.6 –3.3 –2.4 –3.2 –6.3 –10.3 –14.4 –17.3 –19.5 –22.1 –26.8 –31.1 –36.0 –39.5 –43.8 –48.7 –55.4 –62.0 –66.0 –69.0 –69.9 –72.5 –76.5 –80.6 13.698 13.724 13.830 13.998 14.109 14.246 14.538 14.703 15.051 15.331 15.605 15.773 16.152 16.282 16.337 16.370 16.256 15.977 15.529 15.307 14.745 14.212 13.633 12.846 11.990 11.265 10.560 9.942 9.432 8.818 8.353 –4.5 –9.6 –14.5 –19.9 –25.0 –30.4 –35.5 –41.3 –47.0 –53.5 –60.0 –66.7 –74.0 –81.0 –89.3 –96.5 –104.5 –112.7 –120.5 –128.1 –135.9 –143.7 –151.3 –158.7 –165.5 –172.1 –177.8 176.2 171.3 166.5 161.9 0.027 0.027 0.026 0.027 0.026 0.027 0.028 0.028 0.028 0.029 0.029 0.029 0.030 0.030 0.032 0.031 0.033 0.032 0.033 0.034 0.033 0.033 0.033 0.032 0.033 0.033 0.033 0.033 0.035 0.035 0.035 –1.0 3.1 4.7 7.8 9.8 11.9 13.6 14.9 17.2 18.8 20.9 22.5 23.8 26.1 25.6 26.8 28.0 29.3 31.3 31.0 32.2 30.5 33.9 35.5 38.0 39.1 40.8 43.5 44.9 47.4 53.4 0.196 0.207 0.212 0.223 0.234 0.252 0.270 0.287 0.298 0.309 0.322 0.336 0.353 0.353 0.368 0.370 0.382 0.381 0.378 0.373 0.366 0.363 0.353 0.331 0.318 0.304 0.295 0.282 0.267 0.246 0.225 0.9 2.2 4.1 3.4 2.1 –0.4 –2.3 –4.6 –7.4 –11.9 –17.1 –21.5 –24.8 –28.8 –35.5 –41.8 –46.9 –52.8 –57.8 –64.1 –70.8 –78.1 –83.0 –90.0 –95.6 –102.5 –108.3 –113.7 –118.6 –125.1 –131.2 S21 S12 Data Sheet P12653EJ3V0DS00 S22 K 1.37 1.36 1.38 1.32 1.33 1.26 1.20 1.15 1.10 1.05 1.04 1.01 0.95 0.93 0.86 0.86 0.81 0.83 0.83 0.82 0.85 0.90 0.94 1.06 1.11 1.20 1.25 1.36 1.40 1.55 1.64 11 +PC2709TB PACKAGE DIMENSIONS 6-PIN SUPER MINIMOLD (UNIT: mm) 2.1(0.1 0.2+0.1 –0.05 0.65 0.65 1.3 2.0(0.2 1.25(0.1 12 Data Sheet P12653EJ3V0DS00 0.15+0.1 –0.05 0 to 0.1 0.7 0.9(0.1 0.1 MIN. +PC2709TB NOTES ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. (3) The bypass capacitor should be attached to the V CC pin. (4) The inductor (L) must be attached between V CC and output pins. The inductance value should be determined in accordance with desired frequency. (5) The DC cut capacitor must be attached to input and output pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact your NEC sales representative. Soldering Method Soldering Conditions Recommended Condition Symbol Infrared Reflow Package peak temperature: 235°C or below Time: 30 seconds or less (at 210°C) Note Count: 3, Exposure limit: None IR35-00-3 VPS Package peak temperature: 215°C or below Time: 40 seconds or less (at 200°C) Note Count: 3, Exposure limit: None VP15-00-3 Wave Soldering Soldering bath temperature: 260°C or below Time: 10 seconds or less Note Count: 1, Exposure limit: None WS60-00-1 Partial Heating Pin temperature: 300°C Time: 3 seconds or less (per side of device) Note Exposure limit: None – Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E). Data Sheet P12653EJ3V0DS00 13 NOTICE 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. California Eastern Laboratories and Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. California Eastern Laboratories has used reasonable care in preparing the information included in this document, but California Eastern Laboratories does not warrant that such information is error free. California Eastern Laboratories and Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 3. California Eastern Laboratories and Renesas Electronics do not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of California Eastern Laboratories or Renesas Electronics or others. 4. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. California Eastern Laboratories and Renesas Electronics assume no responsibility for any losses incurred by you or third parties arising from such alteration, modification, copy or otherwise misappropriation of Renesas Electronics product. 5. Renesas Electronics products are classified according to the following two quality grades: “Standard” and “High Quality”. The recommended applications for each Renesas Electronics product depends on the product’s quality grade, as indicated below. “Standard”: Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots etc. “High Quality”: Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; and safety equipment etc. Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems, surgical implantations etc.), or may cause serious property damages (nuclear reactor control systems, military equipment etc.). You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application for which it is not intended. California Eastern Laboratories and Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by California Eastern Laboratories or Renesas Electronics. 6. You should use the Renesas Electronics products described in this document within the range specified by California Eastern Laboratories, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. California Eastern Laboratories shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. 7. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or systems manufactured by you. 8. Please contact a California Eastern Laboratories sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. California Eastern Laboratories and Renesas Electronics assume no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 9. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You should not use Renesas Electronics products or technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. When exporting the Renesas Electronics products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. 10. It is the responsibility of the buyer or distributor of California Eastern Laboratories, who distributes, disposes of, or otherwise places the Renesas Electronics product with a third party, to notify such third party in advance of the contents and conditions set forth in this document, California Eastern Laboratories and Renesas Electronics assume no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products. 11. This document may not be reproduced or duplicated in any form, in whole or in part, without prior written consent of California Eastern Laboratories. 12. Please contact a California Eastern Laboratories sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. NOTE 1: “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. NOTE 2: “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics. NOTE 3: Products and product information are subject to change without notice. CEL Headquarters • 4590 Patrick Henry Drive, Santa Clara, CA 95054 • Phone (408) 919-2500 • www.cel.com For a complete list of sales offices, representatives and distributors, Please visit our website: www.cel.com/contactus