Datasheet

AON3820
24V Dual N-Channel AlphaMOS
General Description
Product Summary
VDS
• Trench Power AlphaMOS (αMOS LV) technology
• Low RDS(ON)
• Low Gate Charge
• ESD protection
• RoHS and Halogen-Free Compliant
ID (at VGS=4.5V)
24V
8A
RDS(ON) (at VGS=4.5V)
< 8.9mΩ
RDS(ON) (at VGS=4.0V)
< 9.5mΩ
RDS(ON) (at VGS=3.7V)
< 9.6mΩ
RDS(ON) (at VGS=3.1V)
< 10mΩ
RDS(ON) (at VGS=2.5V)
< 11.8mΩ
Typical ESD protection
HBM Class 3A
Applications
• Battery protection switch
• Mobile device battery charging and discharging
DFN 3x3
Top View
D2
D1
Bottom View
Top View
S2
G2
S1
G1
1
2
3
4
8
D1/D2
7
6
5
D1/D2
D1/D2
G2
G1
D1/D2
S2
S1
Pin 1
Orderable Part Number
Package Type
Form
Minimum Order Quantity
AON3820
DFN 3x3
Tape & Reel
3000
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Drain-Source Voltage
Symbol
VDS
VGS
Gate-Source Voltage
TA=25°C
Continuous Drain
Current G
Pulsed Drain Current C
Power Dissipation
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev.1.0: August 2015
Steady-State
Steady-State
RθJA
RθJL
A
2.0
W
1.3
TJ, TSTG
Symbol
t ≤ 10s
V
32
PD
TA=70°C
±12
6.2
IDM
TA=25°C
B
Units
V
8
ID
TA=70°C
Maximum
24
-55 to 150
Typ
50
70
30
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°C
Max
60
85
35
Units
°C/W
°C/W
°C/W
Page 1 of 5
AON3820
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=250µA, VGS=0V
Zero Gate Voltage Drain Current
IGSS
VGS(th)
Gate-Body leakage current
VDS=0V, VGS=±10V
Gate Threshold Voltage
VDS=VGS, ID=250µA
V
TJ=55°C
TJ=125°C
±10
µA
0.5
0.9
1.3
V
5
7.1
8.9
7
10
12.5
VGS=4.0V, ID=6A
5.1
7.3
9.5
VGS=3.8V, ID=6A
5.2
7.4
9.6
VGS=3.1V, ID=4A
5.4
7.8
10
VGS=2.5V, ID=4A
6.2
9.0
11.8
VDS=5V, ID=8A
70
VSD
Diode Forward Voltage
IS=1A, VGS=0V
0.65
IS
Maximum Body-Diode Continuous Current
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=12V, f=1MHz
f=1MHz
SWITCHING PARAMETERS
Qg
Total Gate Charge
Qgs
Gate Source Charge
Qgd
tD(on)
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
µA
5
Forward Transconductance
gFS
Units
1
VGS=4.5V, ID=8A
Static Drain-Source On-Resistance
Max
24
VDS=24V, VGS=0V
IDSS
RDS(ON)
Typ
S
1
V
3
A
1325
pF
250
pF
220
pF
1.35
kΩ
12.5
VGS=4.5V, VDS=12V, ID=8A
mΩ
20
nC
4.1
nC
Gate Drain Charge
6.0
nC
Turn-On DelayTime
0.9
µs
1.9
µs
1.8
µs
3.4
µs
VGS=4.5V, VDS=12V, RL=1.5Ω,
RGEN=3Ω
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev.1.0: August 2015
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Page 2 of 5
AON3820
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
40
4.5V
30
40
2.5V
3.1V
3.8V
4.0V
VDS=5V
30
ID(A)
ID (A)
2V
20
125°C
20
10
10
25°C
VGS=1.5V
0
0
0
1
2
3
4
0
5
0.5
1.5
2
2.5
3
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Figure 1: On-Region Characteristics (Note E)
12
1.6
10
Normalized On-Resistance
11
RDS(ON) (mΩ)
1
VGS=2.5V
9
VGS=3.1V
8
7
VGS=3.8V
VGS=4V
6
VGS=4.5V
VGS=4.5V
ID=8A
1.4
VGS=4V
ID=6A
VGS=2.5V
ID=4A
1.2
VGS=3.8V
ID=6
1
VGS=3.1V
ID=4A
0.8
5
0
2
4
6
8
0
10
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
20
1.0E+02
ID=8A
1.0E+01
16
12
IS (A)
RDS(ON) (mΩ)
125°C
1.0E+00
125°C
1.0E-01
25°C
1.0E-02
8
1.0E-03
25°C
4
1.0E-04
0
1.0E-05
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev.1.0: August 2015
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
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AON3820
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
5
2000
VDS=12V
ID=8A
3
2
1200
800
Coss
1
400
0
0
Crss
0
3
6
9
12
15
0
Qg (nC)
Figure 7: Gate-Charge Characteristics
16
20
24
TJ(Max)=150°C
TA=25°C
100µs
1.0
10ms
0.0
0.01
100
10
TJ(Max)=150°C
TA=25°C
0.1
1
12
10µs
10µs
RDS(ON)
limited
1ms
10
8
1000
Power (W)
ID (Amps)
10.0
4
VDS (Volts)
Figure 8: Capacitance Characteristics
100.0
ZθJA Normalized Transient
Thermal Resistance
Ciss
1600
Capacitance (pF)
VGS (Volts)
4
DC
0.1
1
10
VDS (Volts)
VGS> or equal to 2.5V
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
1
1E-05 0.0001 0.001 0.01
100
0.1
1
10
100
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=85°C/W
0.1
PD
0.01
Single Pulse
Ton
T
0.001
1E-05
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.1.0: August 2015
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Page 4 of 5
AON3820
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
90%
+ Vdd
VDC
-
Rg
10%
Vgs
Vgs
td(on)
tr
td(off)
ton
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
EAR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Rev.1.0: August 2015
Vgs
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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Page 5 of 5