AO4840E 40V Dual N-Channel AlphaMOS General Description Product Summary VDS • Advanced trench technology • Low RDS(ON) • Low Gate Charge • ESD protected • RoHS and Halogen-Free Compliant Applications ID (at VGS=10V) 40V 6A RDS(ON) (at VGS=10V) < 28mΩ RDS(ON) (at VGS=4.5V) < 35mΩ Typical ESD protection HBM Class 2 100% UIS Tested 100% Rg Tested • Buck Converter • DC motor drive • Load switch SOIC-8 Top View Bottom View D1 Top View S2 G2 S1 G1 1 2 3 4 8 7 6 5 D2 D2 D1 D1 G1 D2 G2 S1 S2 Pin1 Orderable Part Number Package Type Form Minimum Order Quantity AO4840E SO-8 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS Gate-Source Voltage VGS TA=25°C Continuous Drain Current Pulsed Drain Current C Avalanche energy L=0.1mH VDS Spike 10µs TA=25°C Power Dissipation B C Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Rev.1.0: September 2015 Steady-State Steady-State A IAS 14 A EAS 10 mJ VSPIKE 48 V 2 W 1.2 TJ, TSTG Symbol t ≤ 10s V 30 PD TA=70°C ±20 5 IDM Avalanche Current C Units V 6 ID TA=70°C Maximum 40 RθJA RθJL -55 to 150 Typ 48 74 32 www.aosmd.com °C Max 62.5 90 40 Units °C/W °C/W °C/W Page 1 of 5 AO4840E Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V Typ Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±20V Gate Threshold Voltage VDS=VGS, ID=250µA V 1 TJ=55°C 1.7 ±10 µA 2.1 2.6 V 23 28 39 47 35 RDS(ON) Static Drain-Source On-Resistance VGS=4.5V, ID=5A 28 gFS Forward Transconductance VDS=5V, ID=6A 29 VSD Diode Forward Voltage IS=1A, VGS=0V 0.75 IS Maximum Body-Diode Continuous Current TJ=125°C DYNAMIC PARAMETERS Input Capacitance Ciss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance µA 5 VGS=10V, ID=6A Coss Units 40 VDS=40V, VGS=0V IDSS Max VGS=0V, VDS=20V, f=1MHz mΩ mΩ S 1 V 3 A 520 pF 65 pF 32 pF 4.2 6.5 Ω SWITCHING PARAMETERS Qg(10V) Total Gate Charge 9 15 nC Qg(4.5V) Total Gate Charge 4.5 10 f=1MHz VGS=10V, VDS=20V, ID=6A 2 nC Qgs Gate Source Charge 2 nC Qgd tD(on) Gate Drain Charge 1.5 nC Turn-On DelayTime 5.5 ns tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time 7 ns IF=6A, di/dt=500A/µs 8 Qrr Body Diode Reverse Recovery Charge IF=6A, di/dt=500A/µs 13 ns nC Body Diode Reverse Recovery Time VGS=10V, VDS=20V, RL=3.3Ω, RGEN=3Ω 2.5 ns 20.5 ns A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating. THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev.1.0: September 2015 www.aosmd.com Page 2 of 5 AO4840E TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 25 25 10V VDS=5V 4V 20 20 4.5V 15 3.5V ID (A) ID (A) 15 10 10 125°C 5 25°C 5 VGS=3V 0 0 0 1 2 3 4 0 5 2 3 4 5 VGS (Volts) Figure 2: Transfer Characteristics (Note E) VDS (Volts) Figure 1: On-Region Characteristics (Note E) 2 35 Normalized On-Resistance VGS=4.5V 30 RDS(ON) (mΩ Ω) 1 25 20 VGS=10V 15 10 1.8 VGS=10V ID=6A 1.6 1.4 1.2 VGS=4.5V ID=5A 1 0.8 5 0 2 4 6 8 0 10 25 50 75 100 125 150 175 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature (Note E) ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 65 1.0E+01 ID=6A 1.0E+00 125°C 45 1.0E-01 IS (A) RDS(ON) (mΩ Ω) 55 35 125°C 1.0E-02 25°C 25 1.0E-03 25°C 15 1.0E-04 5 1.0E-05 2 4 6 8 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) Rev.1.0: September 2015 www.aosmd.com 0.0 0.2 0.4 0.6 0.8 VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) 1.0 Page 3 of 5 AO4840E TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 700 10 VDS=20V ID=6A 600 Ciss Capacitance (pF) VGS (Volts) 8 6 4 500 400 300 200 Crss 2 Coss 100 0 0 0 2 4 6 8 10 0 5 Qg (nC) Figure 7: Gate-Charge Characteristics 10 15 20 35 40 10000 TJ(Max)=150°C TA=25°C 10µs RDS(ON) limited 1000 100µs 1.0 1ms 10ms 0.0 0.01 100 DC TJ(Max)=150°C TA=25°C 0.1 Power (W) ID (Amps) 30 VDS (Volts) Figure 8: Capacitance Characteristics 100.0 10.0 25 10 0.1 1 10 VDS (Volts) VGS> or equal to 4.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 100 1 1E-05 0.001 0.1 10 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F) Zθ JA Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 1 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=90°C/W 0.1 PDM 0.01 0.001 1E-05 Single Pulse Ton T 0.0001 0.001 0.01 0.1 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: September 2015 www.aosmd.com Page 4 of 5 AO4840E Figure A: Charge Gate Charge Test Circuit & Waveforms Gate Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Figure B:Resistive ResistiveSwitching Switching Test Test Circuit Circuit&&Waveforms Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Figure C: UnclampedInductive InductiveSwitching Switching (UIS) Test Unclamped Test Circuit Circuit&&Waveforms Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Figure D: Recovery Diode Recovery Test Circuit & Waveforms Diode Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vgs Vds Isd Vgs Ig Rev.1.0: September 2015 L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 5 of 5