RFD15P05, RFD15P05SM, RFP15P05
Data Sheet
July 1999
15A, 50V, 0.150 Ohm, P-Channel Power
MOSFETs
• 15A, 50V
Formerly developmental type TA09833.
• rDS(ON) = 0.150Ω
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Ordering Information
PACKAGE
2387.5
Features
These are P-Channel power MOSFETs manufactured using
the MegaFET process. This process which uses feature
sizes approaching those of LSI integrated circuits, gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
PART NUMBER
File Number
D
BRAND
RFD15P05
TO-251AA
D15P05
RFD15P05SM
TO-252AA
D15P05
RFP15P05
TO-220AB
RFP15P05
G
S
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e., RFD15P05SM9A.
Packaging
JEDEC TO-220AB
JEDEC TO-251AA
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
JEDEC TO-252AA
DRAIN
(FLANGE)
GATE
SOURCE
4-96
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
RFD15P05, RFD15P05SM, RFP15P05
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain Gate Voltage (RG = 20KΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate above 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
RFD15P05, RFD15P05SM,
RFP15P05
-50
-50
±20
-15
Refer to Peak Current Curve
Refer to UIS Curve
80
0.533
-55 to 175
UNITS
V
V
V
A
W
W/oC
oC
oC
oC
300
260
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
SYMBOL
BVDSS
ID = 250µA, VGS = 0V (Figure 11)
-50
-
-
V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance
IDSS
IGSS
rDS(ON)
Turn-On Time
tON
Turn-On Delay Time
tD(ON)
-4.0
V
-
-1
µA
VDS = 0.8 x Rated BVDSS, TC = 150oC
-
-
25
µA
VGS = ±20V
-
-
±100
nA
ID = 15A, VGS = -10V (Figure 9)
-
-
0.150
Ω
VDD = -25V, ID ≈ 7.5A, RG = 12.5Ω,
RL = 3.3Ω, VGS = -10V
(Figures 16, 17)
-
-
60
ns
-
16
-
ns
-
30
-
ns
tD(OFF)
-
50
-
ns
tF
-
20
-
ns
Fall Time
Turn-Off Time
-
-
tR
Rise Time
Turn-Off Delay Time
-2.0
VDS = Rated BVDSS
tOFF
Total Gate Charge
QG(TOT)
VGS = 0V to -20V
Gate Charge at -10V
QG(-10)
VGS = 0V to -10V
Threshold Gate Charge
QG(TH)
VGS = 0V to -2V
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VDD = -40V, ID = 15A,
RL = 2.67Ω,
IG(REF) = -0.65mA
(Figures 18, 19)
VDS = -25V, VGS = 0V
f = 1MHz (Figure 12)
-
-
100
ns
-
-
150
nC
-
-
75
nC
-
-
3.5
nC
-
1150
-
pF
-
300
-
pF
-
56
-
pF
Thermal Resistance Junction to Case
RθJC
TO-220AB, TO-251AA, TO-252AA
-
-
1.875
oC/W
Thermal Resistance Junction to Ambient
RθJA
TO-251AA, TO-252AA
-
-
100
oC/W
TO-220AB
-
-
62.5
oC/W
MIN
TYP
MAX
UNITS
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
Source to Drain Diode Voltage
VSD
ISD = -15A
-
-
-1.5
V
Reverse Recovery Time
tRR
ISD = -15A, dISD/dt = -100A/µs
-
-
125
ns
NOTES:
2. Pulse test: pulse duration ≤ 300ms, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4-97
RFD15P05, RFD15P05SM, RFP15P05
Typical Performance Curves
-16
POWER DISSIPATION MULTIPLIER
1.2
ID , DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
-12
-8
-4
0.2
0
0
25
0
125
50
75
100
TC , CASE TEMPERATURE (oC)
25
175
150
50
75
100
125
150
175
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1
THERMAL IMPEDANCE
ZθJC, NORMALIZED TRANSIENT
2
0.5
0.2
0.1
0.1
PDM
0.05
0.02
0.01
0.01
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
10-5
10-4
10-3
10-2
10-1
100
101
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
TC = 25oC
TJ = MAX RATED
100µs
-10
1ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
10ms
100ms
DC
-1
-1
-10
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
4-98
-100
-200
IDM , PEAK CURRENT CAPABILITY (A)
ID , DRAIN CURRENT (A)
-100
VGS = -20V
-100
TC = 25oC
FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
175 – T C
I = I 25 ----------------------
150
VGS = -10V
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-10
10-5
10-4
10-3
10-2
10-1
100
t, PULSE WIDTH (s)
FIGURE 5. PEAK CURRENT CAPABILITY
101
RFD15P05, RFD15P05SM, RFP15P05
Typical Performance Curves
(Continued)
-40
-50
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC
STARTING TJ = 25oC
ID , DRAIN CURRENT (A)
IAS , AVALANCHE CURRENT (A)
STARTING TJ = 150oC
-10
If R = 0
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
-1
0.1
1
10
tAV, TIME IN AVALANCHE (ms)
VGS = -20V
VGS = -7V
-20
VGS = -6V
-10
VGS = -4.5V
0
-3.0
-4.5
-6.0
-7.5
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 7. SATURATION CHARACTERISTICS
2.5
VDD = -15V
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
-32
25oC
-55oC
-24
175oC
-16
-8
0
-2
-4
-6
-8
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
IDS(ON) , DRAIN TO SOURCE CURRENT (A)
-1.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = -10V, ID = -15A
2.0
1.5
1.0
0.5
0
-80
-10
-40
FIGURE 8. TRANSFER CHARACTERISTICS
40
80
120
160
200
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
2.0
2.0
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
VGS = VDS
ID = -250µA
1.5
1.0
0.5
0
-80
0
TJ , JUNCTION TEMPERATURE (oC)
VGS , GATE TO SOURCE VOLTAGE (V)
NORMALIZED GATE
VGS = -5V
0
100
-40
THRESHOLD VOLTAGE
VGS = -8V
-30
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
0
VGS = -10V
-40
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
4-99
ID = -250µA
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
RFD15P05, RFD15P05SM, RFP15P05
Typical Performance Curves
(Continued)
C, CAPACITANCE (pF)
VDD = BVDSS
VDD = BVDSS
-7.5
-37.5
1000
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
800
600
COSS
400
RL = 3.33Ω
IG(REF) = -0.65mA
VGS = -10V
-25
0.25 BVDSS 0.25 BVDSS
-12.5
200
CRSS
-5.0
0.75 BVDSS 0.75 BVDSS
0.50 BVDSS 0.50 BVDSS
-2.5
0.0
0
0
0
-5
-10
-15
-20
-25
20
VDS , DRAIN TO SOURCE VOLTAGE (V)
IG(REF)
t, TIME (ms)
IG(ACT)
80
IG(REF)
IG(ACT)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
tAV
L
0
VARY tP TO OBTAIN
REQUIRED PEAK IAS
-
RG
+
0V
VGS
VDD
DUT
VDD
tP
IAS
IAS
VDS
tP
0.01Ω
BVDSS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(OFF)
td(ON)
tr
0
RL
DUT
VGS
RG
VDD
+
tf
10%
10%
VDS
VGS
0
90%
90%
10%
50%
50%
PULSE WIDTH
90%
FIGURE 16. SWITCHING TIME TEST CIRCUIT
4-100
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
VGS , GATE TO SOURCE VOLTAGE (V)
CISS
1200
-10.0
-50
VDS , DRAIN TO SOURCE VOLTAGE (V)
1400
RFD15P05, RFD15P05SM, RFP15P05
Test Circuits and Waveforms
(Continued)
VDS
RL
VDS
Qg(TH)
0
VGS = -2V
VGS
-
Qg(-10)
+
DUT
VGS = -10V
-VGS
VDD
VGS = -20V
VDD
Ig(REF)
Qg(TOT)
0
Ig(REF)
FIGURE 18. GATE CHARGE TEST CIRCUIT
4-101
FIGURE 19. GATE CHARGE WAVEFORMS
RFD15P05, RFD15P05SM, RFP15P05
PSPICE Electrical Model
.SUBCKT RFP15P05 2 1 3
REV 9/06/94
CA 12 8 1.6e-9
CB 15 14 1.47e-9
CIN 6 8 1.09e-9
LDRAIN
5
10
2
DRAIN
DPLCAP
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DPLCAP 10 6 DPLCAPMOD
5
51
ESG
+
RGATE
9
1
LDRAIN 2 5 1e-9
LGATE 1 9 6.73e-9
LSOURCE 3 7 6.69e-9
VTO
-
EBREAK
17
18
+
-
16
DBODY
MOS2
21
-
18
20 8
LGATE
RDRAIN
6
8
EVTO
+
GATE
ESCL
+
EBREAK 5 11 17 18 -73.0
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTO 20 6 8 18 1
IT 8 17 1
RSCL1
RSCL2
RIN
11
MOS1
6
DBREAK
CIN
8
RSOURCE
LSOURCE
3
SOURCE
MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 63.6e-3
RGATE 9 20 7.37
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 46.5e-3
RVTO 18 19 RVTOMOD 1
S1A
12
13
8
S1B
7
S2A
14
13
13
15
17
RBREAK
S2B
RVTO
CB
CA
IT
+
6
EGS
8
-
+
EDS
-
14
5
8
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.65
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/35,4))}
.MODEL DBDMOD D (IS = 1.27e-13 RS = 1.62e-2 TRS1 = 1.35e-3 TRS2 = -4.33e-6 CJO = 1.25e-9 TT = 7.97e-8)
.MODEL DBKMOD D (RS = 2.54e-1 TRS1 = 4.54e-3 TRS2 = -1.12e-5)
.MODEL DPLCAPMOD D (CJO = 285e-12 IS = 1e-30 N = 10)
.MODEL MOSMOD PMOS (VTO = -3.78 KP = 6.97 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 9.15e-4 TC2 = -4.0e-7)
.MODEL RDSMOD RES (TC1 = 5.47e-3 TC2 = 1.37e-5)
.MODEL RSCLMOD RES (TC1 = 1.9e-3 TC2 = -7.5e-6)
.MODEL RVTOMOD RES (TC1 = -3.71e-3 TC2 = -2.41e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 3.65 VOFF = 1.65)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.65 VOFF = 3.65)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.60 VOFF = -4.40)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.40 VOFF = 0.60)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global
Temperature Options; authored by William J. Hepp and C. Frank Wheatley.
4-102
18
19
-
VBAT
+
RFD15P05, RFD15P05SM, RFP15P05
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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4-103
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