PHILIPS TDA8927J

INTEGRATED CIRCUITS
DATA SHEET
TDA8927
Power stage 2 × 80 W class-D
audio amplifier
Objective specification
File under Integrated Circuits, IC01
2001 Dec 11
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
CONTENTS
1
FEATURES
2
APPLICATIONS
3
GENERAL DESCRIPTION
4
QUICK REFERENCE DATA
5
ORDERING INFORMATION
6
BLOCK DIAGRAMS
7
PINNING INFORMATION
8
FUNCTIONAL DESCRIPTION
8.1
8.2
8.2.1
8.2.2
8.3
Power stage
Protections
Overtemperature
Short-circuit across the loudspeaker terminals
BTL operation
9
LIMITING VALUES
10
THERMAL CHARACTERISTICS
11
QUALITY SPECIFICATION
12
DC CHARACTERISTICS
13
AC CHARACTERISTICS
14
SWITCHING CHARACTERISTICS
14.1
Duty factor
2001 Dec 11
2
15
TEST AND APPLICATION INFORMATION
15.1
15.2
15.3
15.4
15.5
15.6
BTL application
Remarks
Output power
Reference designs
Reference design bill of material
Curves measured in reference design
16
PACKAGE OUTLINES
17
SOLDERING
17.1
17.2
17.2.1
17.2.2
17.3
17.3.1
17.3.2
17.3.3
17.4
Introduction
Through-hole mount packages
Soldering by dipping or by solder wave
Manual soldering
Surface mount packages
Reflow soldering
Wave soldering
Manual soldering
Suitability of IC packages for wave, reflow and
dipping soldering methods
18
DATA SHEET STATUS
19
DEFINITIONS
20
DISCLAIMERS
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
1
TDA8927
• Multimedia systems
FEATURES
• High efficiency (>94%)
• All mains fed audio systems
• Operating voltage from ±15 to ±30 V
• Car audio (boosters).
• Very low quiescent current
• High output power
3
• Short-circuit proof across the load, only in combination
with controller TDA8929T
The TDA8927 is the switching power stage of a two-chip
set for a high efficiency class-D audio power amplifier
system. The system is split into two chips:
• Diagnostic output
• TDA8927J/ST/TH; a digital power stage in a DBS17P,
RDBS17P or HSOP24 power package
• Usable as a stereo Single-Ended (SE) amplifier or as a
mono amplifier in Bridge-Tied Load (BTL)
• TDA8929T; the analog controller chip in a SO24
package.
• Electrostatic discharge protection (pin to pin)
• Thermally protected, only in combination with controller
TDA8929T.
2
With this chip set a compact 2 × 80 W audio amplifier
system can be built, operating with high efficiency and very
low dissipation. No heatsink is required, or depending on
supply voltage and load, a very small one. The system
operates over a wide supply voltage range from
±15 up to ±30 V and consumes a very low quiescent
current.
APPLICATIONS
• Television sets
• Home-sound sets
4
GENERAL DESCRIPTION
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
General; VP = ±25 V
VP
supply voltage
±15
±25
±30
V
Iq(tot)
total quiescent current
no load connected
−
35
45
mA
η
efficiency
Po = 30 W
−
94
−
%
RL = 4 Ω; THD = 10%; VP = ±25 V
60
65
−
W
RL = 4 Ω; THD = 10%; VP = ±27 V
74
80
−
W
RL = 4 Ω; THD = 10%; VP = ±17 V
90
110
−
W
RL = 8 Ω; THD = 10%; VP = ±25 V
120
150
−
W
Stereo single-ended configuration
output power
Po
Mono bridge-tied load configuration
Po
5
output power
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA8927J
DBS17P
DESCRIPTION
VERSION
plastic DIL-bent-SIL power package; 17 leads (lead length
12 mm)
SOT243-1
TDA8927ST
RDBS17P
plastic rectangular-DIL-bent-SIL power package; 17 leads (row
spacing 2.54 mm)
SOT577-1
TDA8927TH
HSOP24
plastic, heatsink small outline package; 24 leads; low stand-off
height
SOT566-2
2001 Dec 11
3
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
6
TDA8927
BLOCK DIAGRAMS
VDD2 VDD1
handbook, full pagewidth
13
TDA8927J
TDA8927ST
EN1
SW1
REL1
STAB
DIAG
POWERUP
EN2
SW2
REL2
4
1
2
5
6
BOOT1
DRIVER
HIGH
CONTROL
AND
HANDSHAKE
7
OUT1
DRIVER
LOW
9
temp
3
TEMPERATURE SENSOR
AND
current
CURRENT PROTECTION
15
16
VDD2
12
14
17
VSS1
BOOT2
DRIVER
HIGH
CONTROL
AND
HANDSHAKE
11
OUT2
DRIVER
LOW
8
10
VSS1 VSS2
MGW138
Fig.1 Block diagram of TDA8927J and TDA8927ST.
2001 Dec 11
4
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
VDD2 VDD1
handbook, full pagewidth
11
LIM
24
EN1
21
SW1
22
REL1
3
DRIVER
HIGH
CONTROL
AND
HANDSHAKE
4
OUT1
DRIVER
LOW
temp
23
DIAG
TEMPERATURE SENSOR
AND
current
CURRENT PROTECTION
VSS1
VDD2
14
POWERUP
10
13
EN2
16
SW2
15
REL2
BOOT2
DRIVER
HIGH
CONTROL
AND
HANDSHAKE
9
OUT2
DRIVER
LOW
7
STAB
4
1, 12, 18, 20
19
VSS(sub)
5
5
8
VSS1 VSS2
Fig.2 Block diagram of TDA8927TH.
2001 Dec 11
BOOT1
6
STAB
n.c.
2
TDA8927TH
17
MGW140
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
7
TDA8927
PINNING INFORMATION
PIN
SYMBOL
SW1
DESCRIPTION
TDA8927J
TDA8927ST
TDA8927TH
1
1
21
digital switch input channel 1
n.c.
−
−
1
not connected
REL1
2
2
22
digital control output channel 1
DIAG
3
3
23
digital open-drain output for overtemperature and
overcurrent report
EN1
4
4
24
digital enable input for channel 1
VDD1
5
5
2
positive power supply channel 1
BOOT1
6
6
3
bootstrap capacitor channel 1
STAB
−
−
6
decoupling internal stabilizer for logic supply
OUT1
7
7
4
PWM output channel 1
STAB
−
−
7
decoupling internal stabilizer for logic supply
VSS1
8
8
5
negative power supply channel 1
STAB
9
9
−
decoupling internal stabilizer for logic supply
VSS2
10
10
8
negative power supply channel 2
OUT2
11
11
9
PWM output channel 2
BOOT2
12
12
10
bootstrap capacitor channel 2
n.c.
−
−
12
not connected
VDD2
13
13
11
positive power supply channel 2
EN2
14
14
13
digital enable input for channel 2
POWERUP
15
15
14
enable input for switching-on internal reference
sources
REL2
16
16
15
digital control output channel 2
SW2
17
17
16
digital switch input channel 2
LIM
−
−
17
current input for setting maximum load current limit
n.c.
−
−
18
not connected
VSS(sub)
−
−
19
negative supply (substrate)
n.c.
−
−
20
not connected
2001 Dec 11
6
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
handbook, halfpage
handbook, halfpage
SW1
1
REL1
2
EN1 24
DIAG
3
DIAG 23
2 VDD1
EN1
4
REL1 22
3 BOOT1
VDD1
5
SW1 21
4 OUT1
BOOT1
6
n.c. 20
5 VSS1
OUT1
7
VSS(sub) 19
VSS1
8
STAB
9
1 n.c.
6 STAB
TDA8927TH
TDA8927J
TDA8927ST
n.c. 18
7 STAB
LIM 17
8 VSS2
VSS2 10
SW2 16
9 OUT2
OUT2 11
REL2 15
10 BOOT2
BOOT2 12
POWERUP 14
VDD2 13
EN2 13
11 VDD2
12 n.c.
EN2 14
POWERUP 15
MGW144
REL2 16
SW2 17
MGW142
Fig.3
Pin configuration of TDA8927J and
TDA8927ST.
2001 Dec 11
Fig.4 Pin configuration of TDA8927TH.
7
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
8
TDA8927
8.2
FUNCTIONAL DESCRIPTION
Temperature and short-circuit protection sensors are
included in the TDA8927 power stage. These protections
are only operational in combination with the TDA8929T. In
the event that the maximum current or maximum
temperature is exceeded the diagnostic output is
activated. The controller has to take appropriate measures
by shutting down the system.
The combination of the TDA8927J and the TDA8929T
produces a two-channel audio power amplifier system
using the class-D technology (see Fig.5). In the TDA8929T
controller device the analog audio input signal is converted
into a digital Pulse Width Modulation (PWM) signal.
The power stage TDA8927 is used for driving the low-pass
filter and the loudspeaker load. It performs a level shift
from the low-power digital PWM signal, at logic levels, to a
high-power PWM signal that switchs between the main
supply lines. A second-order low-pass filter converts the
PWM signal into an analog audio signal across the
loudspeaker.
8.2.1
8.2.2
SHORT-CIRCUIT ACROSS THE LOUDSPEAKER
TERMINALS
Power stage
When the loudspeaker terminals are short-circuited it will
be detected by the current protection. If the output current
exceeds the maximum output current of 7.5 A, then
pin DIAG becomes LOW. The controller should shut down
the system to prevent damage. Using the TDA8929T the
system is shut down within 1 µs, and after 220 ms, it will
attempt to restart the system again. During this time the
dissipation is very low, so the average dissipation during a
short-circuit is practically zero.
The power stage contains the high-power DMOS
switches, the drivers, timing and handshaking between the
power switches and some control logic. For protection, a
temperature sensor and a maximum current detector are
built-in on the chip.
For interfacing with the controller chip the following
connections are used:
• Switch (pins SW1 and SW2): digital inputs; switching
from VSS to VSS + 12 V and driving the power DMOS
switches
For the TDA8927TH the limit value can be externally
adjusted using a resistor. For the maximum value of 7.5 A
pin LIM should be connected to VSS. When a resistor Rext
is connected between pin LIM and VSS the maximum
output current can be set at a lower value, using:
• Release (pins REL1 and REL2): digital outputs to
indicate switching from VSS to VSS + 12 V, follows
pins SW1 and SW2 with a small delay
• Enable (pins EN1 and EN2): digital inputs; at a level of
VSS the power DMOS switches are open and the PWM
output is floating; at a level of VSS + 12 V the power
stage is operational and controlled by the switch pin if
pin POWERUP is at VSS + 12 V
5
2.1 × 10
I O(max) = --------------------------------R ext + 28 kΩ
Example 1: with Rext = 27 kΩ the current is limited at
3.8 A.
• Power-up (pin POWERUP): must be connected to a
continuous supply voltage of at least VSS + 5 V with
respect to VSS
Example 2: with Rext = 0 Ω the current is limited at 7.5 A.
In the TDA8927J and the TDA8927ST pin LIM is internally
connected to VSS, so IO(max) = 7.5 A.
• Diagnostics (pin DIAG): digital open-drain output; pulled
to VSS if temperature or maximum current is exceeded.
2001 Dec 11
OVERTEMPERATURE
If the junction temperature (Tj) exceeds 150 °C, then
pin DIAG becomes LOW. The diagnostic pin is released if
the temperature is dropped to approximately 130 °C, so
there is a hysteresis of approximately 20 °C.
See the specification of the TDA8929T for a description of
the controller.
8.1
Protections
8
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VDDD
VSS1 VDD1
VDD2 VDD1
13
5
3
1
+25 V
TDA8929T
R fb
TDA8927J
20 PWM1
BOOT1
6
IN1− 4
REL1 2
23 REL1
INPUT
STAGE
Vi(1)
IN1+ 5
SGND1 2
PWM
MODULATOR
mute
STABI
VSSA
OSC 7
SW1 1
21 EN1
EN1 4
19 STAB
OUT1
DRIVER
LOW
MANAGER
VSS1
15 DIAGTMP
DIAG 3
TEMPERATURE SENSOR
AND
CURRENT PROTECTION
VDD2
12 BOOT2
MODE
POWERUP 15
SGND
SGND2 11
mute
EN2 14
16 EN2
IN2+ 8
CONTROL
AND
HANDSHAKE
16
REL2
INPUT
STAGE
Vi(2)
PWM
MODULATOR
DRIVER
HIGH
14 REL2
IN2− 9
SGND
(0 V)
11 OUT2
SW2 17
13 SW2
DRIVER
LOW
17 PWM2
R fb
12
VSS2(sub)
10
18
8
VDD2
VSSD
VSS1 VSS2
10
VSSA VDDA
−25 V
VSSA
TDA8927
Fig.5 Typical application schematic of the class-D system using TDA8929T and the TDA8927J.
MGU388
Objective specification
VSSD
handbook, full pagewidth
9
VMODE
7
22 DIAGCUR
OSCILLATOR
MODE 6
DRIVER
HIGH
STAB 9
SGND
ROSC
24 SW1
CONTROL
AND
HANDSHAKE
Philips Semiconductors
Power stage 2 × 80 W class-D
audio amplifier
2001 Dec 11
VDDA
VSSA VDDA
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
8.3
TDA8927
BTL operation
In this way the system operates as a mono BTL amplifier
and with the same loudspeaker impedance a four times
higher output power can be obtained.
BTL operation can be achieved by driving the audio input
channels of the controller in the opposite phase and by
connecting the loudspeaker with a BTL output filter
between the two PWM output pins of the power stage
(see Fig.6).
For more information see Chapter 15.
VDD2 VDD1
handbook, full pagewidth
13
5
TDA8927J
EN1
SW1
REL1
STAB
DIAG
POWERUP
EN2
SW2
REL2
4
1
2
CONTROL
AND
HANDSHAKE
6
DRIVER
HIGH
7 OUT1
DRIVER
LOW
9
temp
3
TEMPERATURE SENSOR
AND
current
CURRENT PROTECTION
15
14
17
16
VSS1
VDD2
12
CONTROL
AND
HANDSHAKE
SGND
(0 V)
BOOT2
DRIVER
HIGH
11 OUT2
DRIVER
LOW
8
10
VSS1 VSS2
Fig.6 Mono BTL application.
2001 Dec 11
BOOT1
10
MGU386
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
9 LIMITING VALUES
In accordance with the Absolute Maximum Rate System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VP
supply voltage
−
±30
V
VP(sc)
supply voltage for
short-circuits across the load
−
±30
V
IORM
repetitive peak current in
output pins
−
7.5
A
Tstg
storage temperature
−55
+150
°C
Tamb
ambient temperature
−40
+85
°C
Tvj
virtual junction temperature
−
150
°C
Ves(HBM)
electrostatic discharge
voltage (HBM)
−500
+500
V
all pins with respect to VSS (class A1) −1500
+1500
V
−1500
+1500
V
note 1
all pins with respect to VDD (class A)
all pins with respect to each other
(class A1)
Ves(MM)
electrostatic discharge
voltage (MM)
note 2
all pins with respect to VDD (class B)
−250
+250
V
all pins with respect to VSS (class B)
−250
+250
V
all pins with respect to each other
(class B)
−250
+250
V
Notes
1. Human Body Model (HBM); Rs = 1500 Ω; C = 100 pF.
2. Machine Model (MM); Rs = 10 Ω; C = 200 pF; L = 0.75 µH.
10 THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
Rth(j-c)
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
UNIT
in free air
TDA8927J
40
K/W
TDA8927ST
40
K/W
TDA8927TH
40
K/W
TDA8927J
≈1.0
K/W
TDA8927ST
≈1.0
K/W
TDA8927TH
1
K/W
thermal resistance from junction to case
in free air
11 QUALITY SPECIFICATION
In accordance with “SNW-FQ611-part D” if this type is used as an audio amplifier.
2001 Dec 11
VALUE
11
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
12 DC CHARACTERISTICS
VP = ±25 V; Tamb = 25 °C; measured in test diagram of Fig.8; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VP
supply voltage
Iq(tot)
total quiescent current
note 1
±15
±25
±30
no load connected
−
35
45
mA
outputs floating
−
5
10
mA
11
13
15
V
V
Internal stabilizer logic supply (pin STAB or pins STAB1 and STAB2)
VO(STAB)
stabilizer output voltage
Switch inputs (pins SW1 and SW2)
VIH
HIGH-level input voltage
referenced to VSS
10
−
VSTAB
V
VIL
LOW-level input voltage
referenced to VSS
0
−
2
V
Control outputs (pins REL1 and REL2)
VOH
HIGH-level output voltage
referenced to VSS
10
−
VSTAB
V
VOL
LOW-level output voltage
referenced to VSS
0
−
2
V
Diagnostic output (pin DIAG, open-drain)
VOL
LOW-level output voltage
IDIAG = 1 mA; note 2
0
−
1.0
V
ILO
leakage output current
no error condition
−
−
50
µA
Enable inputs (pins EN1 and EN2)
VIH
HIGH-level input voltage
referenced to VSS
−
9
VSTAB
V
VIL
LOW-level input voltage
referenced to VSS
0
5
−
V
VEN(hys)
hysteresis voltage
−
4
−
V
II(EN)
input current
−
−
300
µA
Switching-on input (pin POWERUP)
VPOWERUP
operating voltage
referenced to VSS
5
−
12
V
II(POWERUP)
input current
VPOWERUP = 12 V
−
100
170
µA
Temperature protection
Tdiag
temperature activating diagnostic VDIAG = VDIAG(LOW)
150
−
−
°C
Thys
hysteresis on temperature
diagnostic
−
20
−
°C
VDIAG = VDIAG(LOW)
Notes
1. The circuit is DC adjusted at VP = ±15 to ±30 V.
2. Temperature sensor or maximum current sensor activated.
2001 Dec 11
12
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
13 AC CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Single-ended application; note 1
Po
THD
output power
total harmonic distortion
Gv(cl)
closed-loop voltage gain
η
efficiency
RL = 4 Ω; THD = 0.5%; VP = ±25 V
50(2)
55
−
W
RL = 4 Ω; THD = 10%; VP = ±25 V
60(2)
65
−
W
RL = 4 Ω; THD = 0.5%; VP = ±27 V
60(2)
65
−
W
RL = 4 Ω; THD = 10%; VP = ±27 V
74(2)
80
−
W
fi = 1 kHz
−
0.01
0.05
%
fi = 10 kHz
−
0.1
−
%
29
30
31
dB
Po = 30 W; fi = 1 kHz; note 4
−
94
−
%
RL = 8 Ω; THD = 0.5%; VP = ±25 V
100(2)
112
−
W
RL = 8 Ω; THD = 10%; VP = ±25 V
128(2)
140
−
W
RL = 4 Ω; THD = 0.5%; VP = ±17 V
80(2)
87
−
W
RL = 4 Ω; THD = 10%; VP = ±17 V
100(2)
110
−
W
fi = 1 kHz
−
0.01
0.05
%
fi = 10 kHz
−
0.1
−
%
Po = 1 W; note 3
Mono BTL application; note 5
Po
THD
output power
total harmonic distortion
Gv(cl)
closed loop voltage gain
η
efficiency
Po = 1 W; note 3
Po = 30 W; fi = 1 kHz; note 4
35
36
37
dB
−
94
−
%
Notes
1. VP = ±25 V; RL = 4 Ω; fi = 1 kHz; Tamb = 25 °C; measured in reference design in Figs 9 and 11; unless otherwise
specified.
2. Indirectly measured; based on Rds(on) measurement.
3. Total Harmonic Distortion (THD) is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using
a low-order low-pass filter a significantly higher value will be found, due to the switching frequency outside the audio
band.
4. Efficiency for power stage; output power measured across the loudspeaker load.
5. VP = ±25 V; RL = 8 Ω; fi = 1 kHz; Tamb = 25 °C; measured in reference design in Figs 9 and 11; unless otherwise
specified.
2001 Dec 11
13
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
14 SWITCHING CHARACTERISTICS
VP = ±25 V; Tamb = 25 °C; measured in Fig.8; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PWM outputs (pins OUT1 and OUT2); see Fig.7
tr
rise time
−
30
−
ns
tf
fall time
−
30
−
ns
tblank
blanking time
−
70
−
ns
tPD
propagation delay
from pin SW to pin PWM
−
20
−
ns
tW(min)
minimum pulse width
note 1
−
220
270
ns
Rds(on)
on-resistance of the output
transistors
−
0.2
0.3
Ω
Note
1. When used in combination with the TDA8929T controller, the effective minimum pulse width during clipping is
0.5tW(min).
14.1
Duty factor
For the practical useable minimum and maximum duty factor (δ) which determines the maximum output power:
t W(min) × f osc
t W(min) × f osc
------------------------------- × 100% < δ <  1 – ------------------------------- × 100%
2
2
Using the typical values: 3.5% < δ < 96.5%.
2001 Dec 11
14
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
1/f osc
handbook, full pagewidth
VDD
PWM
output
(V)
0V
VSS
tr
tf
t blank
t PD
VSTAB
VSW
(V)
VSS
VSTAB
VREL
(V)
VSS
MGW145
100 ns
Fig.7 Timing diagram PWM output, switch and release signals.
2001 Dec 11
15
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6
BOOT1
7
OUT1
12 kΩ
EN1 4
SW1 1
REL1 2
CONTROL
AND
HANDSHAKE
DRIVER
HIGH
15 nF
DRIVER
LOW
STAB 9
temp
DIAG 3
16
12 V
POWERUP 15
TEMPERATURE SENSOR
AND
current
CURRENT PROTECTION
EN2 14
100
nF
SW2 17
REL2 16
V
VEN
VSW1
12 V
0
V
VREL1 VSTAB
V
VDIAG
CONTROL
AND
HANDSHAKE
VOUT1 V
VSS1
2VDD
VDD2
12
BOOT2
11
OUT2
DRIVER
HIGH
15 nF
DRIVER
LOW
V
VSW2
VREL2
12 V
0
Philips Semiconductors
5
TDA8927J
Power stage 2 × 80 W class-D
audio amplifier
VDD1
15 TEST AND APPLICATION INFORMATION
andbook, full pagewidth
2001 Dec 11
VDD2
13
8
10
VSS1
VSS2
VOUT2 V
MGW184
Objective specification
TDA8927
Fig.8 Test diagram.
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
15.1
TDA8927
BTL application
When using the system in a mono BTL application (for more output power), the inputs of both channels of the PWM
modulator must be connected in parallel; the phase of one of the inputs must be inverted. In principle the loudspeaker
can be connected between the outputs of the two single-ended demodulation filters.
15.2
Remarks
The case of the package of the TDA8927J/ST and the heatsink of the TDA8927TH are internally connected to VSS.
15.3
Output power
The output power in single-ended applications can be estimated using the formulae:
2
RL
------------------------------------------------ × V P × ( 1 – t W(min) × f osc )
( R L + R ds(on) + R s )
= -------------------------------------------------------------------------------------------------------------------------2 × RL
P o(1%)
[ V P × ( 1 – t W(min) × f osc ) ]
The maximum current I O(max) = --------------------------------------------------------------- should not exceed 7.5 A.
R L + R ds(on) + R s
The output power in BTL applications can be estimated using the formulae:
2
RL
---------------------------------------------------------- × 2V P × ( 1 – t W(min) × f osc )
R L + 2 × ( R ds(on) + R s )
= ---------------------------------------------------------------------------------------------------------------------------------------2 × RL
P o(1%)
[ 2V P × ( 1 – t W(min) × f osc ) ]
The maximum current I O(max) = -------------------------------------------------------------------- should not exceed 7.5 A.
R L + 2 × ( R ds(on) + R s )
Where:
RL = load impedance
Rs = series resistance of filter coil
Po(1%) = output power just at clipping
The output power at THD = 10%: Po(10%) = 1.25 × Po(1%).
15.4
Reference designs
The reference design for a two-chip class-D audio amplifier for TDA8926J or TDA8927J and TDA8929T is shown in
Fig.9. The Printed-Circuit Board (PCB) layout is shown in Fig.10. The bill of materials is given in Table 1.
The reference design for a two-chip class-D audio amplifier for TDA8926TH or TDA8927TH and TDA8929T is shown in
Fig.11. The PCB layout is shown in Fig.12.
2001 Dec 11
17
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R19
39 kΩ
R20
3
MODE
6
on
mute
off
R1
GND
OSC
7
TDA8929T
SGND1
GND
SGND2
IN1+
C22
330 pF
IN1−
IN2+
C23
330 pF
R5
10 kΩ
C26
470 nF
R4
10 kΩ
C28
18
EN2
VDDD
IN2−
STAB
C4
220 nF
VSSD
DIAGCUR
CONTROLLER
4
21
8
23
9
20
D2
(7.5 V)
VSSA VSSD
C43
R10
180 pF
22
5
C27
470 nF
R6
10 kΩ
R24
200 kΩ
11
POWERUP
C5
STAB
220 nF
DIAG
J1
J3
QGND
QGND
−25 V
VDD
inputs
5
13
9
10
3
EN1
REL1
REL1
SW1
SW1
8
6
4
2
VDD1
R15
24 Ω
C15
220 nF
C19
1 nF
QGND
OUT2−
2
1
C17
220 nF
C16
470 nF
BOOT1
C9
15 nF
L4
PWM1
R14
5.6 Ω
C13
560 pF
8Ω
BTL
OUT1+
QGND
C20
1 nF
OUT1−
2
Sumida 33 µH
CDRH127-330
7
VDDD
R16
24 Ω
4 or 8 Ω
SE
OUT2+
GND
VSSD
L7
bead
1
C6
220 nF
VSS1
OUT1
1
VDDD
VDD2
C7
220 nF
VSS2
OUT2−
2
C14
470 nF
1
C21
1 nF
QGND
4 or 8 Ω
SE
OUT1+
outputs
VSSD
VDDA
L5
bead
R21
10 kΩ
C32
220 nF
C34
1500 µF
(35 V)
R22
9.1 kΩ
C33
220 nF
C35
1500 µF
(35 V)
VDDD
C36
220 nF
C37
220 nF
C40
47 µF
(35 V)
GND
2
VSS
J2
VSS
TDA8926J
or
TDA8927J
L2
Sumida 33 µH
CDRH127-330
BOOT2
C12
560 pF
3
J4
15
12
U1
n.c.
1
GND
14
C8
15 nF
R13
5.6 Ω
C30
1 nF
input 2
OUT2
POWER STAGE
1 nF
input 1
11
16
1 kΩ
EN1
QGND
+25 V
17
15
R7
10 kΩ
C29
1 nF
SW2
QGND
C18
1 nF
C31
1 nF
bead
L6
VSSD
C38
220 nF
C39
220 nF
C41
47 µF
(35 V)
VSSA
power supply
QGND
MLD633
Fig.9 Two-chip class-D audio amplifier application diagram for TDA8926J or TDA8927J and TDA8929T.
Objective specification
R21 and R22 are only necessary in BTL applications with asymmetrical supply.
BTL: remove R6, R7, C23, C26 and C27 and close J5 and J6.
C22 and C23 influence the low-pass frequency response and should be tuned with the real load (loudspeaker).
Inputs floating or inputs referenced to QGND (close J1 and J4) or referenced to VSS (close J2 and J3) for an input signal ground reference.
TDA8927
handbook, full pagewidth
18
C24
470 nF
2
24
J6
C25
470 nF
19
R12
5.6 Ω
R11
5.6 Ω
REL2
VSSD
C11
560 pF
C10
560 pF
1
PWM2
17
SW2
13
REL2
14
EN2
16
C3
220 nF
J5
12
U2
27 kΩ
VDDD
VSSA
VSS2 VSS1
10
C44
220 nF
S1
VSSA
220 nF
220 nF
VDD1 VDD2
39 kΩ
D1
(5.6 V)
C1
C2
Philips Semiconductors
VDDA
Power stage 2 × 80 W class-D
audio amplifier
2001 Dec 11
mode select
VDDA
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C24
C16
C40
C34
C25
C35
C14
C26
C41
C27
L7
state of D art
Version 21 03-2001
D2
L6
Out1
Out2
L5
S1
VSS
GND
VDD
In1
ON
MUTE
OFF
Philips Semiconductors
D1
U1
Power stage 2 × 80 W class-D
audio amplifier
handbook, full pagewidth
2001 Dec 11
TDA8926J/27J & TDA8929T
In2
Silk screen top, top view
Copper top, top view
19
L4
R19
C1
R20
C6
R16
C17
C9
C32 C12
R13
R15
C36
U2
C5
C15
R11
C33 C10
C8
C7
R12
C11
C4 C3
Out1
Out2
C19
In1
R5
VSS
In2
J2
C18 C30
C31
R6
J3
J1
C20
J6
R7
R4
C29
C28
GND
C37
C39
R21 R22
VDD
J5
J4
Silk screen bottom, top view
Copper bottom, top view
Fig.10 Printed-circuit board layout for TDA8926J or TDA8927J and TDA8929T.
MLD634
TDA8927
QGND
Objective specification
C21
C22
C23
R1 C2
R24
L2
C44
C38
C43
C13 R10
R14
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R1
30 kΩ
R2
D1
(5.6 V)
MODE
R3
GND
3
6
OSC
VDDD
VSSA
10
12
1
PWM2
17
SW2
13
REL2
14
EN2
16
U2
27 kΩ
VSSD
SW2
REL2
EN2
TDA8929T
GND
SGND2
IN1+
C3
330 pF
IN1−
IN2+
20
C4
330 pF
19
2
18
IN2−
VSSD
11
5
CONTROLLER
4
22
21
8
23
9
DIAGCUR
C13
100 nF
VSSA
C15
180 pF
C6
1 µF
R4
10 kΩ
C7
1 µF
R5
10 kΩ
C8
1 µF
R6
10 kΩ
20
C9
C10
1 nF
input 2
J1
J3
QGND
J4
QGND
J2
VSS
inputs
POWERUP
C14
STAB
100 nF STAB
R8
13
14 TDA8926TH
6
10
2
or
11
TDA8927TH
7
8
DIAG
23
POWER STAGE
EN1
REL1
REL1
SW1
SW1
5
3
24
22
21
LIM
VSSD
17
C26
15 nF
BOOT2
VDDD
VDD2
C27
100 nF
VSS2
C28
100
nF
C29
100 nF
C31
1500 µF
(35 V)
C38
220 nF
C41
1 nF
C37
470 nF
C33
15 nF
L3
bead
QGND
OUT2−
C35
560 pF
R17
5.6 Ω
8Ω
BTL
OUT1+
QGND
C42
1 nF
OUT1−
2
Sumida 33 µH
CDRH127-330
L4
R15
5.6 Ω
C39
220 nF
4 or 8 Ω
SE
OUT2+
1
C32
1500 µF
(35 V)
BOOT1
C34
560 pF
R16
5.6 Ω
2
VSSD
R14
5.6 Ω
1
GND
C30
100 nF
VSS1
1, 12, 18, 20
OUT2−
2
C36
470 nF
4
n.c.
L2
VDD1
OUT1
C40
1 nF
Sumida 33 µH
CDRH127-330
PWM1
1
C43
1 nF
QGND
4 or 8 Ω
SE
OUT1+
outputs
VDDD VSSD
L7
bead
QGND
L5
bead
C16
1 nF
+25 V
input 1
15
n.c.
R7
10 kΩ
1 nF
OUT2
U1
EN1
15
C5
1 µF
D2
(7.5 V)
VSSD
QGND
L1
bead
9
16
1 kΩ
24
J6
STAB
R13
5.6 Ω
R12
5.6 Ω
19
VDDD
R18
200 kΩ
C2
SGND1
VSS(sub)
VSSD
C25
560 pF
C24
560 pF
VSS2 VSS1
7
220 nF
J5
100 nF
C1
220 nF
S1
VSSA
100 nF
VDD1 VDD2
39 kΩ
on
mute
off
C11
C12
Philips Semiconductors
VDDA
Power stage 2 × 80 W class-D
audio amplifier
2001 Dec 11
mode select
VDDA
−25 V
VDDA
VDDD
VDD
R9
10 kΩ
1
GND
R11
5.6 Ω
C18
100 nF
C19
100 nF
C22
47 µF
(35 V)
C20
100 nF
C21
100 nF
C23
47 µF
(35 V)
GND
2
3
QGND
VSS
C17
1 nF
R10
9.1 kΩ
bead
L6
VSSD
VSSA
power supply
MGW232
Fig.11 Two-chip class-D audio amplifier application diagram for TDA8926TH or TDA8927TH and TDA8929T.
Objective specification
R9 and R10 are only necessary in BTL applications with asymmetrical supply.
BTL: remove R6, R7, C4, C7 and C8 and close J5 and J6.
Demodulation coils L2 and L4 should be matched in BTL.
Inputs floating or inputs referenced to QGND (close J1 and J4) or referenced to VSS (close J2 and J3).
TDA8927
handbook, full pagewidth
QGND
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TDA8926TH/27TH
TDA8929T
C31
L3
C22
D1
C36
L1
C32
Out1
State of D art
Version 2CTH1
L6
C23
L5
Out2
S1
ON
MU
OFF
VDD GND VSS
In2
In1
Silk screen top, top view
Philips Semiconductors
Power stage 2 × 80 W class-D
audio amplifier
dbook, full pagewidth
2001 Dec 11
C37
Copper top, top view
21
R14
R15
C35
L4
C34
Jan 2001
R8
C33
C1 C15 C11 C20
R1 R2
U1
C29
U2
C28
C14
C3 C18
C4
C27
C30
L5
C25
R13
R12
R17 C39 C38 R16
C12 C19
C13
C26
C24
R9
L7
R10 C10
C2
R11
C9
R3 C8
C7
R7
R6
R4
R5
C21
J6
J5
C5
C6
J2
C43 C42 C41 C40 C16 C17
QGND
J4
J3
J1
MGW147
Copper bottom, top view
TDA8927
Fig.12 Printed-circuit board layout for TDA8926TH or TDA8927TH and TDA8929T.
Objective specification
Silk screen bottom, top view
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
15.5
TDA8927
Reference design bill of materials
Table 1
Two-chip class-D audio amplifier PCB (Version 2.1; 03-2001) for TDA8926J or TDA8927J and TDA8929T
(see Figs 9 and 10)
COMPONENT
In1 and In2
DESCRIPTION
VALUE
COMMENTS
2 × Farnell: 152-396
Cinch input connectors
Out1, Out2, VDD, supply/output connectors
GND and VSS
2 × Augat 5KEV-02;
1 × Augat 5KEV-03
S1
on/mute/off switch
PCB switch Knitter ATE 1 E M-O-M
U1
power stage IC
TDA8926J/27J
DBS17P package
U2
controller IC
TDA8929T
SO24 package
L2 and L4
demodulation filter coils
33 µH
2 × Sumida CDRH127-330
3 × Murata BL01RN1-A62
L5, L6 and L7
power supply ferrite beads
C1 and C2
supply decoupling capacitors for
VDD to VSS of the controller
220 nF/63 V
2 × SMD1206
C3
clock decoupling capacitor
220 nF/63 V
SMD1206
C4
12 V decoupling capacitor of the
controller
220 nF/63 V
SMD1206
C5
12 V decoupling capacitor of the power
stage
220 nF/63 V
SMD1206
C6 and C7
supply decoupling capacitors for
VDD to VSS of the power stage
220 nF/63 V
SMD1206
C8 and C9
bootstrap capacitors
15 nF/50 V
2 × SMD0805
C10, C11,
C12 and C13
snubber capacitors
560 pF/100 V
4 × SMD0805
C14 and C16
demodulation filter capacitors
470 nF/63 V
2 × MKT
C15 and C17
resonance suppress capacitors
220 nF/63 V
2 × SMD1206
C18, C19,
C20 and C21
common mode HF coupling capacitors
1 nF/50 V
4 × SMD0805
C22 and C23
input filter capacitors
330 pF/50 V
2 × SMD1206
C24, C25,
C26 and C27
input capacitors
470 nF/63 V
4 × MKT
C28, C29,
C30 and C31
common mode HF coupling capacitors
1 nF/50 V
2 × SMD0805
C32 and C33
power supply decoupling capacitors
220 nF/63 V
2 × SMD1206
C34 and C35
power supply electrolytic capacitors
1500 µF/35 V
2 × Rubycon ZL very low ESR (large
switching currents)
C36, C37,
C38 and C39
analog supply decoupling capacitors
220 nF/63 V
4 × SMD1206
C40 and C41
analog supply electrolytic capacitors
47 µF/35 V
2 × Rubycon ZA low ESR
C43
diagnostic capacitor
180 pF/50 V
SMD1206
C44
mode capacitor
220 nF/63 V
SMD1206
D1
5.6 V zener diode
BZX79C5V6
DO-35
D2
7.5 V zener diode
BZX79C7V5
DO-35
R1
clock adjustment resistor
27 kΩ
SMD1206
2001 Dec 11
22
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
COMPONENT
TDA8927
DESCRIPTION
VALUE
COMMENTS
R4, R5,
R6 and R7
input resistors
10 kΩ
4 × SMD1206
R10
diagnostic resistor
1 kΩ
SMD1206
R11, R12,
R13 and R14
snubber resistors
5.6 Ω; >0.25 W
4 × SMD1206
R15 and R16
resonance suppression resistors
24 Ω
2 × SMD1206
R19
mode select resistor
39 kΩ
SMD1206
R20
mute select resistor
39 kΩ
SMD1206
R21
resistor needed when using an
asymmetrical supply
10 kΩ
SMD1206
R22
resistor needed when using an
asymmetrical supply
9.1 kΩ
SMD1206
R24
bias resistor for powering-up the power
stage
200 kΩ
SMD1206
15.6
Curves measured in reference design
MLD627
102
handbook, halfpage
MLD628
102
handbook, halfpage
THD+N
(%)
THD+N
(%)
10
10
1
1
(1)
10−1
10−1
(1)
10−2
(2)
(2)
10−2
(3)
10−3 −2
10
10−1
1
10
10−3
10
102
103
Po (W)
2 × 8 Ω SE; VP = ±25 V:
(1) 10 kHz.
103
104
f i (Hz)
105
2 × 8 Ω SE; VP = ±25 V:
(1) Po = 10 W.
(2) Po = 1 W.
(2) 1 kHz.
(3) 100 Hz.
Fig.13 THD + N as a function of output power.
2001 Dec 11
102
Fig.14 THD + N as a function of input frequency.
23
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
MLD629
102
handbook, halfpage
MLD630
102
handbook, halfpage
THD+N
(%)
THD+N
(%)
10
10
1
1
(1)
(1)
10−1
10−1
(2)
(2)
10−2
10−3 −2
10
10−2
(3)
10−1
1
10
10−3
10
102
103
Po (W)
2 × 4 Ω SE; VP = ±25 V:
(1) 10 kHz.
(2) 1 kHz.
(3) 100 Hz.
102
103
104
f i (Hz)
105
2 × 4 Ω SE; VP = ±25 V:
(1) Po = 10 W.
(2) Po = 1 W.
Fig.15 THD + N as a function of output power.
Fig.16
Fig.16 THD + N as a function of input frequency.
MLD631
102
handbook, halfpage
MLD632
102
handbook, halfpage
THD+N
(%)
THD+N
(%)
10
10
1
1
(1)
(1)
10−1
10−1
(2)
(2)
10−2
10−3 −2
10
10−2
(3)
10−1
1
10
10−3
10
102
103
Po (W)
1 × 8 Ω BTL; VP = ±25 V:
(1) 10 kHz.
103
104
f i (Hz)
105
1 × 8 Ω BTL; VP = ±25 V:
(1) Po = 10 W.
(2) Po = 1 W.
(2) 1 kHz.
(3) 100 Hz.
Fig.17 THD + N as a function of output power.
2001 Dec 11
102
Fig.18 THD + N as a function of input frequency.
24
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
MLD609
25
MLD610
100
handbook, halfpage
handbook, halfpage
(3)
η
(%)
P
(W)
(1)
(2)
80
20
15
60
(1)
(2)
10
40
(3)
5
0
10−2
20
10−1
1
10
0
103
102
Po (W)
0
VP = ±25 V; fi = 1 kHz:
(1) 2 × 4 Ω SE.
(2) 1 × 8 Ω BTL.
(3) 2 × 8 Ω SE.
60
90
120
150
Po (W)
VP = ±25 V; fi = 1 kHz:
(1) 2 × 4 Ω SE.
(2) 1 × 8 Ω BTL.
(3) 2 × 8 Ω SE.
Fig.19 Power dissipation as a function of output
power.
Fig.20 Efficiency as a function of output power.
MLD611
200
Po
30
MLD612
200
Po
handbook, halfpage
handbook, halfpage
(W)
160
(W)
160
(2)
(2)
120
120
(1)
(3)
(1)
80
80
(3)
(4)
(4)
40
0
10
40
15
20
25
30
0
10
35
15
VP (V)
20
25
30
35
VP (V)
THD + N = 0.5%; fi = 1 kHz:
THD + N = 10%; fi = 1 kHz:
(1) 1 × 4 Ω BTL.
(2) 1 × 8 Ω BTL.
(1) 1 × 4 Ω BTL.
(2) 1 × 8 Ω BTL.
(3) 2 × 4 Ω SE.
(4) 2 × 8 Ω SE.
(3) 2 × 4 Ω SE.
(4) 2 × 8 Ω SE.
Fig.21 Output power as a function of supply
voltage.
Fig.22 Output power as a function of supply
voltage.
2001 Dec 11
25
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
MLD613
0
handbook, halfpage
αcs
(dB)
αcs
(dB)
−20
−20
−40
−40
−60
−60
(1)
−80
−100
(1)
−80
(2)
10
MLD614
0
handbook, halfpage
102
103
104
f i (Hz)
−100
105
(2)
10
102
103
104
f i (Hz)
105
2 × 8 Ω SE; VP = ±25 V:
(1) Po = 10 W.
(2) Po = 1 W.
2 × 4 Ω SE; VP = ±25 V:
(1) Po = 10 W.
(2) Po = 1 W.
Fig.23 Channel separation as a function of input
frequency.
Fig.24 Channel separation as a function of input
frequency.
MLD615
45
MLD616
45
handbook, halfpage
handbook, halfpage
G
(dB)
G
(dB)
40
40
35
35
(1)
(1)
(2)
30
30
(2)
25
20
(3)
25
(3)
10
102
103
104
f i (Hz)
20
105
VP = ±25 V; Vi = 100 mV;
Rs = 10 kΩ/Ci = 330 pF:
(1) 1 × 8 Ω BTL.
(2) 2 × 8 Ω SE.
(3) 2 × 4 Ω SE.
102
103
104
f i (Hz)
105
VP = ±25 V; Vi = 100 mV;
Rs = 0 Ω:
(1) 1 × 8 Ω BTL.
(2) 2 × 8 Ω SE.
(3) 2 × 4 Ω SE.
Fig.25 Gain as a function of input frequency.
2001 Dec 11
10
Fig.26 Gain as a function of input frequency.
26
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
MLD617
0
MLD618
0
handbook, halfpage
handbook, halfpage
SVRR
(dB)
SVRR
(dB)
−20
−20
−40
−40
(1)
(1)
−60
−60
(2)
(2)
(3)
(3)
−80
−100
−80
10
102
103
104
f i (Hz)
−100
105
Fig.27 SVRR as a function of input frequency.
2
3
5
4
Vripple (V)
Fig.28 SVRR as a function of Vripple (p-p).
MLD619
MLD620
380
handbook, halfpage
handbook, halfpage
(mA)
fclk
(kHz)
80
372
60
364
40
356
20
348
0
0
1
VP = ±25 V; Vripple with respect to GND:
(1) fripple = 1 kHz.
(2) fripple = 100 Hz.
(3) fripple = 10 Hz.
VP = ±25 V; Vripple = 2 V (p-p) with respect to GND:
(1) Both supply lines in anti-phase.
(2) Both supply lines in phase.
(3) One supply line rippled.
100
Iq
0
10
20
30
340
37.5
VP (V)
0
10
20
40
30
VP (V)
RL = open.
RL = open.
Fig.29 Quiescent current as a function of supply
voltage.
Fig.30 Clock frequency as a function of supply
voltage.
2001 Dec 11
27
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
MLD622
MLD621
5
Vripple
(V)
5
handbook, halfpage
handbook, halfpage
SVRR
(%)
4
4
3
3
(1)
(1)
2
2
1
0
10−2
1
(2)
10−1
1
10
Po (W)
0
10
102
VP = ±25 V; 1500 µF per supply line; fi = 10 Hz:
(1) 1 × 4 Ω SE.
(2) 1 × 8 Ω SE.
102
103
f i (Hz)
104
VP = ±25 V; 1500 µF per supply line:
(1) Po = 30 W into 1 × 4 Ω SE.
(2) Po = 15 W into 1 × 8 Ω SE.
Fig.31 Supply voltage ripple as a function of output
power.
Fig.32 SVRR as a function of input frequency.
MLD623
10
(2)
MLD624
50
Po
handbook, halfpage
handbook, halfpage
THD+N
(%)
(W)
40
1
(1)
30
10−1
(2)
20
(3)
10−2
10
10−3
100
200
300
400
0
100
500
600
fclk (kHz)
VP = ±25 V; Po = 1 W in 2 × 8 Ω:
(1) 10 kHz.
(2) 1 kHz.
(3) 100 Hz.
300
400
500
600
fclk (kHz)
VP = ±25 V; RL = 2 × 8 Ω; fi = 1 kHz; THD + N = 10%.
Fig.34 Output power as a function of clock
frequency.
Fig.33 THD + N as a function of clock frequency.
2001 Dec 11
200
28
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
MLD625
150
Iq
handbook, halfpage
Vr(PWM)
(mA)
120
(mV)
800
90
600
60
400
30
200
0
100
MLD626
1000
handbook, halfpage
200
300
400
0
100
500
600
fclk (kHz)
200
300
400
500
600
fclk (kHz)
VP = ±25 V; RL = open.
VP = ±25 V; RL = 2 × 8 Ω.
Fig.35 Quiescent current as a function of clock
frequency.
Fig.36 PWM residual voltage as a function of clock
frequency.
2001 Dec 11
29
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
16 PACKAGE OUTLINES
DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)
SOT243-1
non-concave
Dh
x
D
Eh
view B: mounting base side
d
A2
B
j
E
A
L3
L
Q
c
1
v M
17
e1
Z
bp
e
e2
m
w M
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A2
bp
c
D (1)
d
Dh
E (1)
e
mm
17.0
15.5
4.6
4.4
0.75
0.60
0.48
0.38
24.0
23.6
20.0
19.6
10
12.2
11.8
2.54
e1
e2
1.27 5.08
Eh
j
L
L3
m
Q
v
w
x
Z (1)
6
3.4
3.1
12.4
11.0
2.4
1.6
4.3
2.1
1.8
0.8
0.4
0.03
2.00
1.45
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
97-12-16
99-12-17
SOT243-1
2001 Dec 11
EUROPEAN
PROJECTION
30
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
RDBS17P: plastic rectangular-DIL-bent-SIL power package; 17 leads (row spacing 2.54 mm)
SOT577-1
non-concave
Dh
x
D
Eh
view B: mounting base side
d
A2
B
j
E
A
L
1
e2
17
e1
Z
w M
bp
e
Q
c
v M
L1
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A2
bp
c
D(1)
d
Dh
E(1)
e
e1
e2
Eh
j
L
mm
13.5
4.6
4.4
0.75
0.60
0.48
0.38
24.0
23.6
20.0
19.6
10
12.2
11.8
2.54
1.27
2.54
6
3.4
3.1
4.7
4.1
L1
Q
v
w
x
Z(1)
4.7
4.1
2.1
1.8
0.6
0.4
0.03
2.00
1.45
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
00-01-19
00-03-15
SOT577-1
2001 Dec 11
EUROPEAN
PROJECTION
31
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height
SOT566-2
E
D
A
x
X
c
E2
y
HE
v M A
D1
D2
12
1
pin 1 index
Q
A
A2
E1
(A3)
A4
θ
Lp
detail X
24
13
Z
w M
bp
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
A2
max.
3.5
3.5
3.2
A3
0.35
A4(1)
D1
D2
E(2)
E1
E2
e
HE
Lp
Q
+0.12 0.53 0.32 16.0 13.0
−0.02 0.40 0.23 15.8 12.6
1.1
0.9
11.1
10.9
6.2
5.8
2.9
2.5
1.0
14.5
13.9
1.1
0.8
1.7
1.5
bp
c
D(2)
v
w
x
y
0.25 0.25 0.03 0.07
Z
θ
2.7
2.2
8°
0°
Notes
1. Limits per individual lead.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
00-03-24
SOT566-2
2001 Dec 11
EUROPEAN
PROJECTION
32
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
17 SOLDERING
17.1
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
17.3.2
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. Wave soldering can still be used
for certain surface mount ICs, but it is not suitable for fine
pitch SMDs. In these situations reflow soldering is
recommended.
17.2
17.2.1
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Through-hole mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
SOLDERING BY DIPPING OR BY SOLDER WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
17.2.2
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
17.3
17.3.1
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Surface mount packages
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
17.3.3
MANUAL SOLDERING
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C. When using a dedicated tool, all other leads can
be soldered in one operation within 2 to 5 seconds
between 270 and 320 °C.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
2001 Dec 11
WAVE SOLDERING
33
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
17.4
TDA8927
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
MOUNTING
PACKAGE
WAVE
suitable(2)
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
Surface mount
REFLOW(1) DIPPING
−
suitable
BGA, HBGA, LFBGA, SQFP, TFBGA
not suitable
suitable
−
HBCC, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, SMS
not suitable(3)
suitable
−
PLCC(4), SO, SOJ
suitable
suitable
−
suitable
−
suitable
−
recommended(4)(5)
LQFP, QFP, TQFP
not
SSOP, TSSOP, VSO
not recommended(6)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2001 Dec 11
34
Philips Semiconductors
Objective specification
Power stage 2 × 80 W class-D
audio amplifier
TDA8927
18 DATA SHEET STATUS
DATA SHEET STATUS(1)
PRODUCT
STATUS(2)
DEFINITIONS
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
19 DEFINITIONS
20 DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 Dec 11
35
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected].
SCA73
© Koninklijke Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753503/01/pp36
Date of release: 2001
Dec 11
Document order number:
9397 750 08191