查询TDA8920供应商 INTEGRATED CIRCUITS DATA SHEET TDA8920 2 × 80 W class-D power amplifier Product specification Supersedes data of 2002 Jun 06 2002 Sep 25 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 CONTENTS 15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) 16 APPLICATION INFORMATION 16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 16.9 16.10 16.11 16.12 BTL application MODE pin Output power estimation External clock Heatsink requirements Output current limiting Pumping effects Reference design PCB information for HSOP24 encapsulation Classification Reference design: bill of materials Curves measured in the reference design 17 PACKAGE OUTLINE 18 SOLDERING 18.1 Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 QUICK REFERENCE DATA 6 BLOCK DIAGRAM 7 PINNING 8 FUNCTIONAL DESCRIPTION 8.1 8.2 8.3 8.3.1 8.3.2 8.3.3 8.3.4 8.4 General Pulse width modulation frequency Protections Over-temperature Short-circuit across the loudspeaker terminals and to supply lines Start-up safety test Supply voltage alarm Differential audio inputs 9 LIMITING VALUES 10 THERMAL CHARACTERISTICS 11 QUALITY SPECIFICATION 12 STATIC CHARACTERISTICS 19 DATA SHEET STATUS 13 SWITCHING CHARACTERISTICS 20 DEFINITIONS 14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) 21 DISCLAIMERS 2002 Sep 25 18.2 18.3 18.4 18.5 2 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier 1 TDA8920 FEATURES 2 APPLICATIONS • High efficiency (∼90%) • Television sets • Operating voltage from ±12.5 to ±30 V • Home-sound sets • Very low quiescent current • Multimedia systems • Low distortion • All mains fed audio systems • Usable as a stereo Single-Ended (SE) amplifier or as a mono amplifier in Bridge-Tied Load (BTL) • Car audio (boosters). • Fixed gain of 30 dB in Single-Ended (SE) and 36 dB in Bridge-Tied Load (BTL) 3 GENERAL DESCRIPTION The TDA8920 is a high efficiency class-D audio power amplifier with very low dissipation. The typical output power is 2 × 80 W. The device comes in a HSOP24 power package with a small internal heatsink. Depending on supply voltage and load conditions a very small or even no external heatsink is required. The amplifier operates over a wide supply voltage range from ±12.5 to ±30 V and consumes a very low quiescent current. • High output power • Good ripple rejection • Internal switching frequency can be overruled by an external clock • No switch-on or switch-off plop noise • Short-circuit proof across the load and to the supply lines • Electrostatic discharge protection • Thermally protected. 4 ORDERING INFORMATION TYPE NUMBER TDA8920TH 2002 Sep 25 PACKAGE NAME DESCRIPTION VERSION HSOP24 plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3 3 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier 5 TDA8920 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT General; VP = ±25 V VP operating supply voltage Iq quiescent current η efficiency ±12.5 ±25 ±30 V no load connected − 55 75 mA Po = 30 W; SE: RL = 2 × 8 Ω; fi = 1 kHz − 90 − % RL = 8 Ω; THD = 10%; VP = ±25 V; note 1 36 39 − W RL = 4 Ω; THD = 10%; VP = ±27 V; note 1 74 80 − W RL = 4 Ω; THD = 10%; VP = ±17 V; note 1 100 110 − W RL = 8 Ω; THD = 10%; VP = ±25 V; note 1 128 140 − W Stereo single-ended configuration Po output power Mono bridge-tied load configuration Po output power Note 1. See also Section 16.5. 2002 Sep 25 4 2002 Sep 25 5 4 5 2 6 7 CONTROL AND ENABLE1 HANDSHAKE SWITCH1 RELEASE1 13 Fig.1 Block diagram. HW 19 CONTROL SWITCH2 AND HANDSHAKE RELEASE2 ENABLE2 TEMPERATURE SENSOR CURRENT PROTECTION VSSD PWM MODULATOR MANAGER VSSA2 VSSA1 OSCILLATOR STABI PWM MODULATOR 24 1 INPUT STAGE mute MODE mute INPUT STAGE 12 11 8 9 18 STABI PROT 16 15 20 VSSP2 VSSP1 21 22 VDDP2 VSSP1 14 VDDP1 17 DRIVER LOW DRIVER HIGH TDA8920TH DRIVER LOW DRIVER HIGH 23 VDDP2 MBL461 OUT2 BOOT2 OUT1 BOOT1 2 × 80 W class-D power amplifier (1) Pin 19 should be connected to pin 24 in the application. IN2− IN2+ SGND2 MODE OSC SGND1 IN1+ IN1− 10 VDDA1 6 3 handbook, full pagewidth V DDA2 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Philips Semiconductors Product specification TDA8920 BLOCK DIAGRAM Philips Semiconductors Product specification 2 × 80 W class-D power amplifier 7 TDA8920 PINNING SYMBOL PIN DESCRIPTION VSSA2 1 negative analog supply voltage for channel 2 SGND2 2 signal ground channel 2 VDDA2 3 positive analog supply voltage for channel 2 IN2− 4 negative audio input for channel 2 IN2+ 5 positive audio input for channel 2 MODE 6 mode select input (standby/mute/operating) OSC 7 oscillator frequency adjustment or tracking input IN1+ 8 positive audio input for channel 1 IN1− 9 negative audio input for channel 1 VDDA1 10 positive analog supply voltage for channel 1 SGND1 11 signal ground for channel 1 VSSA1 12 negative analog supply voltage for channel 1 PROT 13 time constant capacitor for protection delay VDDP1 14 positive power supply for channel 1 BOOT1 15 bootstrap capacitor for channel 1 OUT1 16 PWM output from channel 1 VSSP1 17 negative power supply voltage for channel 1 STABI 18 decoupling internal stabilizer for logic supply HW 19 handle wafer; must be connected to pin 24 VSSP2 20 negative power supply voltage for channel 2 OUT2 21 PWM output from channel 2 BOOT2 22 bootstrap capacitor for channel 2 VDDP2 23 positive power supply voltage for channel 2 VSSD 24 negative digital supply voltage handbook, halfpage VSSD 24 1 VSSA2 VDDP2 23 2 SGND2 BOOT2 22 3 VDDA2 OUT2 21 4 IN2− VSSP2 20 5 IN2+ 6 MODE STABI 18 7 OSC VSSP1 17 8 IN1+ OUT1 16 9 IN1− HW 19 TDA8920TH BOOT1 15 10 VDDA1 VDDP1 14 11 SGND1 PROT 13 12 VSSA1 MBL462 2002 Sep 25 (1) Pin 19 should be connected to pin 24 in the application. Fig.2 Pin configuration. 6 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier 8 8.1 TDA8920 FUNCTIONAL DESCRIPTION The amplifier system can be switched in three operating modes with the MODE select pin: General • Standby mode; with a very low supply current The TDA8920 is a two channel audio power amplifier using class-D technology. A typical application diagram is illustrated in Fig.37. A detailed application reference design is given in Section 16.8. The audio input signal is converted into a digital Pulse Width Modulated (PWM) signal via an analog input stage and PWM modulator. To enable the output power transistors to be driven, this digital PWM signal is applied to a control and handshake block and driver circuits for both the high side and low side. • Mute mode; the amplifiers are operational, but the audio signal at the output is suppressed • Operating mode (amplifier fully operational) with output signal. For suppressing plop noise the amplifier will remain, automatically, in the mute mode for approximately 150 ms before switching to operating mode; see Fig.4. In this time the coupling capacitors at the input are fully charged. An example of a switching circuit for driving the mode pin is illustrated in Fig.3. In this way a level shift is performed from the low power digital PWM signal (at logic levels) to a high power PWM signal which switches between the main supply lines. A 2nd-order low-pass filter converts the PWM signal to an analog audio signal across the loudspeaker. The TDA8920TH one-chip class-D amplifier contains high power D-MOS switches, drivers, timing and handshaking between the power switches and some control logic. For protection a temperature sensor and a maximum current detector are built-in. handbook, halfpage mute/on R The two audio channels of the TDA8920TH contain two PWMs, two analog feedback loops and two differential input stages. It also contains circuits common to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager. MODE pin R SGND MBL463 The TDA8920TH contains two independent amplifier channels with high output power, high efficiency (90%), low distortion and a low quiescent current. The amplifier channels can be connected in the following configurations: • Mono Bridge-Tied Load (BTL) amplifier Fig.3 Example of mode select circuit. • Stereo Single-Ended (SE) amplifiers. 2002 Sep 25 +5 V standby/ mute 7 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 audio handbook, full pagewidth switching Vmode When switching from standby to mute there is a delay of 100 ms before the output starts switching. The audio signal is available after the mode pin has been set to operating, but not earlier than 150 ms after switching to mute. operating 4V mute 2V 0 V (SGND) standby 100 ms time >50 ms audio switching Vmode When switching from standby to operating there is a first delay of 100 ms before the outputs starts switching. The audio signal is available after a second delay of 50 ms. operating 4V 0 V (SGND) standby 100 ms 50 ms time MBL465 Fig.4 Timing on mode select input. 8.2 If two or more class-D amplifiers are used in the same audio application, it is advisable to have all devices operating at the same switching frequency. Pulse width modulation frequency The output signal of the amplifier is a PWM signal with a carrier frequency of approximately 350 kHz. Using a 2nd-order LC demodulation filter in the application results in an analog audio signal across the loudspeaker. This switching frequency is fixed by an external resistor ROSC connected between pin OSC and VSSA. With the resistor value given in the schematic diagram of the reference design, the carrier frequency is typical 350 kHz. The carrier frequency can be calculated using the following This can be realized by connecting all OSC pins together and feed them from a external central oscillator. Using an external oscillator it is necessary to force the OSC pin to a DC-level above SGND for switching from internal to external oscillator. In this case the internal oscillator is disabled and the PWM will be switched on the external frequency. The frequency range of the external oscillator must be in the range as specified in the switching characteristics; see Chapter 13. 9 9 × 10 equation: f OSC = ------------------- Hz R OSC 2002 Sep 25 8 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 the demodulation filter) it will also be detected by the ‘start-up safety test’. Practical use of this test feature can be found in detection of short-circuits on the printed-circuit board. Application in a practical circuit: Internal oscillator: Rosc connected from pin OSC to VSS External oscillator: connect oscillator signal between pin OSC and SGND; delete ROSC and COSC. 8.3 Remark: this test is only operational prior to or during the start-up sequence, and not during normal operation. Protections During normal operation the maximum current protection is used to detect short-circuits across the load and with respect to the supply lines. Temperature, supply voltage and short-circuit protections sensors are included on the chip. In the event that the maximum current or maximum temperature is exceeded the system will shut down. 8.3.4 8.3.1 OVER-TEMPERATURE If the supply voltage falls below ±12.5 V the undervoltage protection is activated and system shuts down correctly. If the internal clock is used this switch-off will be silent and without plop noise. When the supply voltage rises above the threshold level the system is restarted again after 100 ms. If the supply voltage exceeds ±32 V the overvoltage protection is activated and the power stages shut down. They are re-enabled as soon as the supply voltage drops below the threshold level. If the junction temperature (Tj) exceeds 150 °C, then the power stage will shut down immediately. The power stage will start switching again if the temperature drops to approximately 130 °C, thus there is a hysteresis of approximately 20 °C. 8.3.2 SHORT-CIRCUIT ACROSS THE LOUDSPEAKER TERMINALS AND TO SUPPLY LINES An additional balance protection circuit compares the positive (VDD) and the negative (VSS) supply voltages and is triggered if the voltage difference between them exceeds a certain level. This level depends on the sum of both supply voltages. An expression for the unbalanced threshold level is as follows: Vunb,thr ~ 0.15 × (VDD + VSS). When the loudspeaker terminals are short-circuited or if one of the demodulated outputs of the amplifier is short-circuited to one of the supply lines this will be detected by the current protection. If the output current exceeds the maximum output current of 7.5 A, then the power stage will shut down within less than 1 µs and the high current will be switched off. In this state the dissipation is very low. Every 100 ms the system tries to restart again. If there is still a short-circuit across the loudspeaker load or to one of the supply lines, the system is switched off again as soon as the maximum current is exceeded. The average dissipation will be low because of this low duty cycle. 8.3.3 Example: with a symmetrical supply of ±30 V the protection circuit will be triggered if the unbalance exceeds approximately 9 V; see also Section 16.7. 8.4 Differential audio inputs For a high common mode rejection ratio and a maximum of flexibility in the application, the audio inputs are fully differential. By connecting the inputs anti-parallel the phase of one of the channels can be inverted, so that a load can be connected between the two output filters. In this case the system operates as a mono BTL amplifier and with the same loudspeaker impedance an approximately four times higher output power can be obtained. The input configuration for mono BTL application is illustrated in Fig.5; for more information see Chapter 16. START-UP SAFETY TEST During the start-up sequence, when the mode pin is switched from standby to mute, the condition at the output terminals of the power stage are checked. In the event of a short-circuit at one of the output terminals to VDD or VSS the start-up procedure is interrupted and the systems waits for open-circuit outputs. Because the test is done before enabling the power stages, no large currents will flow in the event of a short-circuit. This system protects for short-circuits at both sides of the output filter to both supply lines. When there is a short-circuit from the power PWM output of the power stage to one of the supply lines (before 2002 Sep 25 SUPPLY VOLTAGE ALARM In the stereo single-ended configuration it is also recommended to connect the two differential inputs in anti-phase. This has advantages for the current handling of the power supply at low signal frequencies. 9 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 handbook, full pagewidth OUT1 IN1+ IN1− Vin SGND IN2+ IN2− OUT2 power stage MBL466 Fig.5 Input configuration for mono BTL application. 2002 Sep 25 10 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT − ±30 V − 5.5 V − ±30 V − 7.5 A VP supply voltage Vms mode select switch input voltage Vsc short-circuit voltage of output pins IORM repetitive peak current in output pin Tstg storage temperature −55 +150 °C Tamb ambient temperature −40 +85 °C Tvj virtual junction temperature − 150 °C Ves(HBM) electrostatic discharge voltage (HBM) note 2 with respect to SGND note 1 all pins with respect to VDD (class 1a) −1500 +1500 V all pins with respect to SGND (class 1a) −1500 +1500 V all pins with respect to VSS (class 1a) −1500 +1500 V all pins (except pin 19) with respect to each other (class 1a) −1500 +1500 V pin 19 (HW) with respect to all other pins −500 Ves(MM) electrostatic discharge voltage (MM) +500 V +250 V note 3 all pins with respect to VDD (class B) −250 all pins with respect to SGND (class B) −250 +250 V all pins with respect to VSS (class A1) −150 +150 V all pins with respect to each other (class A1) −100 +100 V Notes 1. See also Section 16.6. 2. Human Body Model (HBM); Rs = 1500 Ω; C = 100 pF. 3. Machine Model (MM); Rs = 10 Ω; C = 200 pF; L = 0.75 mH. 10 THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth(j-a) thermal resistance from junction to ambient in free air; note 1 35 K/W Rth(j-c) thermal resistance from junction to case note 1 1.3 K/W Note 1. See also Section 16.5. 2002 Sep 25 11 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 11 QUALITY SPECIFICATION In accordance with “SNW-FQ611-part D” if this type is used as an audio amplifier (except for ESD; see also Chapter 9). 12 STATIC CHARACTERISTICS VP = ±25 V; Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage range note 1 ±12.5 ±25 ±30 Iq quiescent current no load connected − 55 75 mA Istb standby current − 100 500 µA V Mode select input; pin MODE Vms input voltage note 2 0 − 5.5 V Ims input current Vms = 5.5 V − − 1000 µA Vstb input voltage in mode select for standby mode notes 2 and 3 0 − 0.8 V Vmute input voltage in mode select for mute mode notes 2 and 3 2.2 − 3.0 V Von input voltage in mode select for on mode notes 2 and 3 4.2 − 5.5 V note 2 − 0 − V Audio inputs; pins IN2−, IN2+, IN1+ and IN1− VI DC input voltage Amplifier outputs; pins OUT1 and OUT2 VOOSE output offset voltage SE; on and mute − − 150 mV ∆VOOSE variation of output offset voltage SE; on ↔ mute − − 80 mV VOOBTL output offset voltage BTL; on and mute − − 215 mV ∆VOOBTL variation of output offset voltage BTL; on ↔ mute − − 115 mV mute and operating; note 4 11 13 15 V Stabilizer; pin STABI Vo(stab) stabilizer output voltage Temperature protection Tprot temperature protection activation 150 − − °C Thys hysteresis on temperature protection − 20 − °C Notes 1. The circuit is DC adjusted at VP = ±12.5 to ±30 V. 2. With respect to SGND (0 V). 3. The transition regions between standby, mute and on contain hysteresis (see Fig.6). 4. With respect to VSS1. 2002 Sep 25 12 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 MBL467 handbook, full pagewidth STBY 0 MUTE 0.8 2.2 ON 3.0 4.2 5.5 VMODE (V) Fig.6 Mode select pin behaviour. 13 SWITCHING CHARACTERISTICS VDD = ±25 V; Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Switching frequency fosc typical internal oscillator frequency ROSC = 30.0 kΩ; see Section 16.11 290 317 344 kHz fosc(int) internal oscillator frequency range note 1 210 − 600 kHz VOSC voltage at OSC pin external oscillator or frequency tracking SGND + 4.5 SGND + 5 VOSC(trip) trip level at OSC pin for tracking external oscillator or frequency tracking − SGND + 2.5 − V ftrack frequency range for tracking external oscillator or frequency tracking 210 − 600 kHz VP(OSC)(ext) minimum symmetrical supply voltage for external oscillator application 15 − − V external oscillator Note 1. Frequency set with ROSC, according to formula in Chapter 8. 2002 Sep 25 13 SGND + 6 V Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 14 DYNAMIC AC CHARACTERISTICS (STEREO AND DUAL SE APPLICATION) VP = ±25 V; RL = 4 Ω; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω (note 1); Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL Po PARAMETER output power CONDITIONS total harmonic distortion TYP. MAX. UNIT RL = 8 Ω; VP = ±20 V; THD = 0.5%; note 2 18 20 − W RL = 8 Ω; VP = ±20 V; THD = 10%; note 2 23 25 − W RL = 8 Ω; VP = ±25 V; THD = 0.5%; note 2 28 30 − W RL = 8 Ω; VP = ±25 V; THD = 10%; note 2 THD MIN. 36 39 − W RL = 4 Ω; VP = ±25 V; THD = 0.5%; note 2 51 55 − W RL = 4 Ω; VP = ±25 V; THD = 10%; note 2 65 70 − W RL = 4 Ω; VP = ±27 V; THD = 0.5%; note 2 60 65 − W RL = 4 Ω; VP = ±27 V; THD = 10%; note 2 74 80 − W fi = 1 kHz − 0.02 0.05 % fi = 10 kHz − 0.15 − % 29 30 31 dB Po = 1 W; note 3 Gv(cl) closed-loop voltage gain η efficiency Po = 30 W; SE: RL = 2 × 8 Ω; fi = 1 kHz; note 4 85 90 − % SVRR supply voltage ripple rejection on; fi = 100 Hz; note 5 − 55 − dB on; fi = 1 kHz; note 6 40 50 − dB mute; fi = 100 Hz; note 5 − 55 − dB standby; fi = 100 Hz; note 5 − 80 − dB 45 68 − kΩ on; Rs = 0 Ω; note 7 − 200 400 µV on; Rs = 10 kΩ; note 8 − 230 − µV mute; note 9 − 220 − µV note 10 − 70 − dB − − 1 dB − − 400 µV − 75 − dB Zi input impedance Vn(o) noise output voltage αcs channel separation ∆Gv channel unbalance Vo(mute) output signal in mute CMRR common mode rejection ratio Vi(CM) = 1 V (RMS) note 11 Notes 1. RsL = series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a lower order low-pass filter a significantly higher value is found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100% tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 Ω. 6. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 Ω. 7. B = 22 Hz to 22 kHz; Rs = 0 Ω; maximum limit is guaranteed but may not be 100% tested. 8. B = 22 Hz to 22 kHz; Rs = 10 kΩ. 9. B = 22 Hz to 22 kHz; independent of Rs. 2002 Sep 25 14 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 10. Po = 1 W; Rs = 0 Ω; fι = 1 kHz. 11. Vi = Vi(max) = 1 V (RMS); maximum limit is guaranteed but may not be 100% tested. 15 DYNAMIC AC CHARACTERISTICS (MONO BTL APPLICATION) VP = ±25 V; RL = 8 Ω; fi = 1 kHz; fosc = 310 kHz; RsL < 0.1 Ω (note 1); Tamb = 25 °C; measured in Fig.9; unless otherwise specified. SYMBOL Po THD Gv(cl) PARAMETER output power total harmonic distortion CONDITIONS MIN. TYP. MAX. UNIT RL = 8 Ω; VP = ±25 V; THD = 0.5%; note 2 100 110 − W RL = 8 Ω; VP = ±25 V; THD = 10%; note 2 140 − W RL = 8 Ω; VP = ±21 V; THD = 0.5%; note 2 73 79 − W RL = 8 Ω; VP = ±21 V; THD = 10%; note 2 100 − W RL = 4 Ω; VP = ±17 V; THD = 0.5%; note 2 66 75 − W RL = 4 Ω; VP = ±17 V; THD = 10%; note 2 100 110 − W fi = 1 kHz − 0.015 0.05 % fi = 10 kHz − 0.02 − % 35 36 37 dB 128 92 Po = 1 W; note 3 closed-loop voltage gain η efficiency Po = 140 W; fi = 1 kHz; note 4 85 89 − % SVRR supply voltage ripple rejection on; fi = 100 Hz; note 5 − 49 − dB on; fi = 1 kHz; note 6 36 44 − dB Zi input impedance Vn(o) noise output voltage mute; fi = 100 Hz; note 5 − 49 − dB standby; fi = 100 Hz; note 5 − 80 − dB 22 34 − kΩ on; Rs = 0 Ω; note 7 − 280 560 µV on; Rs = 10 kΩ; note 8 − 300 − µV mute; note 9 − 280 − µV note 10 − − 500 µV − 75 − dB Vo(mute) output signal in mute CMRR common mode rejection ratio Vi(CM) = 1 V (RMS) Notes 1. RsL = series resistance of inductor of low-pass LC filter in the application. 2. Output power is measured indirectly; based on RDSon measurement. 3. Total harmonic distortion is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low order low-pass filter a significant higher value will be found, due to the switching frequency outside the audio band. Maximum limit is guaranteed but may not be 100% tested. 4. Output power measured across the loudspeaker load. 5. Vripple = Vripple(max) = 2 V (p-p); fi = 100 Hz; Rs = 0 Ω. 6. Vripple = Vripple(max) = 2 V (p-p); fi = 1 kHz; Rs = 0 Ω. 7. B = 22 Hz to 22 kHz; Rs = 0 Ω; maximum limit is guaranteed but may not be 100% tested. 8. B = 22 Hz to 22 kHz; Rs = 10 kΩ. 9. B = 22 Hz to 22 kHz; independent of Rs. 10. Vi = Vi(max) = 1 V (RMS); fi = 1 kHz; maximum limit is guaranteed but may not be 100% tested. 2002 Sep 25 15 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 16 APPLICATION INFORMATION 16.1 BTL application BTL: P out_1% When using the system in the mono BTL application (for more output power), the inputs of both channels must be connected in parallel; the phase of one of the inputs must be inverted; see Fig.5. In principle the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 16.2 2 RL --------------------- × 2V P × ( 1 – t min × f osc ) R L + 1.2 = --------------------------------------------------------------------------------------------2 × RL 2V P × ( 1 – t min × f osc ) Maximum current: I out^ = -------------------------------------------------------R L + 1.2 should not exceed 7.5 A. Legend: RL = load impedance MODE pin fosc = oscillator frequency For correct operation the switching voltage at the mode pin should be debounced. If the mode pin is driven by a mechanical switch an appropriate debouncing low-pass filter should be used. If the mode pin is driven by an electronic circuit or microcontroller then it should remain at the mute voltage level for at least 100 ms before switching back to the standby voltage level. tmin = minimum pulse width (typical 190 ns) VP = single-sided supply voltage (so if supply ±30 V symmetrical → VP = 30 V) Pout_1% = output power just at clipping Pout_10% = output power at THD = 10% Pout_10% = 1.25 × Pout_1%. 16.3 Output power estimation 16.4 The output power in several applications (SE and BTL) can be estimated using the following expressions: SE: P out_1% External clock The minimum required symmetrical supply voltage for external clock application is ±15 V (equally the minimum asymmetrical supply for applications with an external clock is 30 V). 2 RL --------------------- × V P × ( 1 – t min × f osc ) R L + 0.6 = ----------------------------------------------------------------------------------------2 × RL When using an external clock the following accuracy of the duty cycle of the external clock has to be taken into account; 47.5% < DC, external clock < 52.5%. V P × ( 1 – t min × f osc ) Maximum current: I out^ = ---------------------------------------------------R L + 0.6 A possible solution for an external clock oscillator circuit is illustrated in Fig.7. should not exceed 7.5 A. VDDA handbook, full pagewidth 2 kΩ 0− 0+ 11 10 CTC ASTAB− 4 −TRIGGER ASTAB+ 5 6 1 14 VDD 120 pF RTC HEF4047BT 2 9.1 kΩ 7 RCTC 3 360 kHz 320 kHz VSS HOP 220 nF 5.6 V 4.3 V 13 8 +TRIGGER 9 12 MR RETRIGGER GND CLOCK MBL468 Fig.7 External oscillator circuit. 2002 Sep 25 16 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier 16.5 TDA8920 Heatsink requirements In some applications it may be necessary to connect an external heatsink to the TDA8920TH. The determining factor is the 150 °C maximum junction temperature [Tj(max)] which cannot be exceeded. The expression below shows the relationship between the maximum allowable power dissipation and the total thermal resistance from junction to ambient: MBL469 30 handbook, halfpage Pdiss (W) (1) 20 T j(max) – T A R th(j-a) = ---------------------------P diss (2) 10 Pdiss is determined by the efficiency (η) of the 1-chip class-D amplifier. The efficiency measured in the TDA8920TH as a function of output power is given in Fig.18. The power dissipation can be derived as function of output power; see Fig.17. (3) (4) (5) 0 0 The derating curves (given for several values of the Rth(j-a)) are illustrated in Fig.8. A maximum junction temperature Tj = 150 °C is taken into account. From Fig.8 the maximum allowable power dissipation for a given heatsink size can be derived or the required heatsink size can be determined at a required dissipation level. 20 (1) Rth(j-a) = 5 K/W. (2) Rth(j-a) = 10 K/W. (3) Rth(j-a) = 15 K/W. 40 60 100 80 Tamb (°C) (4) Rth(j-a) = 20 K/W. (5) Rth(j-a) = 35 K/W. Example 1: Fig.8 Derating curves for power dissipation as a function of maximum ambient temperature. Pout = 2 × 30 W into 8 Ω Tj(max) = 150 °C Tamb = 60 °C Pdiss(tot) = 6 W (from Fig.17) 16.6 The required Rth(j-a) = 15 K/W can be calculated To guarantee the robustness of the class-D amplifier the maximum output current which can be delivered by the output stage is limited. An overcurrent protection is included for each output power switch. When the current flowing through any of the power switches exceeds a defined internal threshold (e.g. in case of a short-circuit to the supply lines or a short-circuit across the load), the amplifier will shut down immediately and an internal timer will be started. After a fixed time (e.g. 100 ms) the amplifier is switched on again. If the requested output current is still too high the amplifier will switch-off again. Thus the amplifier will try to switch to the operating mode every 100 ms. The average dissipation will be low in this situation because of this low duty cycle. If the overcurrent condition is removed the amplifier will remain operating. The Rth(j-a) of TDA8920 in free air is 35 K/W; the Rth(j-c) of TDA8920 is 1.3 K/W, thus a heatsink of 13.7 K/W is required for this example. In actual applications, other factors such as the average power dissipation with music source (as opposed to a continuous sine wave) will determine the size of the heatsink required. Example 2: Pout = 2 × 75 W into 4 Ω Tj(max) = 150 °C Tamb = 60 °C Pdiss(tot) = 17.5 W (from Fig.17) The required Rth(j-a) = 5.14 K/W Because the duty cycle is low the amplifier will be switched off for a relatively long period of time which will be noticed as a so-called audio-hole; an audible interruption in the output signal. The Rth(j-a) of TDA8920TH in free air is 35 K/W; the Rth(j-c) of TDA8920TH is 1.3 K/W, so a heatsink of 3.84 K/W is required for this example. 2002 Sep 25 Output current limiting 17 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 16.7 To trigger the maximum current protection in the TDA8920, the required output current must exceed 7.5 A. This situation occurs in case of: Pumping effects The TDA8920 class-D amplifier is supplied by a symmetrical voltage (e.g VDD = +25 V, VSS = −25 V). When the amplifier is used in a Single-Ended (SE) configuration a so-called ‘pumping effect’ can occur. During one switching interval energy is taken from one supply (e.g. VDD), while a part of that energy is delivered back to the other supply line (e.g. VSS) and visa versa. When the voltage supply source cannot sink energy the voltage across the output capacitors of that voltage supply source will increase: the supply voltage is pumped to higher levels. • Short-circuits from any output terminal to the supply lines (VDD or VSS) • Short-circuit across the load or speaker impedances or a load impedance below the specified values of 4 and 8 Ω. Even if load impedances are connected to the amplifier outputs which have an impedance rating of 4 Ω, this impedance can be lower due to the frequency characteristic of the loudspeaker; practical loudspeaker impedances can be modelled as an RLC network which will have a specific frequency characteristic: the impedance at the output of the amplifier will vary with the input frequency. A high supply voltage in combination with a low impedance will result in large current requirements. The voltage increase caused by the pumping effect depends on: • Speaker impedance • Supply voltage • Audio signal frequency Another factor which must be taken into account is the ripple current which will also flow through the output power switches. This ripple current depends on the inductor values which are used, supply voltage, oscillator frequency, duty factor and minimum pulse width. The maximum available output current to drive the load impedance can be calculated by subtracting the ripple current from the maximum repetitive peak current in the output pin, which is 7.5 A for the TDA8920TH. • Capacitor value present on supply lines • Source/sink currents of other channels. The pumping effect should not cause a malfunction of either the audio amplifier and/or the voltage supply source. For instance, this malfunction can be caused by triggering of the undervoltage or overvoltage protection or unbalance protection of the amplifier. 16.8 As a rule of thumb the following expressions can be used to determine the minimum allowed load impedance without generating audio holes: Reference design The reference design for the single-chip class-D audio amplifier for TDA8920TH is illustrated in Fig.9. The Printed-Circuit Board (PCB) layout is shown in Fig.10. The Bill Of Materials (BOM) is given in Table 1. V P ( 1 – t min f osc ) Z L ≥ --------------------------------------- – 0.6 SE application. I ORM – I ripple 16.9 2V P ( 1 – t min f osc ) Z L ≥ ------------------------------------------- – 1.2 BTL application. I ORM – I ripple PCB information for HSOP24 encapsulation The size of the printed-circuit board is 74.3 × 59.10 mm, dual sided 35 µm copper with 121 metallized through holes. Legend: ZL = load impedance The standard configuration is a symmetrical supply (typical ±25 V) with stereo SE outputs (typical 2 × 4 Ω). fosc = oscillator frequency tmin = minimum pulse width (typical 190 ns) The PCB is also suitable for mono BTL configuration (1 × 8 Ω) also for symmetrical supply and for asymmetrical supply. VP = single-sided supply voltage (so if the supply = ±30 V symmetrical → VP = 30 V) IORM = maximum repetitive peak current in output pin; see also Chapter 9 It is possible to use several different output filter inductors such as 16RHBP or EP13 types to evaluate the performance against the price or size. Iripple = ripple current. 16.10 Classification The application shows optimized signal and EMI performance. 2002 Sep 25 18 2002 Sep 25 19 100 nF R9 C19 5.6 kΩ 470 nF R8 C18 5.6 kΩ 470 nF J3 R7 C17 5.6 kΩ 470 nF R6 C16 5.6 kΩ 470 nF GND C7 J4(1) R2(3) 9.1 kΩ R1(3) 10 kΩ 100 nF 4 5 2 3 C36 100 nF VDDA2 12 VSSA1 C12 100 nF GND 7 OSC R5 30 kΩ VSSP C33 47 pF STABI 18 6 GND 19 MODE GND PROT HW 13 TDA8920TH C32 220 nF VSSD 24 GND C9 220 nF VSSA off mute GND C39 100 nF C27 470 nF GND C25 560 pF R11 4.7 Ω L6 27 µH L5 27 µH R10 4.7 Ω C26 470 nF C24 560 pF GND Fig.9 Single-chip class-D audio amplifier application diagram. GND BOOT2 C23 15 nF OUT2 OUT1 C22 15 nF BOOT1 VSSP2 20 22 21 16 15 17 VSSP1 C15 100 nF VSSP C38 220 nF VDDP2 VDDP1 C14 220 nF VDDP C37 100 nF 23 14 GND Z1 5.6 V VSSP R3 39 kΩ on VDDP C13 100 nF C8 220 nF S1 R4 39 kΩ VDDA (4) In case of HUM close J1 and J2. (5) Every decoupling to ground (plane) must be made as close as possible to the pin. (6) To handle 20 Hz under all conditions in stereo SE mode, the external power supply needs to have a capacitance of at least 4700 µF per supply line; VP = ±27 V (max). VDDA C35 220 nF VSSA2 VDDA1 C11 220 nF VSSA 1 11 9 10 8 C34 100 nF IN2− IN2+ SGND2 GND C21 330 pF SGND IN1− IN1+ VSSP VDDP VSSA VSSA VDDA C3 47 µF VDDA C10 100 nF C5 47 µF GND C4 47 µF C2 470 µF GND C1 470 µF SGND1 GND C20 330 pF L4 BEAD L3 BEAD L2 BEAD L1 BEAD C31 15 nF C30 15 nF GND C29 220 nF R13 22 Ω R12 22 Ω C28 220 nF GND OUT2+ OUT2− (2) OUT1+ OUT1− SE 4 Ω MBL470 SGND SE 4 Ω BTL 8 Ω SGND 2 × 80 W class-D power amplifier (1) BTL: remove in2, R8, R9, C18, C19, C21 and close J3 and J4. (2) BTL: connect loudspeaker between OUT1+ and OUT2−. (3) BTL: R1 and R2 are only required when an asymmetrical supply is used (VSS = 0 V). in 2 (4) J1 J2 GND −25 V +25 V agewidth in 1 VSS GND VDD C6 GND This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Philips Semiconductors Product specification TDA8920 2002 Sep 25 L5 L6 20 R4 R8 R3 − Out1+ − Out2 + L1 L2 J2 R7 R11 R6 C24 R10 J1 In1 C7 C22 C23 R2 C6 R1 C29 R13 Off C31 handbook, full pagewidth Bottom copper Top copper Fig.10 Printed-circuit board layout for the TDA8920TH. Bottom silk screen C28 R12 C30 In2 S1 C8 J3 Z1 C19 On J4 C11 C20 C21 C35 C4 C17 C16 C18 U1 1-2002 MBL496 2 × 80 W class-D power amplifier PHILIPS SEMICONDUCTORS R9 C12 C5 C33 Top silk screen C25 C37 C9 C36 C39 C32 C10 C15 R5 C13 C34 L4 VDD GND VSS L3 C38 C14 C3 PCB version 4 TDA8920/21/22/23/24TH state of D art C26 C27 C2 C1 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Philips Semiconductors Product specification TDA8920 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 16.11 Reference design: bill of materials Table 1 Single-chip class-D audio amplifier printed-circuit board (version 4; 01-2002) for TDA8920TH (see Figs 9 and 10) BOM ITEM QUANTITY REFERENCE PART DESCRIPTION 1 1 U1 TDA8920TH Philips Semiconductors B.V. 2 2 in1 and in2 cinch inputs Farnell 152-396 3 2 out1 and out2 output connector Augat 5KEV-02 4 1 VDD, GND and VSS supply connector Augat 5KEV-03 5 2 L6 and L5 27 µH EP13 or 16RHBP 6 4 L1, L2, L3 and L4 BEAD Murata BL01RN1-A62 7 1 S1 PCB switch Knitter ATE1E M-O-M 8 1 Z1 5V6 BZX 79C5V6 DO-35 9 2 C1 and C2 470 µF/35 V Panasonic M series ECA1VM471 10 3 C3, C4 and C5 47 µF 63 V Panasonic NHG series ECA1JHG470 11 6 C16, C17, C18, C19, C26 and C27 470 nF 63 V MKT EPCOS B32529- 0474- K 12 9 C8, C9, C11, C14, C28, C29, 220 nF 63 V C32, C35 and C38 SMD 1206 13 10 C6, C7, C10, C12, C13, C15, 100 nF 50 V C34, C36, C37 and C39 SMD 0805 14 2 C20 and C21 330 pF 50 V SMD 0805 15 4 C22, C23, C30 and C31 15 nF 50 V SMD 0805 16 2 C24, C25 560 pF 100 V SMD 0805 17 1 C33 47 pF 25V SMD 0805 18 2 R4 and R3 39 kΩ 0.1 W SMD 0805 19 1 R5 30 kΩ 0.1 W SMD 1206 20 1 R1 10 kΩ 0.1 W; optional SMD 0805 21 1 R2 9.1 kΩ 0.1 W; optional SMD 0805 22 4 R6, R7, R8 and R9 5.6 kΩ 0.1 W SMD 0805 23 2 R13 and R12 22 Ω 1 W SMD 2512 24 2 R10 and R11 4.7 Ω 0.25 W SMD 1206 25 2 J1 and J2 solder dot jumpers for ground reference in case of HUM (60 Hz noise) 26 2 J3 and J4 wire jumpers for BTL application 27 1 heatsink 30 mm SK400; OK for maximum music dissipation; 1/8 Prated (2 × 75 W/8) in 2 × 4 Ω at Tamb = 70 °C 28 1 printed-circuit board material 1.6 mm thick epoxy FR4 material, double sided 35 µm copper; clearances 300 µm; minimum copper track 400 µm 2002 Sep 25 21 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 16.12 Curves measured in the reference design The curves illustrated in Figs 19 and 20 are measured with a restive load impedance. Spread in RI (e.g. due to the frequency characteristics of the loudspeaker) can trigger the maximum current protection circuit; see Section 16.6. The curves illustrated in Figs 29 and 30 show the effects of supply pumping when only one single-ended channel is driven with a low frequency signal; see Section 16.7. MBL471 102 handbook, halfpage MBL472 102 handbook, halfpage THD+N (%) THD+N (%) 10 10 (1) 1 1 (2) (1) 10−1 10−1 (2) 10−2 10−3 −2 10 10−2 (3) 10−1 1 10 10−3 10 102 103 Po (W) 2 × 8 Ω SE; VP = ±25 V. (1) 10 kHz. (2) 1 kHz. (3) 100 Hz. 103 104 fi (Hz) 105 2 × 8 Ω SE; VP = ±25 V. (1) Po = 10 W. (2) Po = 1 W. Fig.11 THD + N as a function of output power. 2002 Sep 25 102 Fig.12 THD + N as a function of input frequency. 22 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 MBL473 102 handbook, halfpage MBL474 102 handbook, halfpage THD+N (%) THD+N (%) 10 10 1 1 (1) (1) 10−1 10−1 (2) (2) (3) 10−2 10−2 10−3 −2 10 10−1 1 10 10−3 10 102 103 Po (W) 2 × 4 Ω SE; VP = ±25 V. (1) 10 kHz. (2) 1 kHz. (3) 100 Hz. 102 103 104 fi (Hz) 105 2 × 4 Ω SE; VP = ±25 V. (1) Po = 10 W. (2) Po = 1 W. Fig.13 THD + N as a function of output power. Fig.14 THD + N as a function of input frequency. MBL475 102 handbook, halfpage MBL476 102 handbook, halfpage THD+N (%) THD+N (%) 10 10 1 1 (1) (1) 10−1 10−1 (2) 10−2 10−3 −2 10 10−1 1 10 10−3 10 102 103 Po (W) 1 × 8 Ω BTL; VP = ±25 V. (1) 10 kHz. 102 103 104 fi (Hz) 105 1 × 8 Ω BTL; VP = ±25 V. (1) Po = 10 W. (2) Po = 1 W. (2) 1 kHz. (3) 100 Hz. Fig.15 THD + N as a function of output power. 2002 Sep 25 (2) 10−2 (3) Fig.16 THD + N as a function of input frequency. 23 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier 25 TDA8920 MBL477 MBL478 100 handbook, halfpage handbook, halfpage (3) η (%) Pdiss (W) (1) (2) 80 20 (1) (2) 15 60 10 40 (3) 20 5 0 10−2 10−1 1 10 0 102 103 Po (W) 0 VP = ±25 V; fi = 1 kHz. (1) 2 × 4 Ω SE. (2) 1 × 8 Ω BTL. (3) 2 × 8 Ω SE. 30 60 90 120 150 Po (W) VP = ±25 V; fi = 1 kHz. (1) 2 × 4 Ω SE. (2) 1 × 8 Ω BTL. (3) 2 × 8 Ω SE. Fig.17 Power dissipation as a function of output power. Fig.18 Efficiency as a function of output power. MBL479 200 Po MBL480 200 Po handbook, halfpage handbook, halfpage (W) 160 (W) 160 (2) (2) 120 120 (1) (3) (1) 80 80 (3) (4) (4) 40 0 10 40 15 THD + N = 0.5%; f = 1 kHz. (1) 1 × 4 Ω BTL. (2) 1 × 8 Ω BTL. 20 25 0 10 30 35 VDD (V) (3) 2 × 4 Ω SE. (4) 2 × 8 Ω SE. THD + N = 10%; f = 1 kHz. (1) 1 × 4 Ω BTL. (2) 1 × 8 Ω BTL. Fig.19 Output power as a function of supply voltage. 2002 Sep 25 15 20 25 30 35 VDD (V) (3) 2 × 4 Ω SE. (4) 2 × 8 Ω SE. Fig.20 Output power as a function of supply voltage. 24 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 MBL481 0 MBL482 0 handbook, halfpage handbook, halfpage αcs (dB) αcs (dB) −20 −20 −40 −40 −60 −60 (1) (1) −80 −80 (2) (2) −100 10 102 103 104 fi (Hz) −100 105 10 102 103 104 fi (Hz) 105 2 × 8 Ω SE; VP = ±25 V. (1) Pout = 1 W. (2) Pout = 10 W. 2 × 4 Ω SE; VP = ±25 V. (1) Pout = 1 W. (2) Pout = 10 W. Fig.21 Channel separation as a function of input frequency. Fig.22 Channel separation as a function of input frequency. MBL483 45 MBL484 45 handbook, halfpage handbook, halfpage G (dB) G (dB) 40 40 35 35 (1) (1) (2) 30 30 (2) 25 20 (3) 25 (3) 10 102 103 104 fi (Hz) 20 105 10 102 103 VP = ±25 V; Vi = 100 mV; Rs = 10 kΩ; Ci = 330 pF. (1) 1 × 8 Ω BTL. VP = ±25 V; Vi = 100 mV; Rs = 0 kΩ. (1) 1 × 8 Ω BTL. (2) 2 × 8 Ω SE. (3) 2 × 4 Ω SE. (2) 2 × 8 Ω SE. (3) 2 × 4 Ω SE. Fig.23 Gain as a function of input frequency. 2002 Sep 25 104 fi (Hz) 105 Fig.24 Gain as a function of input frequency. 25 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 MBL485 100 Iq MBL486 330 handbook, halfpage handbook, halfpage fCLK (kHz) (mA) 80 320 60 310 40 300 20 290 0 0 10 20 0 40 30 20 10 40 30 VDD (V) VDD (V) RL is open-circuit. RL is open-circuit. Fig.25 Quiescent current as a function of supply voltage. Fig.26 Clock frequency as a function of supply voltage. MBL487 0 MBL488 0 handbook, halfpage handbook, halfpage SVRR (dB) SVRR (dB) −20 −20 −40 −40 (1) (2) (2) −60 −60 (3) (1) (3) −80 −80 −100 10 102 103 104 fi (Hz) −100 105 VP = ±25 V; Vripple = 2 V (p-p) with respect to ground. (1) Both supply lines in anti-phase. 1 2 3 4 5 Vripple(p-p) (V) VP = ±25 V; Vripple (P-P) with respect to ground. (1) fripple = 1 kHz. (2) fripple = 100 Hz. (3) fripple = 10 Hz. (2) Both supply lines in phase. (3) One supply line rippled. Fig.27 SVRR as a function of input frequency. 2002 Sep 25 0 Fig.28 SVRR as a function of Vripple(p-p). 26 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 MBL490 MBL489 10 handbook, halfpage Vripple(p-p) 10 handbook, halfpage (1) Vripple(p-p) (V) (1) (V) 8 8 6 6 (2) (2) 4 4 2 2 0 10−2 10−1 1 10 Po (W) 0 10 102 102 103 fi (Hz) 104 VP = ±25 V; 3000 µF per supply line; f = 10 Hz. (1) 1 × 4 Ω SE. (2) 1 × 8 Ω SE. VP = ±25 V; 3000 µF per supply line. (1) Pout = 30 W into 1 × 4 Ω SE. (2) Pout = 15 W into 1 × 8 Ω SE. Fig.29 Supply voltage ripple as a function of output power. Fig.30 Supply voltage ripple as a function of input frequency. MBL491 10 handbook, halfpage MBL493 150 Iq handbook, halfpage THD+N (%) (mA) 120 1 (1) 90 10−1 (2) (3) 60 (2) 10−2 30 10−3 100 200 300 400 500 600 fCLK (kHz) 0 100 VP = ±25 V; Po = 1 W into 8 Ω. (1) 10 Hz. 300 400 500 600 fCLK (kHz) VP = ±25 V; RL is open-circuit. (2) 1 kHz. (3) 100 Hz. Fig.32 Quiescent current as a function of clock frequency. Fig.31 THD + N as a function of clock frequency. 2002 Sep 25 200 27 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 MBL494 1000 Vres (mV) handbook, halfpage 800 40 600 30 400 20 200 10 0 100 MBL495 50 Po (W) handbook, halfpage 200 300 400 0 100 500 600 fCLK (kHz) 200 300 400 500 600 fCLK (kHz) VP = ±25 V; RL = 8 Ω. VP = ±25 V; RL = 8 Ω; f = 1 kHz; THD + N = 10%. Fig.33 PWM residual voltage as a function of clock frequency. Fig.34 Output power as a function of clock frequency. MLD831 10 o (V) handbook, Vfull pagewidth 1 10−1 10−2 10−3 10−4 10−5 10−6 0 1 2 3 4 Vi = 100 mV; f = 1 kHz. Fig.35 Output voltage as a function of mode voltage. 2002 Sep 25 28 5 Vmode (V) 6 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 MLD832 120 handbook, full pagewidth S/N (dB) (1) (2) 80 40 0 10−2 10−1 1 10 VP = ±25 V; Rs = 10 kΩ. (1) 2 × 4 Ω SE. (2) 1 × 8 Ω BTL. Fig.36 Signal-to-noise ratio as a function of output power. 2002 Sep 25 29 102 Po (W) 103 2002 Sep 25 30 SGND Vmode Vin2 ROSC COSC IN2− 4 IN2+ 5 SGND2 2 MODE 6 OSC 7 RFB PWM MODULATOR MANAGER STABI PWM MODULATOR RFB 18 VSSA 24 VSSD HW 19 CONTROL SWITCH2 AND HANDSHAKE RELEASE2 ENABLE2 TEMPERATURE SENSOR CURRENT PROTECTION CONTROL AND ENABLE1 HANDSHAKE SWITCH1 RELEASE1 13 DRIVER LOW DRIVER HIGH TDA8920TH DRIVER LOW DRIVER HIGH 14 OUT1 21 VSSA OUT2 22 BOOT2 20 VSSP2 VDDP2 16 15 BOOT1 VDDP1 VSSP1 17 VSSP1 23 VDDP2 VDDA VSSP 0V VDDP MBL464 −25 V SGND +25 V 2 × 80 W class-D power amplifier Fig.37 Typical application schematic of TDA8920TH. OSCILLATOR 1 12 VSSA2 VSSA1 INPUT STAGE mute MODE mute VSSA SGND1 11 IN1+ 8 INPUT STAGE 10 STABI PROT handbook, full pagewidth VSSA SGND Vin1 IN1− 9 3 VDDA2 VDDA1 VDDA This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Philips Semiconductors Product specification TDA8920 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 17 PACKAGE OUTLINE HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height SOT566-3 E D A x X c E2 y HE v M A D1 D2 12 1 pin 1 index Q A A2 E1 (A3) A4 θ Lp detail X 24 13 Z w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A2 max. 3.5 3.5 3.2 A3 0.35 A4(1) D1 D2 E(2) E1 E2 e HE Lp Q +0.08 0.53 0.32 16.0 13.0 −0.04 0.40 0.23 15.8 12.6 1.1 0.9 11.1 10.9 6.2 5.8 2.9 2.5 1 14.5 13.9 1.1 0.8 1.7 1.5 bp c D(2) v w x y 0.25 0.25 0.03 0.07 Z θ 2.7 2.2 8° 0° Notes 1. Limits per individual lead. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA ISSUE DATE 02-01-30 SOT566-3 2002 Sep 25 EUROPEAN PROJECTION 31 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 If wave soldering is used the following conditions must be observed for optimal results: 18 SOLDERING 18.1 Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 18.2 – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages. 18.3 18.4 Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. 2002 Sep 25 Manual soldering 32 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier 18.5 TDA8920 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE(1) WAVE BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable(3) HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not PLCC(4), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(2) suitable suitable suitable not recommended(4)(5) suitable not recommended(6) suitable Notes 1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2002 Sep 25 33 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 19 DATA SHEET STATUS DATA SHEET STATUS(1) PRODUCT STATUS(2) DEFINITIONS Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 20 DEFINITIONS 21 DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2002 Sep 25 34 Philips Semiconductors Product specification 2 × 80 W class-D power amplifier TDA8920 NOTES 2002 Sep 25 35 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA74 © Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/03/pp36 Date of release: 2002 Sep 25 Document order number: 9397 750 10092