IRFP9150 Data Sheet August 1999 25A, 100V, 0.150 Ohm, P-Channel Power MOSFET This advanced power MOSFET is designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. It is a P-Channel enhancement mode silicon-gate power field effect transistor designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. File Number 2293.4 Features • 25A, 100V • rDS(ON) = 0.150Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance Symbol The P-Channel IRFP9150 is an approximate electrical complement to the N-channel IRFP150. D Formerly developmental type TA49230. G Ordering Information PART NUMBER IRFP9150 PACKAGE TO-247 BRAND S IRFP9150 NOTE: When ordering, use the entire part number. Packaging JEDEC STYLE TO-247 SOURCE DRAIN GATE DRAIN (FLANGE) 4-63 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFP9150 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 10kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC =100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Eas Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg IRFP9150 -100 -100 -25 -18 -100 ±20 150 1.2 1300 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = -250µA (Figure 10) Gate Threshold Voltage VGS(TH) VDS = VGS, ID = -250µA Zero Gate Voltage Drain Current IDSS On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) MAX UNITS - - V -2.0 - -4.0 V VDS = Rated BVDSS, VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - 250 µA VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = ±20V -25 - - A - - ±100 nA VGS = -10V, I D = -10A (Figure 8, 9) - 0.090 0.150 Ω gfs VDS ≤ -10V, ID = -12.5A (Figure 12) 4 10 - S VDD = -50V, ID ≈ -25A, RG = 6.8Ω, RL = 2Ω (Figures 17 and 18) MOSFET switching times are essentially independent of operating temperature). - 16 24 ns - 110 160 ns td(OFF) - 65 100 ns tf - 46 70 ns - 82 120 nC - 14 - nC - 42 - nC - 2400 - pF - 850 - pF - 400 - pF - 5.0 - nH - 13 - nH - - 0.83 oC/W - - 30 0C/W tr Turn-Off Delay Time TYP 1 rDS(ON) td(ON) Rise Time MIN Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VGS = -10V, ID = -25A, VDS = 0.8 x Rated BVDSS Ig(REF) = -1.5mA (Figures 14, 19, 20) (Gate Charge is Essentially Independent Of Operating Temperature) VGS = 0V, VDS = -25V, f = 1.0MHz (Figure 11) Internal Drain Inductance LD Measured From the Drain Lead, 6mm (0.25in) From the Package to the Center of the Die Internal Source Inductance LS Measured From the Source Pin, 6mm (0.25in) From Header to the Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA 4-64 Free Air Operation IRFP9150 Source to Drain Diode Specifications PARAMETER SYMBOL MIN TYP MAX UNITS - - -25 A - - -100 A TJ = 25oC, ISD = -25A, VGS = 0V (Figure 13) - -0.9 -1.5 V trr TJ = 25oC, ISD = -25A, dISD/dt = 100A/µs - 150 300 ns QRR TJ = 25oC, ISD = -25A, dISD/dt = 100A/µs 0.3 0.7 1.5 µC Continuous Source to Drain Current TEST CONDITIONS ISD Pulse Source to Drain Current (Note 3) Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode ISDM D G S Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time Reverse Recovered Charge NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive Rating: Pulse width limited by Maximum junction temperature. See Transient Thermal Impedance curve (Figure 3 4. VDD = 25V, start TJ = 25oC, L = 3.2mH, RG = 25Ω, peak IAS = 25A (Figures 15, 16). Unless Otherwise Specified 1.2 -30 1.0 -25 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER Typical Performance Curves 0.8 0.6 0.4 -20 -15 -10 -5 0.2 0 0 0 50 100 150 TC, CASE TEMPERATURE (oC) 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE NORMALIZED EFFECTIVE TRANSIENT THERMAL IMPEDANCE 10 1 DUTY CYCLE IN DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 0.10 t2 NOTES: DUTY FACTOR: D = t1/t2 TJ = PDM x ZθJC x RθJC + TC SINGLE PULSE 0.01 10-5 t1 PDM 10-4 10-2 10-1 10-3 t1, SQUARE WAVE PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-65 1 10 IRFP9150 Typical Performance Curves Unless Otherwise Specified (Continued) 200 -100 VGS = 14V IRFP9150,1 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC 10ms IRFP9150,1 100ms 10 OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 0.1s ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 -80 -60 VGS = 8V -40 VGS = 7V VGS = 6V 1 1 1s IRFP9150 IRFP9151 VGS = 4V DC 10 VDS, DRAIN VOLTAGE (V) 0 -10 100 ID, DRAIN CURRENT (A) VGS = 10V -40 VGS = 8V -30 VGS = 7V -20 VGS = 6V -10 VGS = 5V VGS = 4V 0 0 -1 -2 -3 -4 -5 -10 -1 -0.1 0 -2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V) 2.2 NORMALIZED DRAIN TO SOURCE ON RESISTANCE ON RESISTANCE (mΩ) rDS(ON), DRAIN TO SOURCE -10 FIGURE 7. TRANSFER CHARACTERISTICS PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V 250 200 150 VGS = 20V 100 -50 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≤ -50V FIGURE 6. SATURATION CHARACTERISTICS 300 -40 -100 VDS, DRAIN TO SOURCE VOLTAGE (V) 350 -30 FIGURE 5. OUTPUT CHARACTERISTICS ID(ON), DRAIN TO SOURCE CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC -20 VGS = 5V (VDS), DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA -50 VGS = 10V VGS = 9V -20 TC = 25oC TJ = MAX RATED VGS = 12V 50 1.8 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = -10A 1.4 1.0 0.6 0.2 0 -20 -40 -60 -80 -100 ID, DRAIN CURRENT (A) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-66 -40 0 40 80 TJ, JUNCTION TEMPERATURE (oC) 120 FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRFP9150 Typical Performance Curves Unless Otherwise Specified (Continued) 1.25 4500 1.15 1.05 0.95 3500 3000 CISS 2500 2000 1500 COSS 1000 0.85 500 0.75 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) 100 25oC ISD, DRAIN CURRENT (A) 12 150oC 9 6 3 0 -10 -20 -30 ID, DRAIN CURRENT (A) -40 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 10 150oC 0.1 0.3 -50 25oC 1 0.5 0.7 VGS, GATE TO SOURCE VOLTAGE (V) ID = -25A -5 VDS = -80V -10 VDS = -50V -15 VDS 20 40 60 = -20V 80 100 120 140 160 180 Qg(TOT), TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-67 1.1 1.3 1.5 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 0 0 0.9 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT -20 -50 -10 -20 -30 -40 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 15 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX CRSS 0 160 FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE gfs, TRANSCONDUCTANCE (S) VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 4000 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250µA 1.7 IRFP9150 Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN - RG REQUIRED PEAK IAS + VDD DUT 0V VDD tP VGS IAS IAS VDS tP 0.01Ω BVDSS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 RL - DUT VGS + 10% 10% VDS VDD RG tf 90% 90% VGS 0 10% 50% 50% PULSE WIDTH 90% FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS -VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0 VDS DUT 12V BATTERY 0.2µF 50kΩ 0.3µF Qgs Qg(TOT) DUT G VGS Qgd D VDD 0 S Ig(REF) IG CURRENT SAMPLING RESISTOR +VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-68 0 Ig(REF) FIGURE 20. GATE CHARGE WAVEFORMS IRFP9150 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. 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