IRFP360 Data Sheet July 1999 23A, 400V, 0.200 Ohm, N-Channel Power MOSFET This advanced power MOSFET is designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits. Ordering Information IRFP360 PACKAGE TO-247 2290.3 Features • 23A, 400V • rDS(ON) = 0.200Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Formerly developmental type TA17464. PART NUMBER File Number BRAND Symbol IRFP360 D NOTE: When ordering, use the entire part number. G S Packaging JEDEC STYLE TO-247 SOURCE DRAIN GATE DRAIN (FLANGE) 4-341 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFP360 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, see Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFP360 400 400 23 14 92 ±20 250 2 1200 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 300 260 CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA Zero Gate Voltage Drain Current IDSS On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time 400 - - V 2 - 4 V VDS = Rated BVDSS, VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA 23 - - A - - ±100 nA VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = ±20V - 0.18 0.20 Ω VDS ≥ 50V, IDS > 13A (Figure 12) 14 21 - S - 22 33 ns - 94 140 ns - 80 120 ns - 66 99 ns - 68 100 nC - 17 - nC - 24 - nC - 4000 - pF - 550 - pF VDD = 200V, ID ≈ 25A, RGS = 4.3Ω, VGS = 10V, RL = 7.5Ω MOSFET Switching Times are Essentially Independent of Operating Temperature tf Total Gate Charge (Gate to Source + Gate to Drain) UNITS ID = 13A, VGS = 10V (Figures 8, 9) td(OFF) Fall Time MAX gfs tr Turn-Off Delay Time TYP rDS(ON) td(ON) Rise Time MIN Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VGS = 10V, ID = 25A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) Internal Drain Inductance LD Measured between the Contact Screw on Header closer to Source and Gate Pins and Center of Die Internal Source Inductance LS Measured from the Source Lead, 6mm (0.25in) from Header and Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D - 97 - pF - 5.0 - nH - 13 - nH - - 0.50 oC/W - - 30 oC/W LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA 4-342 Free Air Operation IRFP360 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 2) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D MIN TYP MAX UNITS - - 23 A - - 92 A - - 1.8 V 200 460 1000 ns 3.1 7.1 16 µC G S Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovery Charge QRR TJ = 25oC, ISD = 23A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 25A, dISD/dt = 100A/µs TJ = 25oC, ISD = 25A, dISD/dt = 100A/µs NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 4mH, RG = 25Ω, Peak IAS = 23A. Typical Performance Curves Unless Otherwise Specified 25 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 20 15 10 5 0 0 50 100 150 25 50 TC , CASE TEMPERATURE (oC) 75 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 ZθJC, TRANSIENT THERMAL IMPEDANCE (oC/W) POWER DISSIPATION MULTIPLIER 1.2 0.5 0.2 0.1 0.1 PDM 0.05 10-2 0.02 0.01 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC SINGLE PULSE 10-3 10-5 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (S) FIGURE 3. TRANSIENT THERMAL IMPEDANCE 4-343 1 10 IRFP360 Typical Performance Curves Unless Otherwise Specified (Continued) 40 32 102 10µs 100µs 10 1ms 10ms 1 TC = 25oC TJ = MAX RATED SINGLE PULSE VGS = 6.0V 24 VGS = 5.5V 16 VGS = 5.0V 8 DC VGS = 4.5V 0 0.1 1 10 102 VDS , DRAIN TO SOURCE VOLTAGE (V) 103 0 102 VGS = 10V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VGS = 6.0V 24 VGS = 5.5V 8 VGS = 5.0V VGS = 4.0V 4 TJ = 150oC 8 6 10 0.1 0 2 4 6 8 VSD , GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON RESISTANCE rDS(ON), DRAIN TO SOURCE ON RESISTANCE 3.0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V 1.2 0.8 VGS = 20V 2.4 30 60 90 ID , DRAIN CURRENT (A) 120 150 FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-344 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID =13A 1.8 1.2 0.6 0 0 10 FIGURE 7. TRANSFER CHARACTERISTICS 1.6 0 TJ = 25oC 1 FIGURE 6. SATURATION CHARACTERISTICS 0.4 200 10 VDS , DRAIN TO SOURCE VOLTAGE (V) 2.0 160 VGS = 4.5V 0 2 120 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V 32 16 80 FIGURE 5. OUTPUT CHARACTERISTICS 40 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 40 VGS = 4.0V VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V OPERATION IN THIS AREA IS LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 103 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 160 IRFP360 Typical Performance Curves Unless Otherwise Specified (Continued) 10000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD ID = 250µA 8000 1.15 C, CAPACITANCE (nF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 1.05 0.95 CISS 6000 COSS 4000 0.85 0.75 CRSS 2000 -40 0 80 40 120 0 160 1 2 5 10 2 5 VDS, DRAIN TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 102 40 ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V TJ = 25oC 30 20 TJ = 150oC 10 0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TJ = 150oC 10 TJ = 25oC 1 0 10 20 30 ID , DRAIN CURRENT (A) 40 50 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 0 0.4 0.8 1.2 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS , GATE TO SOURCE VOLTAGE (V) gfs, TRANSCONDUCTANCE (S) 50 ID = 25A 16 VDS = 80V 12 VDS = 320V 8 4 0 0 25 50 75 100 125 Qg, GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-345 102 1.6 IRFP360 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS - VGS VDS IAS VDD VDD DUT tP 0V IAS 0 0.01Ω tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr VDS RL 90% 90% + RG - VDD 10% 10% 0 90% DUT VGS VGS 0 10% VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0.2µF 50% PULSE WIDTH FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-346 IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFP360 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. 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