SiP32408, SiP32409 Vishay Siliconix 1.1 V to 5.5 V, Slew Rate Controlled Load Switch DESCRIPTION FEATURES SiP32408 and SiP32409 are slew rate controlled load switches designed for 1.1 V to 5.5 V operation. These devices guarantee low switch on-resistance at 1.2 V input. They feature a controlled soft-on slew rate of typical 2.5 ms that limits the inrush current for designs of heavy capacitive load and minimizes the resulting voltage droop at the power rails. SiP32408 and SiP32409 feature a low voltage control logic interface (On/Off interface) that can interface with low voltage control signals without extra level shifting circuit. Both SiP32408 and SiP32409 have exceptionally low shutdown current and provide reverse blocking to prevent high current flowing into the power source. SiP32409 integrates a output discharge circuit for fast turn off. Both SiP32408 and SiP32409 are available in TDFN4 package of 1.2 mm by 1.6 mm. • • • • • 1.1 V to 5.5 V operation voltage range Flat row RON down to 1.2 V 42 m typical from 1.5 V to 5 V Slew rate controlled turn-on: 2.5 ms at 3.6 V Low quiescent current < 1 µA when disabled 10.5 µA typical at VIN = 1.2 V • Reverse current blocking when switch is off • Output discharge (SiP32409) • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 APPLICATIONS • • • • • • • • PDAs/smart phones Notebook/netbook computers Tablet PC Portable media players Digital camera GPS navigation devices Data storage devices Optical, industrial, medical, and healthcare devices TYPICAL APPLICATION CIRCUIT VIN IN OUT VOUT SiP32408, SiP32409 C IN 4.7 µF C OUT 0.1 µF EN EN GND GND GND Figure 1 - SiP32408, SiP32409 Typical Application Circuit Document Number: 63717 S13-0971-Rev. F, 06-May-13 For technical questions, contact: [email protected] www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix ORDERING INFORMATION Temperature Range Package - 40 °C to 85 °C TDFN4 1.2 mm x 1.6 mm Marking Part Number Jx SiP32408DNP-T1-GE4 Kx SiP32409DNP-T1-GE4 Notes: x = Lot code GE4 denotes halogen-free and RoHS compliant ABSOLUTE MAXIMUM RATINGS Parameter Limit Supply Input Voltage (VIN) - 0.3 to 6 Enable Input Voltage (VEN) - 0.3 to 6 Output Voltage (VOUT) - 0.3 to 6 Maximum Continuous Switch Current (Imax.)c V 3.5 Maximum Repetitive Pulsed Current (1 ms, 10 % Duty Cycle)c Maximum Non-Repetitive Pulsed Current (100 µs, EN = Active) Unit 6 c A 12 ESD Rating (HBM) 7000 V Junction Temperature (TJ) - 40 to 150 °C Thermal Resistance (JA)a 170 °C/W Power Dissipation (PD)a,b 735 mW Notes: a. Device mounted with all leads and power pad soldered or welded to PC board, see PCB layout. b. Derate 5.9 mW/°C above TA = 25 °C, see PCB layout. c. TA = 25 °C, see PCB layout Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Parameter Limit Input Voltage Range (VIN) Operating Junction Temperature Range (TJ) www.vishay.com 2 Unit 1.1 to 5.5 V - 40 to 125 °C For technical questions, contact: [email protected] Document Number: 63717 S13-0971-Rev. F, 06-May-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix SPECIFICATIONS Parameter Operating Voltagec Quiescent Current Symbol VIN IQ Test Conditions Unless Specified VIN = 5 V, TA = - 40 °C to 85 °C (Typical values are at TA = 25 °C) Limits - 40 °C to 85 °C Min.a 1.1 Typ.b - Max.a 5.5 VIN = 1.2 V, EN = active - 10.5 17 VIN = 1.8 V, EN = active - 21 30 VIN = 2.5 V, EN = active - 34 50 VIN = 3.6 V, EN = active - 54 90 VIN = 4.3 V, EN = active - 68 110 VIN = 5 V, EN = active - 105 180 Off Supply Current IQ(off) EN = inactive, OUT = open - - 1 Off Switch Current IDS(off) EN = inactive, OUT = GND - - 1 IRB VOUT = 5 V, VIN = 0 V, VEN = inactive - - 10 VIN = 1.2 V, IL = 100 mA, TA = 25 °C - 45 52 VIN = 1.8 V, IL = 100 mA, TA = 25 °C - 42 50 Reverse Blocking Current On-Resistance On-Resistance Temp.-Coefficient EN Input Low Voltagec EN Input High Voltagec RDS(on) VIN = 2.5 V, IL = 100 mA, TA = 25 °C - 42 50 VIN = 3.6 V, IL = 100 mA, TA = 25 °C - 42 50 VIN = 4.3 V, IL = 100 mA, TA = 25 °C - 42 50 VIN = 5 V, IL = 100 mA, TA = 25 °C - 44 50 - TCRDS VIL VIH - 3300 VIN = 1.2 V - - 0.3 VIN = 1.8 V - - 0.4d VIN = 2.5 V - - 0.5d VIN = 3.6 V - - 0.6d VIN = 4.3 V - - 0.7d VIN = 5 V - - 0.8d VIN = 1.2 V 0.9d - - VIN = 1.8 V 1.2d - - VIN = 2.5 V 1.4d - - VIN = 3.6 V 1.6d - - VIN = 4.3 V 1.7 d - - VIN = 5 V Unit V µA m ppm/°C V 1.8 - - EN Input Leakage ISINK VEN = 5.5 V -1 - 1 µA Output Pulldown Resistance RPD EN = inactive, TA = 25 °C, (for SiP32409 only) - 217 280 Output Turn-On Delay Time td(on) - 1.8 - 1.2 2.5 3.8 - - 0.001 Output Turn-On Rise Time t(on) Output Turn-Off Delay Time td(off) VIN = 3.6 V, RLOAD = 10 , TA = 25 °C ms Notes: a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. For VIN outside this range consult typical EN threshold curve. d. Not tested, guarantee by design. Document Number: 63717 S13-0971-Rev. F, 06-May-13 For technical questions, contact: [email protected] www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix PIN CONFIGURATION OUT 4 EN 3 1 IN 2 GND GND Bottom View Figure 2 - TDFN4 1.2 mm x 1.6 mm Package PIN DESCRIPTION Pin Number 1 2 3 4 Name IN GND EN OUT Function This is the input pin of the switch Ground connection Enable input This is the output pin of the switch BLOCK DIAGRAM Reverse Blocking IN OUT Charge Pump SiP32409 only Output Pulldown Turn On Slew Rate Control Control Logic EN GND Figure 3 - Functional Block Diagram TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) 120 140 VIN = 5 V 100 IQ - Quiescent Current (μA) IQ - Quiescent Current (μA) 120 100 80 60 40 80 60 VIN = 3.6 V 40 20 20 0 1 1.5 2 2.5 3.5 3 VIN (V) 4 4.5 5 5.5 Figure 4 - Quiescent Current vs. Input Voltage www.vishay.com 4 VIN = 1.2 V 0 - 40 - 20 0 20 40 Temperature (°C) 60 80 100 Figure 5 - Quiescent Current vs. Temperature For technical questions, contact: [email protected] Document Number: 63717 S13-0971-Rev. F, 06-May-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) 0.7 100 SiP32408 10 SiP32408 IIQ(OFF) - Off Supply Current (nA) IQ(OFF) - Off Supply Current (nA) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1 1.5 2 2.5 3 3.5 VIN (V) 4 4.5 5 5.5 VIN = 3.6 V 0.1 0.01 VIN = 1.2 V 0.001 0.0001 - 40 Figure 6 - Off Supply Current vs. Input Voltage - 20 0 20 40 Temperature (°C) 60 80 100 Figure 9 - Off Supply Current vs. Temperature 1.2 1000 1.1 SiP32409 SiP32409 100 IQ(OFF) - Off Supply Current (nA) IQ(OFF) - Off Supply Current (nA) VIN = 5 V 1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 VIN = 5 V 10 VIN = 3.6 V 1 0.1 VIN = 1.2 V 0.01 0.3 0.2 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.001 - 40 - 20 0 VIN (V) 20 40 60 80 100 Temperature (°C) Figure 7 - Off Supply Current vs. Input Voltage Figure 10 - Off Supply Current vs. Temperature 1000 1.2 IDS(off) - Off Switch Current (nA) IDS(off) - Off Switch Current (nA) 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 100 10 VIN = 5 V 1 VIN = 3.6 V 0.1 0.01 VIN = 1.2 V 0.3 0.2 1 1.5 2 2.5 3 3.5 VIN (V) 4 4.5 5 5.5 Figure 8 - Off Switch Current vs. Input Voltage Document Number: 63717 S13-0971-Rev. F, 06-May-13 0.001 - 40 - 20 0 20 40 60 Temperature (°C) 80 100 Figure 11 - Off Switch Current vs. Temperature For technical questions, contact: [email protected] www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) 55 56 54 52 50 IO = 2.0 A RDS - On-Resistance (mΩ) RDS - On-Resistance (mΩ) IO = 0.1 A VIN = 5 V IO = 2.5 A IO = 1.5 A 50 IO = 1.0 A 48 IO = 0.1 A 46 44 42 45 40 35 40 38 1 1.5 2 2.5 3 3.5 VIN (V) 4 4.5 5 30 - 40 5.5 0 20 40 60 80 100 Temperature (°C) Figure 12 - RDS(on) vs. VIN Figure 14 - RDS(on) vs. Temperature 240 900 SiP32409 only VOUT = VIN 800 RPD - Output Pulldown Resistance (Ω) RPD - Output Pulldown Resistance (Ω) - 20 700 600 500 400 300 200 100 SiP32409 only VOUT = VIN = 5 V 235 230 225 220 215 210 205 200 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) - 20 0 20 40 60 80 100 Temperature (°C) Figure 13 - Output Pulldown Resistance vs. Input Voltage www.vishay.com 6 - 40 Figure 15 - Output Pulldown Resistance vs. Temperature For technical questions, contact: [email protected] Document Number: 63717 S13-0971-Rev. F, 06-May-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted) 2.2 0 td(on) - Turn-On Delay Time (ms) IIN - Input Current (nA) -2 -4 -6 VIN = 0 V -8 - 10 - 12 0.5 1 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 5 1.8 1.6 1.4 1.2 - 40 5.5 20 40 60 80 100 0.20 VIN = 5 V CL = 0.1 μF RL = 10 Ω VIN = 5 V CL = 0.1 μF RL = 10 Ω 0.18 td(off) - Turn-Off Delay Time (μs) tr - Rise Time (ms) 0 Figure 18 - Turn-On Delay Time vs. Temperature 3.25 2.75 2.50 2.25 2.00 1.75 - 40 - 20 Temperature (°C) Figure 16 - Reverse Blocking Current vs. Output Voltage 3.00 VIN = 5 V CL = 0.1 μF RL = 10 Ω 2.0 0.16 0.14 0.12 0.10 0.08 - 20 0 20 40 Temperature (°C) 60 80 0.06 - 40 100 Figure 17 - Rise Time vs. Temperature - 20 0 20 40 Temperature (°C) 60 80 100 Figure 19 - Turn-Off Delay Time vs. Temperature 1.6 1.5 EN Threshold Voltage (V) 1.4 1.3 1.2 VIH 1.1 1.0 VIL 0.9 0.8 0.7 0.6 0.5 1 1.5 2 2.5 3 3.5 VIN (V) 4 4.5 5 5.5 Figure 20 - EN Threshold Voltage vs. Input Voltage Document Number: 63717 S13-0971-Rev. F, 06-May-13 For technical questions, contact: [email protected] www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix TYPICAL WAVEFORMS EN 5VOUT EN 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT IOUT for 5VOUT 1.5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT IOUT for 1.5VOUT 2 V/Div, 2 A/Div, 2 μs/Div 2 V/Div, 2 A/Div, 2 ms/Div Figure 21 - Typical Turn-on Delay, Rise Time COUT = 0.1 µF, CIN = 4.7 µF, IOUT = 1.5 A Figure 24 - Typical Fall Time COUT = 0.1 µF, CIN = 4.7 µF, IOUT = 1.5 A EN 5VOUT EN 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT 2 V/Div, 0.25 A/Div, 2 ms/Div 1.5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT 2 V/Div, 0.25 A/Div, 2 μs/Div Figure 22 - Typical Turn-on Delay, Rise Time COUT = 0.1 µF, CIN = 4.7 µF, ROUT = 10 Figure 25 - Typical Fall Time COUT = 0.1 µF, CIN = 4.7 µF, ROUT = 10 EN 5VOUT EN 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT 1.5VOUT IOUT for 5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT 2 V/Div, 2 A/Div, 2 ms/Div 2 V/Div, 2 A/Div, 2 ms/Div Figure 23 - Typical Turn-on Delay, Rise Time COUT = 200 µF, CIN = 4.7 µF, IOUT = 1.5 A www.vishay.com 8 IOUT for 1.5VOUT Figure 26 - Typical Fall Time COUT = 200 µF, CIN = 4.7 µF, IOUT = 1.5 A For technical questions, contact: [email protected] Document Number: 63717 S13-0971-Rev. F, 06-May-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix EN 5VOUT EN 5VOUT 3.6VOUT 3.6VOUT 1.5VOUT 1.5VOUT IOUT for 5VOUT IOUT for 5VOUT IOUT for 3.6VOUT IOUT for 3.6VOUT IOUT for 1.5VOUT IOUT for 1.5VOUT 2 V/Div, 0.25 A/Div, 2 ms/Div 2 V/Div, 0.25 A/Div, 2 ms/Div Figure 27 - Typical Turn-on Delay, Rise Time COUT = 200 µF, CIN = 4.7 µF, ROUT = 10 Figure 28 - Typical Fall Time COUT = 200 µF, CIN = 4.7 µF, ROUT = 10 DETAILED DESCRIPTION SiP32408 and SiP32409 are advanced slew rate controlled high side load switches consisted of a n-channel power switch. When the device is enable the gate of the power switch is turned on at a controlled rate to avoid excessive inrush current. Once fully on the gate to source voltage of the power switch is biased at a constant level. The design gives a flat on resistance throughout the operating voltages. When the device is off, the reverse blocking circuitry prevents current from flowing back to input if output is raised higher than input. The reverse blocking mechanism also works in case of no input applied. APPLICATION INFORMATION Input Capacitor SiP32408 and SiP32409 do not require an input capacitor. To limit the voltage drop on the input supply caused by transient inrush currents, an input bypass capacitor is recommended. A 2.2 µF ceramic capacitor placed as close to the VIN and GND should be enough. Higher values capacitor can help to further reduce the voltage drop. Ceramic capacitors are recommended for their ability to withstand input current surge from low impedance sources such as batteries in portable devices. Output Capacitor While these devices works without an output capacitor, an 0.1 µF or larger capacitor across VOUT and GND is recommended to accommodate load transient condition. It also help to prevent parasitic inductance forces VOUT below GND when switching off. Output capacitor has minimal affect on device’s turn on slew rate time. There is no requirement on capacitor type and its ESR. Enable The EN pin is compatible with both TTL and CMOS logic voltage levels. Enable pin voltage can be above IN once it is within the absolute maximum rating range. For output voltage slew rate control, EN is required to have at least 50 µs delay after the input voltage get ready to enable the device. Protection Against Reverse Voltage Condition SiP32408 and SiP32409 contain a reverse blocking circuitry to protect the current from going to the input from the output in case where the output voltage is higher than the input voltage when the main switch is off. Reverse blocking works for input voltage as low as 0 V. Thermal Considerations SiP32408 and SiP32409 are designed to maintain a constant output load current. Due to physical limitations of the layout and assembly of the device the maximum switch current is 3.5 A, as stated in the Absolute Maximum Ratings table. However, another limiting characteristic for the safe operating load current is the thermal power dissipation of the package. To obtain the highest power dissipation (and a thermal resistance of 170 °C/W) the power pad of the device should be connected to a heat sink on the printed circuit board. Figure 21 shows a typical PCB layout. All copper traces and vias for the IN and OUT pins should be sized adequately to carry the maximum continuous current. The maximum power dissipation in any application is dependant on the maximum junction temperature, TJ(max.) = 125 °C, the junction-to-ambient thermal resistance for the TDFN4 1.2 mm x 1.6 mm package, J-A = 170 °C/W, and the ambient temperature, TA, which may be formulaically expressed as: P (max.) Document Number: 63717 S13-0971-Rev. F, 06-May-13 = T J (max.) - T A θJ- A For technical questions, contact: [email protected] = 125 - TA 170 www.vishay.com 9 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix It then follows that, assuming an ambient temperature of 70 °C, the maximum power dissipation will be limited to about 324 mW. So long as the load current is below the 3.5 A limit, the maximum continuous switch current becomes a function of two things: the package power dissipation and the RDS(on) at the ambient temperature. As an example let us calculate the worst case maximum load current at TA = 70 °C. The worst case RDS(on) at 25 °C occurs at an input voltage of 1.2 V and is equal to 52 m. The RDS(on) at 70 °C can be extrapolated from this data using the following formula: RDS(on) (at 70 °C) = RDS(on) (at 25 °C) x (1 + TC x DT) Where TC is 3300 ppm/°C. Continuing with the calculation we have RDS(on) (at 70 °C) = 52 m x (1 + 0.0033 x (70 °C - 25 °C)) = 60 m The maximum current limit is then determined by P (max.) I LOAD (max.) < R DS(ON ) which in this case is 2.3 A. Under the stated input voltage condition, if the 2.3 A current limit is exceeded the internal die temperature will rise and eventually, possibly damage the device. 5A 1 ms 180 mA 4.6 ms SiP32408 and SiP32409 can safely support 5 A pulse current repetitively at 25 °C. Switch Non-Repetitive Pulsed Current SiP32408 and SiP32409 can withstand inrush current of up to 12 A for 100 µs at 25 °C when heavy capacitive loads are connected and the part is already enabled. Recommended Board Layout For the best performance, all traces should be as short as possible to minimize the inductance and parasitic effects. The input and output capacitors should be kept as close as possible to the input and output pins respectively. Connecting the central exposed pad to GND, using wide traces for input, output, and GND help reducing the case to ambient thermal impedance. Reverse Blocking IN OUT Charge Pump Control Logic Input Buffer EN Control and Drive VOUT > VIN Detect Pull Down Circuit When VOUT is 0.8 V above the VIN, pull down circuit will be activated. It connects the EN to GND with a resistance of around 1 kΩ. Active EN Pull Down for Reverse Blocking When an internal circuit detects the condition of VOUT 0.8 V higher than VIN, it will turn on the pull down circuit connected to EN, forcing the switching OFF. The pull down value is about 1 k. Pulse Current Capability The device is mounted on the evaluation board shown in the PCB layout section. It is loaded with pulses of 5 A and 1 ms for periods of 4.6 ms. www.vishay.com 10 For technical questions, contact: [email protected] Document Number: 63717 S13-0971-Rev. F, 06-May-13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiP32408, SiP32409 Vishay Siliconix EVALUATION BOARD LAYOUT Top Bottom Figure 29 - Evaluation board Layout for TDFN4 1.2 mm x 1.6 mm (type: FR4, size: 1" x 1", thickness: 0.062", copper thickness: 2 oz.) Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63717. Document Number: 63717 S13-0971-Rev. F, 06-May-13 For technical questions, contact: [email protected] www.vishay.com 11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TDFN4 1.2 x 1.6 Case Outline D D2 4 b 3 Pin #1 ID (Optional) 4 K E E2 3 1 2 e Index Area (D/2 x E/2) Bottom View A A1 Top View A3 1 L 2 Side View DIM. MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.45 0.55 0.60 0.017 0.022 0.024 A1 0.00 - 0.05 0.00 - A3 0.15 REF. or 0.127 REF. (1) 0.006 or 0.005 0.002 (1) b 0.20 0.25 0.30 0.008 0.010 0.012 D 1.15 1.20 1.25 0.045 0.047 0.049 D2 0.81 0.86 0.91 0.032 0.034 0.036 e 0.50 BSC 0.020 E 1.55 1.60 1.65 0.061 0.063 0.065 E2 0.45 0.50 0.55 0.018 0.020 0.022 K L 0.25 typ. 0.25 0.30 0.010 typ. 0.35 0.010 0.012 0.014 ECN: T16-0143-Rev. C, 18-Apr-16 DWG: 5995 Note (1) The dimension depends on the leadframe that assembly house used. Revision: 18-Apr-16 Document Number: 65734 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PAD Pattern Vishay Siliconix RECOMMENDED MINIMUM PADS FOR TDFN4 1.2 x 1.6 0.86 0.50 3 1 2 2.0 0.55 0.20 0.50 0.20 4 0.55 0.30 Recommended Minimum Pads Dimensions in mm Document Number: 66558 Revision: 05-Mar-10 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000