LF PA K 33 BUK9M5R2-30E N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 13 May 2016 Product data sheet 1. General description Logic level N-channel MOSFET in an LFPAK33 (Power33) package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications. 2. Features and benefits • • • • Q101 compliant Repetitive avalanche rated Suitable for thermally demanding environments due to 175 °C rating True logic level gate with VGS(th) rating of greater than 0.5 V at 175 °C 3. Applications • • • • 12 V automotive systems Motors, lamps and solenoid control Transmission control Ultra high performance power switching 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - - 30 V ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 2 - - 70 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 79 W VGS = 5 V; ID = 25 A; Tj = 25 °C; Fig. 11 - 4.3 5.2 mΩ ID = 10 A; VDS = 24 V; VGS = 5 V; - 9.7 - nC Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge Tj = 25 °C; Fig. 13; Fig. 14 Scan or click this QR code to view the latest information for this product BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S Source 2 S Source 3 S Source 4 G Gate mb D Mounting base; connected to drain Graphic symbol D G mbb076 1 2 3 S 4 LFPAK33 (SOT1210) 6. Ordering information Table 3. Ordering information Type number Package BUK9M5R2-30E Name Description Version LFPAK33 Plastic single ended surface mounted package (LFPAK33); 8 leads SOT1210 7. Marking Table 4. Marking codes Type number Marking code BUK9M5R2-30E 95E230 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 30 V VDGR drain-gate voltage RGS = 20 kΩ - 30 V VGS gate-source voltage DC; Tj ≤ 175 °C -10 10 V -15 15 V Pulsed; Tj ≤ 175 °C [1][2] Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 79 W ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 2 - 70 A VGS = 5 V; Tmb = 100 °C; Fig. 2 - 63 A pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 358 A IDM peak drain current BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 2 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 Symbol Parameter Tstg Tj Conditions Min Max Unit storage temperature -55 175 °C junction temperature -55 175 °C Source-drain diode IS source current Tmb = 25 °C - 66 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 358 A - 79.2 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID = 70 A; Vsup ≤ 30 V; RGS = 50 Ω; [3][4] VGS = 5 V; Tj(init) = 25 °C; unclamped; Fig. 4 [1] [2] [3] [4] Accumulated pulse duration up to 50 hours delivers zero defect ppm. Significantly longer life times are achieved by lowering Tj and or VGS Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. Refer to application note AN10273 for further information. 03aa16 120 Pder (%) aaa-020882 100 ID (A) 80 80 (1) 60 40 40 20 0 Fig. 1. 0 50 100 150 Tmb (°C) 0 200 50 75 100 125 150 175 Tmb (°C) 200 (1) Capped at 70A due to package Fig. 2. Product data sheet 25 VGS ≥ 5 V Normalized total power dissipation as a function of mounting base temperature BUK9M5R2-30E 0 Continuous drain current as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 3 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 ID (A) aaa-020884 103 Limit RDSon = VDS / ID tp = 10 us 102 100 us 10 DC 1 ms 10 ms 100 ms 1 10-1 10-1 1 10 102 VDS (V) Tmb = 25 °C; IDM is a single pulse Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage IAL (A) aaa-020883 102 (1) 10 (2) 1 (3) 10-1 10-3 10-2 10-1 1 tAL (ms) 10 (1) Tj (init) = 25 °C; (2) Tj (init) = 150 °C; (3) Repetitive Avalanche Fig. 4. Avalanche rating; avalanche current as a function of avalanche time 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - 1.58 1.89 K/W BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 4 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 aaa-020885 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 10-1 0.05 0.02 P single shot δ= 10-2 tp 10-3 10-6 Fig. 5. 10-5 10-4 10-3 10-2 tp T t T 10-1 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 27 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.4 1.7 2.1 V - - 2.45 V 0.5 - - V VDS = 30 V; VGS = 0 V; Tj = 25 °C - 0.03 1 µA VDS = 30 V; VGS = 0 V; Tj = 175 °C - - 500 µA VGS = 10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 5 V; ID = 25 A; Tj = 25 °C; Fig. 11 - 4.3 5.2 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; - 3.4 4.1 mΩ - - 9.8 mΩ Static characteristics V(BR)DSS VGS(th) Fig. 9; Fig. 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 10 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 10 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Fig. 11 VGS = 5 V; ID = 25 A; Tj = 175 °C; Fig. 12 Dynamic characteristics QG(tot) total gate charge ID = 10 A; VDS = 24 V; VGS = 5 V; - 22.5 - nC QGS gate-source charge Tj = 25 °C; Fig. 13; Fig. 14 - 4.5 - nC BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 5 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 Symbol Parameter Conditions Min Typ Max Unit QGD gate-drain charge - 9.7 - nC Ciss input capacitance VDS = 25 V; VGS = 0 V; f = 1 MHz; - 1855 2467 pF Tj = 25 °C; Fig. 15 Coss output capacitance - 358 429 pF Crss reverse transfer capacitance - 219 300 pF td(on) turn-on delay time VDS = 25 V; RL = 1 Ω; VGS = 5 V; - 11.8 - ns tr rise time RG(ext) = 5 Ω; Tj = 25 °C - 32.7 - ns td(off) turn-off delay time - 29.7 - ns tf fall time - 27.4 - ns Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.84 1.2 V trr reverse recovery time IS = 10 A; dIS/dt = -100 A/µs; VGS = 0 V; - 21.8 - ns Qr recovered charge VDS = 25 V; Tj = 25 °C - 14 - nC ID (A) aaa-020886 40 10 V VGS = 3 V 4.5 V aaa-020887 40 RDSon (mΩ) 3.5 V 30 30 20 20 2.8 V 10 10 2.6 V 2.4 V 0 Fig. 6. 0 1 2 3 VDS (V) 0 4 0 2 4 6 8 10 12 14 VGS (V) 16 Tj = 25 °C Tj = 25 °C; ID = 25 A Output characteristics; drain current as a Fig. 7. function of drain-source voltage; typical values Drain-source on-state resistance as a function of gate-source voltage; typical values BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 6 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 aaa-020888 100 ID (A) ID (A) 80 10-2 60 10-3 40 10-4 20 0 175°C 0 1 2 3 VGS (V) min typ max 10-5 Tj = 25°C 10-6 4 VDS = 12 V Fig. 8. 003aah026 10-1 0 1 2 V GS (V) 3 Tj = 25 °C; VDS = 5 V Transfer characteristics; drain current as a function of gate-source voltage; typical values 003aah025 3 VGS(th) (V) 2.5 Fig. 9. Sub-threshold drain current as a function of gate-source voltage aaa-020889 40 RDSon (mΩ) max 2.8 V 3V 30 2 typ 1.5 20 min 1 10 3.5 V 0.5 0 -60 0 60 120 Tj (° C) 0 180 Fig. 10. Gate-source threshold voltage as a function of junction temperature Product data sheet 10 15 20 4.5 V 25 30 35 ID (A) 40 Tj = 25 °C ID = 1mA; VDS = VGS BUK9M5R2-30E VGS = 10 V 5 Fig. 11. Drain-source on-state resistance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 7 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 003aaj812 2 VGS (V) a 1.6 8 1.2 6 0.8 4 0.4 2 0 -60 0 60 120 Tj (°C) 0 180 Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature aaa-020890 10 VDS = 14 V 24 V 0 5 10 15 20 25 ID 40 Tj = 25 °C; ID = 10 A Fig. 13. Gate-source voltage as a function of gate charge; typical values aaa-020891 104 C (pF) VDS 30 35 QG (nC) Ciss VGS(pl) 103 VGS(th) VGS QGS2 QGS1 QGS Coss QGD QG(tot) Crss 003aaa508 102 10-1 Fig. 14. Gate charge waveform definitions 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig. 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 8 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 IS (A) aaa-020892 40 30 20 10 175°C 0 0 0.2 0.4 Tj = 25°C 0.6 0.8 1 VSD (V) 1.2 VGS = 0 V Fig. 16. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values 11. Application information For guidance on how to use and understand this datasheet, please refer to application note AN11158 "Understanding power MOSFET datasheet parameters". BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 9 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 12. Package outline Plastic single ended surface mounted package (LFPAK33); 8 leads E e1 L SOT1210 A A c1 b1 E1 D2 mounting base D1 D H 1 4 e b w X A A1 c C θ Lp y C detail X 0 2.5 5 mm scale Dimensions Unit(1) A A1 b b1 c c1 D(1) D1 D2 E(1) E1 e e1 H L Lp w y max 0.90 0.10 0.35 0.35 0.20 0.30 2.70 2.35 3.40 2.45 3.40 0.25 0.50 nom 0.50 0.65 0.65 0.20 0.10 3.20 2.00 3.20 0.13 0.30 min 0.80 0.00 0.25 0.25 0.10 0.20 2.50 1.90 mm Note 1. Plastic or metal protrusions of 0.15 mm per side are not included. Outline version JEDEC 8° 0° sot1210_po References IEC θ JEITA European projection Issue date 12-03-12 14-04-25 SOT1210 Fig. 17. Package outline LFPAK33 (SOT1210) BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 10 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 13. Legal information 13.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 13.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. BUK9M5R2-30E Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 11 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Bitsound, CoolFlux, CoReUse, DESFire, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, MIFARE, MIFARE Plus, MIFARE Ultralight, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP Semiconductors N.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 12 / 13 BUK9M5R2-30E NXP Semiconductors N-channel 30 V, 5.2 mΩ logic level MOSFET in LFPAK33 14. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Application information .........................................9 12 Package outline ................................................... 10 13 13.1 13.2 13.3 13.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP Semiconductors N.V. 2016. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 13 May 2016 BUK9M5R2-30E Product data sheet All information provided in this document is subject to legal disclaimers. 13 May 2016 © NXP Semiconductors N.V. 2016. All rights reserved 13 / 13