Data Sheet

I2P
AK
BUK9E04-40A
N-channel TrenchMOS logic level FET
Rev. 02 — 3 February 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
„ AEC Q101 compliant
„ Low conduction losses due to low
on-state resistance
„ Suitable for logic level gate drive
sources
„ Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
„ Motors, lamps and solenoids
„ 12 V loads
„ Automotive and general purpose
power switching
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
ID
drain current
VGS = 5 V; Tmb = 25 °C;
see Figure 1; see Figure 3
Ptot
total power dissipation
Min
Typ
Max Unit
-
-
40
V
-
-
75
A
Tmb = 25 °C; see Figure 2
-
-
300
W
VGS = 4.3 V; ID = 25 A;
Tj = 25 °C
-
3.7
5.9
mΩ
VGS = 10 V; ID = 25 A;
Tj = 25 °C
-
2.9
4
mΩ
VGS = 5 V; ID = 25 A;
Tj = 25 °C; see Figure 11;
see Figure 12
-
3.5
4.4
mΩ
[1]
Static characteristics
RDSon
drain-source on-state
resistance
BUK9E04-40A
NXP Semiconductors
N-channel TrenchMOS logic level FET
Table 1.
Symbol
Quick reference data …continued
Parameter
Conditions
Min
Typ
Max Unit
-
-
1.6
J
-
56
-
nC
Avalanche ruggedness
EDS(AL)S
non-repetitive
ID = 75 A; Vsup ≤ 40 V;
drain-source avalanche RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
energy
Dynamic characteristics
QGD
[1]
gate-drain charge
VGS = 5 V; ID = 25 A;
VDS = 32 V; Tj = 25 °C;
see Figure 13
Continuous current is limited by package.
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
G
gate
Simplified outline
2
D
drain
3
S
source
mb
D
mounting base; connected to drain
Graphic symbol
D
mb
G
mbb076
S
1 2 3
SOT226 (I2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
BUK9E04-40A
BUK9E04-40A
Product data sheet
Package
Name
Description
Version
I2PAK
plastic single-ended package (I2PAK); TO-262
SOT226
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Rev. 02 — 3 February 2011
© NXP B.V. 2011. All rights reserved.
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N-channel TrenchMOS logic level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
40
V
VDGR
drain-gate voltage
RGS = 20 kΩ
-
40
V
VGS
gate-source voltage
ID
drain current
-15
15
V
Tmb = 100 °C; VGS = 5 V; see Figure 1
[1]
-
75
A
Tmb = 25 °C; VGS = 5 V; see Figure 1;
see Figure 3
[1]
-
75
A
[2]
-
198
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3
-
794
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
300
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Source-drain diode
source current
IS
peak source current
ISM
Tmb = 25 °C
[2]
-
198
A
Tmb = 25 °C
[1]
-
75
A
pulsed; tp ≤ 10 µs; Tmb = 25 °C
-
794
A
ID = 75 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
-
1.6
J
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
EDS(AL)S
[1]
Continuous current is limited by package.
[2]
Current is limited by power dissipation chip rating.
03ne93
200
ID
(A)
03na19
120
Pder
(%)
150
80
100
40
50
0
Fig 1.
Capped at 75 A due to package
25
50
75
100
125
150
Normalized continuous drain current as a
function of mounting base temperature
BUK9E04-40A
Product data sheet
0
175
200
Tmb (°C)
0
50
100
150
200
Tmb (°C)
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
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BUK9E04-40A
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N-channel TrenchMOS logic level FET
03ne68
103
RDSon = VDS / ID
tp = 10 μs
ID
(A)
100 μs
102
Capped at 75 A due to package
1 ms
10 ms
DC
10
100 ms
1
1
10
102
VDS (V)
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9E04-40A
Product data sheet
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N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance from junction to mounting
base
see Figure 4
-
-
0.5
K/W
Rth(j-a)
thermal resistance from junction to ambient
vertical in still air
-
60
-
K/W
03ne69
1
Zth(j-mb)
(K/W)
10−1
δ = 0.5
0.2
0.1
0.05
10−2
0.02
Single Shot
10−3
δ=
P
tp
T
t
tp
T
10−6
10−5
10−4
10−3
10−2
10−1
1
tp (s)
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9E04-40A
Product data sheet
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N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source breakdown
voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
40
-
-
V
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
36
-
-
V
VGS(th)
gate-source threshold voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10
1
1.5
2
V
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
0.5
-
-
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
-
-
2.3
V
IDSS
drain leakage current
VDS = 40 V; VGS = 0 V; Tj = 25 °C
-
0.05
10
µA
VDS = 40 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
IGSS
gate leakage current
VGS = 10 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = -10 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 4.3 V; ID = 25 A; Tj = 25 °C
-
3.7
5.9
mΩ
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 25 °C
-
2.9
4
mΩ
VGS = 5 V; ID = 25 A; Tj = 175 °C;
see Figure 11; see Figure 12
-
-
8.3
mΩ
VGS = 5 V; ID = 25 A; Tj = 25 °C;
see Figure 11; see Figure 12
-
3.5
4.4
mΩ
ID = 25 A; VDS = 32 V; VGS = 5 V;
Tj = 25 °C; see Figure 13
-
128
-
nC
-
13
-
nC
-
56
-
nC
-
6200
8260
pF
-
1040
1250
pF
-
680
940
pF
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 14
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C
-
62
-
ns
-
309
-
ns
turn-off delay time
-
365
-
ns
tf
fall time
-
306
-
ns
LD
internal drain inductance
from upper edge of drain mounting
base to centre of die ; Tj = 25 °C
-
2.5
-
nH
from drain lead 6 mm from package
to centre of die ; Tj = 25 °C
-
4.5
-
nH
from source lead to source bond
pad ; Tj = 25 °C
-
7.5
-
nH
LS
internal source inductance
Source-drain diode
VSD
source-drain voltage
IS = 40 A; VGS = 0 V; Tj = 25 °C;
see Figure 15
-
0.85
1.2
V
trr
reverse recovery time
-
260
-
ns
Qr
recovered charge
IS = 20 A; dIS/dt = -100 A/µs;
VGS = -10 V; VDS = 30 V; Tj = 25 °C
-
531
-
nC
BUK9E04-40A
Product data sheet
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Rev. 02 — 3 February 2011
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N-channel TrenchMOS logic level FET
03nd95
400
8
10
ID
(A)
7 6
03nd94
5
VGS = 5 V
RDSon
(mΩ)
300
4
4
200
3
3
100
2.2
0
0
2
4
6
8
2
10
3
6
9
12
Fig 5.
Output characteristics: drain current as a
function of drain-source voltage; typical values
03aa36
10-1
ID
(A)
Fig 6.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
03nd92
100
gfs
(S)
10-2
80
10-3
60
min
typ
max
10-4
40
10-5
20
10-6
0
0
Fig 7.
15
VGS (V)
VDS (V)
1
2
VGS (V)
3
Product data sheet
20
40
60
80
ID (A)
Sub-threshold drain current as a function of
gate-source voltage
BUK9E04-40A
0
Fig 8.
Forward transconductance as a function of
drain current; typical values
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BUK9E04-40A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03nd93
100
ID
(A)
03aa33
2.5
VGS(th)
(V)
80
2
60
1.5
typ
40
1
min
Tj = 175 °C
Tj = 25 °C
0.5
20
0
max
0
1
2
3
0
-60
4
0
60
120
VGS (V)
Fig 9.
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
RDSon
(mΩ)
VGS = 3 V 3.2 3.4 3.6 3.8
180
Fig 10. Gate-source threshold voltage as a function of
junction temperature
03nd96
10
Tj (°C)
03aa27
2
a
4
8
1.5
6
1
5
4
10
0.5
2
0
0
100
200
300
400
ID (A)
Fig 11. Drain-source on-state resistance as a function
of drain current; typical values
BUK9E04-40A
Product data sheet
0
−60
0
60
120
Tj (°C)
180
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
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BUK9E04-40A
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N-channel TrenchMOS logic level FET
03nd91
5
14000
C
(pF)
12000
VGS
(V)
4
03nd97
Ciss
Coss
10000
Crss
3
8000
VDD = 14 V
VDD = 32 V
6000
2
4000
1
2000
0
0
20
40
60
80
100
0
120
140
QG (nC)
10−2
10−1
1
102
10
VDS (V)
Fig 13. Gate-source voltage as a function of turn-on
gate charge; typical values
Fig 14. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
03nd90
100
IS
(A)
80
60
40
Tj = 175 °C
20
Tj = 25 °C
0
0
0.2
0.4
0.6
0.8
1.0
VSD (V)
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values
BUK9E04-40A
Product data sheet
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N-channel TrenchMOS logic level FET
7. Package outline
Plastic single-ended package (I2PAK); low-profile 3-lead TO-262
SOT226
A
A1
E
D1
mounting
base
D
L1
Q
b1
L
1
2
3
c
b
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
b1
c
D
max
D1
E
e
L
L1
Q
mm
4.5
4.1
1.40
1.27
0.85
0.60
1.3
1.0
0.7
0.4
11
1.6
1.2
10.3
9.7
2.54
15.0
13.5
3.30
2.79
2.6
2.2
OUTLINE
VERSION
SOT226
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
06-02-14
09-08-25
TO-262
Fig 16. Package outline SOT226 (I2PAK)
BUK9E04-40A
Product data sheet
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Rev. 02 — 3 February 2011
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N-channel TrenchMOS logic level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK9E04-40A v.2
20110203
Product data sheet
-
BUK95_96_9E04_40A v.1
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type number BUK9E04-40A separated from data sheet BUK95_96_9E04_40A v.1.
BUK95_96_9E04_40A v.1 20011024
BUK9E04-40A
Product data sheet
Product Specification
-
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Rev. 02 — 3 February 2011
-
© NXP B.V. 2011. All rights reserved.
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9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
9.3
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
BUK9E04-40A
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
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agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
9.4
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BUK9E04-40A
Product data sheet
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N-channel TrenchMOS logic level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Contact information. . . . . . . . . . . . . . . . . . . . . .13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 3 February 2011
Document identifier: BUK9E04-40A