TO -22 0A B BUK754R3-75C N-channel TrenchMOS standard level FET Rev. 02 — 21 April 2011 Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits AEC Q101 compliant Suitable for standard level gate drive sources Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications 12 V, 24 V and 42 V loads General purpose power switching Automotive systems Motors, lamps and solenoids 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 75 V - - 100 A [1][2] ID drain current VGS = 10 V; Tmb = 25 °C; see Figure 1; see Figure 4 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 333 W VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 7; see Figure 8 - 3.7 4.3 mΩ - - 630 mJ Static characteristics RDSon drain-source on-state resistance Avalanche ruggedness EDS(AL)S non-repetitive ID = 100 A; Vsup ≤ 75 V; drain-source avalanche RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped energy [1] Continuous current is limited by package. [2] Refer to document 9397 750 12572 for further information. BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain Simplified outline Graphic symbol D mb 3 S source mb D mounting base; connected to drain G mbb076 S 1 2 3 SOT78A (TO-220AB) 3. Ordering information Table 3. Ordering information Type number BUK754R3-75C BUK754R3-75C Product data sheet Package Name Description Version TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78A All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 2 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 75 V VDGR drain-gate voltage RGS = 20 kΩ - 75 V VGS gate-source voltage ID drain current -20 20 V Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 4 [1][2] - 192 A [3][2] - 100 A Tmb = 100 °C; VGS = 10 V; see Figure 1; see Figure 4 [3][2] - 100 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 4 - 769 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 333 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C - 100 A Source-drain diode source current IS Tmb = 25 °C [2][3] [2][1] peak source current ISM - 192 A pulsed; tp ≤ 10 µs; Tmb = 25 °C - 769 A - 630 mJ - - J Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID = 100 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped EDS(AL)R repetitive drain-source avalanche energy see Figure 3 [1] Current is limited by power dissipation chip rating. [2] Refer to document 9397 750 12572 for further information. [3] Continuous current is limited by package. [4] Maximum value not quoted. Repetitive rating defined in avalanche rating figure. [5] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [6] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [7] Refer to application note AN10273 for further information. BUK754R3-75C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 [4][5][6][7] © NXP B.V. 2011. All rights reserved. 3 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab376 200 03aa16 120 ID (A) Pder (%) 150 80 100 (1) 40 50 0 0 0 50 100 150 200 0 50 Tmb (°C) Fig 1. 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aab385 103 IAL (A) 102 (1) (2) 10 (3) 1 10-3 Fig 3. 10-2 10-1 1 tAL (ms) 10 Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time. BUK754R3-75C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 4 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab393 103 tp = 10 μs Limit RDSon = VDS / ID ID (A) 102 (1) 10 100 μs 1 ms 10 ms 1 10-1 10-1 Fig 4. DC 100 ms 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK754R3-75C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 5 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base - - 0.45 K/W Rth(j-a) thermal resistance from junction to ambient - 60 - K/W Conditions Min Typ Max Unit ID = 250 µA; VGS = 0 V; Tj = 25 °C 75 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C vertical in free air 6. Characteristics Table 6. Characteristics Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage 70 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 5; see Figure 6 - - 4.4 V VGSth gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 5; see Figure 6 1 - - V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 5; see Figure 6 2 3 4 V - 0.02 1 µA IDSS drain leakage current VDS = 75 V; VGS = 0 V; Tj = 25 °C IGSS gate leakage current VGS = 20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 7; see Figure 8 - - 9 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 7; see Figure 8 - 3.7 4.3 mΩ VDS = 75 V; VGS = 0 V; Tj = 175 °C - - 500 µA ID = 25 A; VDS = 60 V; VGS = 10 V; see Figure 9 - 142 - nC - 36 - nC - 67 - nC 5 - V RDSon IDSS drain-source on-state resistance drain leakage current Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 60 V; see Figure 9 - Ciss input capacitance 8744 11659 pF output capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 10 - Coss - 923 1108 pF Crss reverse transfer capacitance - 579 793 pF td(on) turn-on delay time - 61 - ns tr rise time - 100 - ns td(off) turn-off delay time - 194 - ns tf fall time - 90 - ns BUK754R3-75C Product data sheet VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 6 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit LD internal drain inductance from drain lead 6mm from package to centre of die - 4.5 - nH from contact screw on mounting base to centre of die - 3.5 - nH from source lead to source bonding pad - 7.5 - nH LS internal source inductance Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 11 - 0.85 1.2 V trr reverse recovery time - 83 - ns Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 25 V - 155 - nC 03aa32 5 VGS(th) (V) 4 10−5 10−6 0 60 120 180 Product data sheet 0 Tj (°C) 2 4 6 VGS (V) Gate-source threshold voltage as a function of junction temperature BUK754R3-75C max 10−4 min 1 0 −60 typ 10−3 typ 2 min 10−2 max 3 Fig 5. 03aa35 10−1 ID (A) Fig 6. Sub-threshold drain current as a function of gate-source voltage All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 7 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab378 12 03aa28 2.4 RDSon (mΩ) a 10 1.8 8 1.2 6 0.6 4 2 5 Fig 7. 10 15 VGS (V) Drain source on-state resistance as a function of gate-source voltage; typical values 003aab383 10 VGS (V) 8 0 −60 20 Fig 8. 0 60 120 180 Tj (°C) Normalized drain-source on-state resistance factor as a function of junction temperature 003aab381 16000 C (pF) VDS = 14 V Ciss 12000 VDS = 60 V 6 8000 Coss 4 4000 Crss 2 0 0 Fig 9. 50 100 150 QG (nC) 200 Gate-source voltage as a function of gate charge; typical values BUK754R3-75C Product data sheet 0 10-1 1 10 VDS (V) 102 Fig 10. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 8 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab384 250 IS (A) 200 150 100 Tj = 175 °C 50 Tj = 25 °C 0 0 0.5 1 1.5 VSD (V) 2 Fig 11. Source current as a function of source-drain diode; typical values BUK754R3-75C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 9 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78A A A1 p q mounting base D1 D L2 L1(1) Q b1 L 1 2 3 c b e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1(1) L2 max. p q Q mm 4.5 4.1 1.39 1.27 0.9 0.6 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 2.54 15.0 13.5 3.30 2.79 3.0 3.8 3.6 3.0 2.7 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78A REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 03-01-22 05-03-14 Fig 12. Package outline SOT78A (TO-220AB) BUK754R3-75C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 10 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK754R3-75C v.2 20110421 Product data sheet - BUK75_7E4R3-75C v.1 Modifications: BUK75_7E4R3-75C v.1 BUK754R3-75C Product data sheet • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Type number BUK754R3-75C separated from data sheet BUK75_7E4R3-75C v.1. 20060810 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 - © NXP B.V. 2011. All rights reserved. 11 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Document status [1] [2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. BUK754R3-75C Product data sheet Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 12 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BUK754R3-75C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 21 April 2011 © NXP B.V. 2011. All rights reserved. 13 of 14 BUK754R3-75C NXP Semiconductors N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 21 April 2011 Document identifier: BUK754R3-75C