IRL40B209

StrongIRFET™
IRL40B209
HEXFET® Power MOSFET
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC Inverters
D
G
S
Benefits
Optimized for Logic Level Drive
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free
RoHS Compliant, Halogen-Free
IRL40B209
TO-220
G
Gate
414A
ID (Package Limited)
195A
D
Drain
Standard Pack
Form
Quantity
Tube
50
6
S
Source
Orderable Part Number
IRL40B209
450
ID = 100A
400
5
Limited By Package
350
4
3
T J = 125°C
2
300
250
200
150
100
1
T J = 25°C
50
0
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
ID (Silicon Limited)
TO-220AB
IRL40B209
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
Package Type
40V
1.0m
1.25m
S
D
G






Base part number
VDSS
RDS(on) typ.
max
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0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRL40B209
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
TJ
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current 
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Max.
414
293
195
1707 
375
2.5
± 20
Units
A W
W/°C
V
-55 to + 175 Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics EAS (Thermally limited)
730
Single Pulse Avalanche Energy 
1420
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
See Fig 15, 16, 23a, 23b
Repetitive Avalanche Energy 
EAR
Thermal Resistance Symbol
Parameter
Typ.
Max.
Junction-to-Case 
RJC
–––
0.4
Case-to-Sink, Flat Greased Surface
RCS
0.50
–––
Junction-to-Ambient 
RJA
–––
62
TSTG
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Min. Typ. Max.
40
––– –––
––– 0.031 –––
–––
1.0 1.25
–––
1.2
1.6
1.0 –––
2.4
––– –––
1.0
––– ––– 150
––– ––– 100
––– ––– -100
–––
2.1
–––
°C mJ
A
mJ
Units
°C/W Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 5mA 
VGS = 10V, ID = 100A
m
VGS = 4.5V, ID = 50A 
V
VDS = VGS, ID = 250µA
VDS =40 V, VGS = 0V
µA
VDS =40V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V

Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that
current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
 Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.15mH,RG = 50, IAS = 100A, VGS =10V.
 ISD  100A, di/dt  930A/µs, VDD  V(BR)DSS, TJ  175°C.
 Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
 R is measured at TJ approximately 90°C.
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 53A, VGS =10V. 
 Pulse drain current is limited at 780A by source bonding technology.
2
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IRL40B209
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg – Qgd)
Turn-On Delay Time
Rise Time
Min.
270
–––
–––
–––
–––
–––
–––
Typ.
–––
180
51
88
92
56
198
Max. Units
Conditions
–––
S VDS = 10V, ID =100A
270
ID = 100A
VDS = 20V
–––
nC VGS = 4.5V
–––
–––
–––
VDD = 20V
–––
ID = 30A
ns
–––
RG= 2.7
VGS = 4.5V
–––
td(off)
Turn-Off Delay Time
–––
188
tf
Ciss
Coss
Fall Time
Input Capacitance
Output Capacitance
–––
–––
–––
150
15140
1990
Crss
Reverse Transfer Capacitance
–––
1370
–––
Coss eff.(ER)
Effective Output Capacitance
–––
2340
–––
VGS = 0V, VDS = 0V to 32V
Coss eff.(TR)
Output Capacitance (Time Related)
–––
2900
–––
VGS = 0V, VDS = 0V to 32V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
414
–––
–––
1707
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
–––
–––
1.2
dv/dt
Peak Diode Recovery dv/dt
–––
2.4
–––
trr
Reverse Recovery Time
–––
41
–––
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
42
46
50
2.0
–––
–––
–––
–––
–––
–––
pF VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
Diode Characteristics Symbol
IS
ISM
3
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A
V
D
G
S
TJ = 25°C,IS = 100A,VGS = 0V 
V/ns TJ = 175°C,IS = 100A,VDS = 40V
ns
TJ = 25°C
VDD = 34V
TJ = 125°C
IF = 100A,
TJ = 25°C di/dt = 100A/µs 
nC
TJ = 125°C
A TJ = 25°C 
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IRL40B209
1000
1000
BOTTOM
TOP
100
3.5V
 60µs PULSE WIDTH
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
100
 60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
10
0.1
1
10
0.1
100
10
100
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
1000
2.0
T J = 175°C
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
T J = 25°C
100
VDS = 10V
 60µs PULSE WIDTH
10
ID = 100A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics
Fig 6. Normalized On-Resistance vs. Temperature
14
100000
ID = 100A
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
C, Capacitance (pF)
BOTTOM
3.5V
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
Ciss
10000
Coss
Crss
12
VDS= 32V
VDS= 20V
VDS= 8V
10
8
6
4
2
0
1000
1
10
100
VDS, Drain-to-Source Voltage (V)
0
50 100 150 200 250 300 350 400 450
QG, Total Gate Charge (nC)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
4
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IRL40B209
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
T J = 25°C
100
OPERATION IN THIS AREA
LIMITED BY RDS(on)
1000
100µsec
1msec
100
Limited by Package
10
10msec
1
VGS = 0V
10
0.1
0
0.5
1.0
1.5
2.0
0.1
2.5
1
10
100
VDS, Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
1.8
50
Id = 5.0mA
1.6
48
1.4
1.2
46
Energy (µJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
DC
Tc = 25°C
Tj = 175°C
Single Pulse
44
1.0
0.8
0.6
0.4
42
0.2
0.0
40
-60 -40 -20 0
-5
20 40 60 80 100 120 140 160
T J , Temperature ( °C )
0
5
10
15
20
25
30
35
40
VDS, Drain-to-Source Voltage (V)
RDS(on), Drain-to -Source On Resistance ( m)
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
4.0
VGS = 3.5V
VGS = 4.5V
VGS = 6.0V
VGS = 8.0V
VGS = 10V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
20 40 60 80 100 120 140 160 180 200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRL40B209
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
800
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
EAR , Avalanche Energy (mJ)
700
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figures14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figure 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav Submit Datasheet Feedback
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IRL40B209
12
2.0
1.5
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
2.5
ID = 250µA
ID = 1.0mA
1.0
10
IF = 60A
V R = 34V
TJ = 25°C
8
TJ = 125°C
6
4
ID = 1.0A
0.5
2
0
0
-75 -50 -25
0
0
25 50 75 100 125 150 175
200
600
800
1000
diF /dt (A/µs)
T J , Temperature ( °C )
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
400
12
IF = 100A
V R = 34V
10
320
IF = 60A
V R = 34V
TJ = 25°C
280
TJ = 125°C
360
TJ = 25°C
TJ = 125°C
QRR (nC)
8
IRRM (A)
400
6
240
200
160
4
120
2
80
40
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
QRR (nC)
280
240
IF = 100A
V R = 34V
TJ = 25°C
200
TJ = 125°C
160
120
80
40
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
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IRL40B209
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
IAS
20V
tp
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRL40B209
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAM PLE:
T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789
ASSEM BLED O N W W 19, 2000
IN T H E A S S E M B L Y L IN E "C "
N o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d - F r e e "
IN T E R N A T IO N A L
R E C T IF IE R
LO G O
ASSEM BLY
LO T C O D E
PART NUM BER
D ATE C O D E
YEA R 0 = 2000
W EEK 19
L IN E C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRL40B209
Qualification Information† Industrial
(per JEDEC JESD47F) ††
Qualification Level Moisture Sensitivity Level
TO-220
N/A
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
10
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