TLE5012B Register Setting

Angle Sensors
GMR-Based Angle Sensors
TLE5012B Register Setting
TLE5012B
Application Note
V1.5, 2012-11-15
ATV SC
Edition 2012-11-15
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
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TLE5012B
Revision History
Page or Item
Subjects (major changes since previous revision)
V1.5, 2012-11-15
All
Changed reset values of fuse-calibrated registers to “device-specific”
8
Added description for CRC check, derivate-specific reset values, device-specific reset values
and multi-purpose registers.
All
Added extensive description to all registers
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Application Note
3
V1.5, 2012-11-15
TLE5012B
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
2.1
2.1.1
2.2
SSC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Registers Chapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Communication Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3
Fuse Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Application Note
4
V1.5, 2012-11-15
TLE5012B
List of Figures
List of Figures
Figure 1
Derivate-specific fuse settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Application Note
5
V1.5, 2012-11-15
TLE5012B
List of Tables
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Bit Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Registers Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
SSC Command to read the angle value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SSC Command to read angle speed and angle revolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SSC Command to change Interface Mode2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Application Note
6
V1.5, 2012-11-15
TLE5012B
Introduction
1
Introduction
This document is the second part of the electrical specification. Generally the latest data sheet of TLE5012B is
valid.
The main interface of the TLE5012B is Synchronous Serial Communication (SSC) and the following section
describes the configuration bits.
2
SSC Registers
Table 1 lists the various bit types used in the SSC registers.
Table 1
Bit Types
Abbreviation
Function
Description
r
Read
Read-only registers
w
Write
Read and write registers
u
Update
Update buffer for this bit is present. If an update is issued and the UpdateRegister Access bit (UPD in Command Word) is set, the immediate values
are stored in this update buffer simultaneously. This enables a snapshot of
all necessary system parameters at the same time.
2.1
Registers Chapter
This section describes the registers of the TLE5012B. It also defines the read/write access rights of the specific
registers. Table 2 identifies the values with symbols. Access to the registers is accomplished via the SSC
Interface.
Table 2
Registers Overview
Register Short Name
Register Long Name
Offset Address
Page Number
Registers Chapter, Register Descriptions
STAT
STATus register
00H
9
ACSTAT
ACtivation STATus register
01H
12
AVAL
Angle VALue register
02H
14
ASPD
Angle SPeeD register
03H
15
AREV
Angle REVolution register
04H
16
FSYNC
Frame SYNChronization register
05H
17
MOD_1
Interface MODe1 register
06H
17
SIL
SIL register
07H
18
MOD_2
Interface MODe2 register
08H
20
MOD_3
Interface MODe3 register
09H
21
OFFX
OFFset X
0AH
22
OFFY
OFFset Y
0BH
22
SYNCH
SYNCHronicity
0CH
23
IFAB
IFAB register
0DH
23
MOD_4
Interface MODe4 register
0EH
24
Application Note
7
V1.5, 2012-11-15
TLE5012B
SSC Registers
Table 2
Registers Overview (cont’d)
Register Short Name
Register Long Name
Offset Address
Page Number
TCO_Y
Temperature COefficient register
0FH
27
ADC_X
ADC X-raw value
10H
28
ADC_Y
ADC Y-raw value
11H
28
IIF_CNT
IIF CouNTer value
20H
29
The register is addressed wordwise.
Configuration Register Checksum
To monitor the integrity of the sensor configuration, the TLE5012B performs a cyclic redundancy check of the
configuration registers in address range 08H to 0FH. The 8bit CRC is stored in register CRC_PAR (address 0FH).
When changing one or more of these registers, a new checksum has to be calculated from registers 08H to 0FH
using the generator polynomial described in the TLE5012B Data Sheet, and written to the CRC_PAR register.
Otherwise, a CRC fail error (status bit S_FUSE = 1) will occur. The CRC check can be disabled by setting register
AS_FUSE to 0. It is automatically deactivated if auto calibration is active, as auto calibration performs periodical
adjustments of several configuration registers.
Derivate-Specific Reset Values:
The reset values of certain registers (for example interface settings) are set by laser fuses which are specific for
the employed derivate (Exxxx number) of the TLE5012B. In this case, the reset values in the register table are
marked as “derivate-specific”. A list of specific reset values for all derivates is given in Chapter 3.
Factory-Calibrated Reset Values:
The reset values of calibration registers (for example offset calibration) are set by laser fuses which are written
during the factory calibration of the sensor. These values are specific for each individual device. In this case, the
reset values in the register table are marked as “device-specific”. When modifying parts of these registers, the
register content should be read first, then only the relevant bits should be changed and the content should be
written back into the register in order to avoid unintended over-writing of the calibration values.
Multi-Purpose Registers:
Some configuration registers have more than one assignment and change different settings depending on the
selected interface for the IFA, IFB, IFC pins (selectable via the IF_MD register, address 0EH). These registers are
marked as “multi-purpose”, and their assignments are described separately for each relevant interface.
Application Note
8
V1.5, 2012-11-15
TLE5012B
SSC Registers
2.1.1
Register Descriptions
Status Register
STAT
Offset
Status Register
15
Reset Value
00H
14
RD_ST
13
S_NR
8001H
12
11
10
9
8
NO_GMR_
A
NO_GMR_
XY
S_ROM
S_ADCT
Res
r
7
6
w
5
ru
4
ru
3
r
2
ru
1
0
S_MAGOL
S_XYOL
S_OV
S_DSPU
S_FUSE
S_VR
S_WD
S_RST
ru
ru
ru
ru
ru
ru
ru
ru
Field
Bits
Type
Description
RD_ST
15
r
Read Status
0B
status values not changed since last readout
1B
status values changed
Reset: 1B
S_NR
14:13
w
Slave Number
Used to identify up to four sensors in a bus configuration.
The levels on pin SCK and pin IFC can be used to change
the default slave number for SPC interface. Pin SCK
represents S_NR[13] and pin IFC the S_NR[14].
Reset: 00B
NO_GMR_A
12
ru
No valid GMR Angle Value
Cyclic check of DSPU output.
0B
valid GMR angle value on the interface
1B
no valid GMR angle value on the interface (e.g test
vectors)
Reset: 0B
NO_GMR_XY
11
ru
No valid GMR XY Values
Cyclic check of ADC input.
0B
valid GMR_XY values on the ADC input
1B
no valid GMR_XY values on the ADC input (e.g.
test vectors)
Reset: 0B
Application Note
9
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
S_ROM
10
r
Status ROM1)
Check of ROM-CRC at startup. After fail, DSPU does not
start. SPI access possible.
0B
CRC ok
1B
CRC fail or running
Reset: 0B
S_ADCT
9
ru
Status ADC-Test1)
Check of signal path with test vectors. All test vectors at
startup tested. Activation in operation via AS_ADCT
possible.
0B
Test vectors ok
1B
Test vectors out of limit
Reset: 0B
S_MAGOL
7
ru
Status Magnitude Out of Limit1)
Cyclic check of available magnetic field strength (magnet
loss check). Deactivation via AS_VEC_MAG.
0B
GMR-magnitude ok
1B
GMR-magnitude out of limit
Reset: 0B
S_XYOL
6
ru
Status X,Y Data Out of Limit1)
Cyclic check of X and Y raw values. Deactivation via
AS_VEC_XY
0B
X,Y data ok
1B
X,Y data out of limit (>23230 digits, <-23230 digits)
Reset: 0B
S_OV
5
ru
Status Overflow1)
Cyclic check of DSPU overflow. Deactivation via AS_OV.
0B
No DSPU overflow occurred
DSPU overflow occurred
1B
Reset: 0B
S_DSPU
4
ru
Status Digital Signal Processing Unit
Check of DSPU, CORDIC and CAPCOM at startup.
Activation in operation via AS_DSPU possible.
0B
DSPU self-test ok
1B
DSPU self-test not ok, or self test is running
Reset: 0B
Application Note
10
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
S_FUSE
3
ru
Status Fuse CRC1)
CRC check configuration registers 08H to 0FH (CRC_PAR
register 0FH). Deactivation via AS_FUSE. CRC check is
automatically disabled if auto calibration is active.
Note: When changing the content of one or more
configuration registers in address range 08H to 0FH,
a new CRC has to be calculated and stored in
register CRC_PAR (address 0FH), otherwise CRC
fail will occur.
0B
CRC ok
1B
CRC fail
Reset: 0B
S_VR
2
ru
Status Voltage Regulator1)
Permanent check of internal and external supply
voltages. Deactivation via AS_VR
0B
Voltages ok
1B
VDD over voltage; VDD-off; GND-off; or VOVG; VOVA;
VOVD too high
Reset: 0B
S_WD
1
ru
Status Watchdog
Permanent check of watchdog. After watchdog-counter
overflow, the DSPU stops. Deactivation via AS_WD
0B
normal operation
1B
watchdog counter expired (DSPU stop), AS_RST
must be activated. Outputs deactivated, Pull
Up/Down active.
Reset: 0B
S_RST
0
ru
Status Reset1)2)
Permanent check of any reset. Deactivation via AS_RST.
0B
no reset since last readout
indication of power-up, short power-break,
1B
firmware or active reset
Reset: 1B
1) reset to “0” after readout
2) bit remains “1” after reset occurred until status register is read.
Note: When an error occurs, the corresponding bit in the safety word remains “0” until the status register is read.
Application Note
11
V1.5, 2012-11-15
TLE5012B
SSC Registers
Activation Status Register
ACSTAT
Offset
Activation Status Register
Reset Value
01H
15
5AFEH
11
Res
10
9
8
AS_FRST
AS_ADCT
Res
7
6
w
5
4
3
w
2
w
1
0
AS_VEC_
MAG
AS_VEC_
XY
AS_OV
AS_DSPU
AS_FUSE
AS_VR
AS_WD
AS_RST
w
w
w
w
w
w
w
w
Field
Bits
Type
Description
Res
15:11
w
Reserved
Reset: 01011B
AS_FRST
10
w
Activation of Firmware Reset
All configuration registers retain their contents.
0B
after execution
1B
activation of firmware reset (S_RST is set)
Reset: 0B
AS_ADCT
9
w
Enable ADC Test vector Check
Activation of this test is only allowed by deactivated
AUTOCAL.
0B
after execution
1B
activation of ADC Test vector Check
Reset: 1B
AS_VEC_MAG
7
w
Activation of Magnitude Check
0B
monitoring of magnitude disabled
1B
monitoring of magnitude enabled
Reset: 1B
AS_VEC_XY
6
w
Activation of X,Y Out of Limit-Check
0B
monitoring of X,Y Out of Limit disabled
1B
monitoring of X,Y Out of Limit enabled
Reset: 1B
AS_OV
5
w
Enable of DSPU Overflow Check
0B
monitoring of DSPU Overflow disabled
1B
monitoring of DSPU Overflow enabled
Reset: 1B
AS_DSPU
4
w
Activation DSPU BIST
0B
after execution
1B
activation of DSPU BIST or BIST running
Reset: 1B
Application Note
12
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
AS_FUSE
3
w
Activation Fuse CRC
Automatically enabled by deactivation of AUTOCAL.
0B
monitoring of CRC disabled
1B
monitoring of CRC enabled
Reset: 1B
AS_VR
2
w
Enable Voltage Regulator Check
0B
check of regulator voltages disabled
1B
check of regulator voltages enabled
Reset: 1B
AS_WD
1
w
Enable DSPU Watchdog-HW-Reset
0B
DSPU watchdog monitoring disabled
1B
DSPU Watchdog monitoring enabled
Reset: 1B
AS_RST
0
w
Activation of Hardware Reset
Activation occurs after CSQ switches from ’0’ to ’1’ after
SSC transfer.
0B
after execution
1B
activation of HW Reset (S_RST is set)
Reset: 0B
Application Note
13
V1.5, 2012-11-15
TLE5012B
SSC Registers
Angle Value Register
AVAL
Offset
Angle Value Register
15
Reset Value
02H
8000H
14
8
RD_AV
ANG_VAL
r
7
ru
0
ANG_VAL
ru
Field
Bits
Type
Description
RD_AV
15
r
Read Status, Angle Value
0B
no new angle value since last readout
1B
new angle value (ANG_VAL) present
Reset: 1B
ANG_VAL
14:0
ru
Calculated Angle Value (signed 15-bit)
Angle[°] =
360 °
ANG _ VAL [ digits ]
215
(1)
4000H -180°
0000H 0°
3FFFH +179.99°
(valid for ANG_RANGE = 0x080)
Reset: 0H
Application Note
14
V1.5, 2012-11-15
TLE5012B
SSC Registers
Angle Speed Register
ASPD
Offset
Angle Speed Register
15
Reset Value
03H
8000H
14
8
RD_AS
ANG_SPD
r
7
ru
0
ANG_SPD
ru
Field
Bits
Type
Description
RD_AS
15
r
Read Status, Angle Speed
0B
no new angle speed value since last readout
1B
new angle speed value (ANG_SPD) present
Reset: 1B
ANG_SPD
14:0
ru
Calculated Angle Speed
Without prediction difference between three consecutive
angle values.
AngleRange
2 15
Speed [ ° / s ] =
[°]
ANG _ SPD [ digits ]
2 t upd [ s ]
(2)
With prediction, difference between predicted value and
next-to-last measured angle value.
Speed [ ° / s ] =
AngleRange
2 15
[°]
ANG _ SPD [ digits ]
3 t upd [ s ]
(3)
Reset: 0H
Application Note
15
V1.5, 2012-11-15
TLE5012B
SSC Registers
Angle Revolution Register
AREV
Offset
Angle Revolution Register
15
Reset Value
04H
14
8000H
9
8
RD_REV
FCNT
REVOL
r
7
wu
ru
0
REVOL
ru
Field
Bits
Type
Description
RD_REV
15
r
Read Status, Revolution
0B
no new values since last readout
1B
new value (REVOL) present
Reset: 1B
FCNT
14:9
wu
Frame Counter (unsigned 6-bit value)
Internal frame counter. Increments every update period
(FIR_MD setting).
Reset: 0H
REVOL
8:0
ru
Number of Revolutions (signed 9-bit value)
Revolution counter. Increments for every full rotation in
counter-clockwise direction (at angle discontinuity from
0° to 360°) and decrements for every full rotation in
clockwise direction (at angle discontinuity from 360° to
0°)
Reset: 0H
Application Note
16
V1.5, 2012-11-15
TLE5012B
SSC Registers
Frame Synchronization Register
FSYNC
Offset
Frame Synchronization Register
Reset Value
05H
0000H
15
9
8
FSYNC
TEMPER
wu
r
0
7
TEMPER
r
Field
Bits
Type
Description
FSYNC
15:9
wu
Frame Synchronization Counter Value
Subcounter within one frame. Increments every internal
clock cycle. Maximum counter value depends on
FIR_MD setting. 16 @ FIR_MD=00; 32 @ FIR_MD=01;
64 @ FIR_MD=10; 128 @ FIR_MD=11.
Reset: 0H
TEMPER
8:0
r
Temperature Value
Signed integer temperature value.
T[°C] = (TEMPER+152) / 2.776
Reset: 0H
Interface Mode1 Register
MOD_1
Offset
Interface Mode1 Register
15
14
Reset Value
06H
derivate-specific
13
8
Res
FIR_MD
w
7
5
Res
4
3
2
CLK_SEL
Res
DSPU_HO
LD
IIF_MOD
w
w
w
Application Note
17
1
0
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
FIR_MD
15:14
w
Update Rate Setting (Filter Decimation)
00B 21.3 µs
01B 42.7 µs
10B 85.3 µs
11B 170.6 µs
Reset: derivate-specific
CLK_SEL
4
w
Clock Source Select
Switch to external clock. If there is no clock signal on the
IFC pin or PLL out of lock, the sensor automatically
switches to internal oscillator.
0B
internal oscillator
1B
external 4-MHz clock (IFC pin switched to input)
Reset: 0B
DSPU_HOLD
2
w
Hold DSPU Operation
If DSPU is on hold, no watchdog reset is performed by
DSPU. Deactivate watchdog with AS_WD before setting
DSPU on hold.
0B
DSPU in normal schedule operation
1B
DSPU is on hold
Reset: 0B
IIF_MOD
1:0
w
Incremental Interface Mode
00B IIF disabled
01B A/B operation with Index on CLK/HS3
10B Step/Direction operation with Index on CLK/HS3
11B not allowed
Reset: derivate-specific
SIL Register
SIL
Offset
SIL Register
Reset Value
07H
15
14
FILT_PA
R
FILT_IN
V
w
7
w
6
Res
ADCTV_E
N
ADCTV_Y
ADCTV_X
w
w
w
Application Note
13
0000H
11
10
9
FUSE_RE
L
Res
5
3
18
8
Res
w
2
0
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
FILT_PAR
15
w
Filter Parallel
Diagnostic function to test ADCs. If enabled, the raw Xsignal is routed also to the Y-ADC so SIN and COS signal
should be identical.
0B
filter parallel disabled
1B
filter parallel enabled (source: X-value)
Reset: 0B
FILT_INV
14
w
Filter Inverted
Diagnostic function to test ADCs. If enabled, the X- and
Y-signals are inverted. The angle output is then shifted by
180°.
0B
filter inverted disabled
1B
filter inverted enabled
Reset: 0B
FUSE_REL
10
w
Fuse Reload
0B
normal operation
1B
fuse parameters reloaded to DSPU at next cycle
start
Reset: 0B
ADCTV_EN
6
w
ADC-Test Vectors
Diagnostic function to test ADCs. If enabled, sensor
elements are internally disconnected and test voltages
are connected to ADCs. Test vectors can be selected via
the register ADCTV_Y and ADCTV_X.
0B
ADC-Test Vectors disabled
1B
ADC-Test Vectors enabled
Reset: 0B
ADCTV_Y
5:3
w
Test vector Y
000B 0V
001B +70%
010B +100%
011B +Overflow
101B -70%
110B -100%
111B -Overflow
Reset: 0H
ADCTV_X
2:0
w
Test vector X
000B 0V
001B +70%
010B +100%
011B +Overflow
101B -70%
110B -100%
111B -Overflow
Reset: 0H
Application Note
19
V1.5, 2012-11-15
TLE5012B
SSC Registers
Interface Mode2 Register
MOD_2
Offset
Interface Mode2 Register
15
Reset Value
08H
derivate-specific
14
8
Res
ANG_RANGE
w
3
2
ANG_RANGE
ANG_DIR
PREDICT
AUTOCAL
w
w
w
w
7
4
1
0
Field
Bits
Type
Description
ANG_RANGE
14:4
w
Angle Range1)
Changes the representation of ANG_VAL.
ANG_VAL = ANG_VAL_INT*ANG_RANGE/128
(ANG_VAL_INT is always -180°..180° -> -16384..16383)
Angle Range [°] = 360° * (27 / ANG_RANGE[digits])
200H represents 90° (-45°..45° -> -16384..16383)
080H represents 360° (-180°..180° -> -16384..16383)
Reset: 080H
ANG_DIR
3
w
Angle Direction
0B
counterclockwise rotation of magnet
1B
clockwise rotation of magnet
Reset: 0B
PREDICT
2
w
Prediction
0B
prediction disabled
1B
prediction enabled
Reset: derivate-specific
AUTOCAL
1:0
w
Auto-calibration Mode
Automatic calibration of offset and amplitude
synchronicity for applications with full-turn capability.
CRC check of calibration registers is automatically
disabled if auto-calibration is activated. A detailed
description of auto-calibration is given in the data sheet.
00B no auto-calibration
01B auto-cal. mode 1: update every angle update cycle
(FIR_MD setting)
10B auto-cal. mode 2: update every 1.5 revolutions
11B auto-cal. mode 3: update every 11.25°
Reset: derivate-specific
1)Auto-calibration works only for ANG_RANGE = 080H.
Application Note
20
V1.5, 2012-11-15
TLE5012B
SSC Registers
Interface Mode3 Register
MOD_3
Offset
Interface Mode3 Register
Reset Value
09H
device-specific
15
8
ANG_BASE
w
7
4
3
2
1
0
ANG_BASE
SPIKEF
SSC_OD
PAD_DRV
w
w
w
w
Field
Bits
Type
Description
ANG_BASE
15:4
w
Angle Base1)2)
Sets the 0° angle position (12 bit value).
800H -180°
000H 0°
7FFH +179.912°
Reset: device-specific
SPIKEF
3
w
Analog Spike Filter of Input Pads
Filters voltage spikes on input pads. Additional delay of
10 µs for data input.
0B
spike filter disabled
1B
spike filter enabled
Reset: derivate-specific
SSC_OD
2
w
SSC-Interface Data Pin Output Mode
0B
Push-Pull
1B
Open Drain
Reset: 0B
PAD_DRV
1:0
w
Configuration of Pad-Driver
00B IFA/IFB/IFC: strong driver, DATA: strong driver,
fast edge
01B IFA/IFB/IFC: strong driver, DATA: strong driver,
slow edge
10B IFA/IFB/IFC: weak driver, DATA: medium driver,
fast edge
11B IFA/IFB/IFC: weak driver, DATA: weak driver, slow
edge
Reset: derivate-specific
1) factory-calibrated to make the 0° direction parallel to the edge of the chip.
2) to manually set the 0° position, rotate the magnet into the desired position, then read the AVAL register and drop the 3 LSBs
to obtain a 12bit angle value; then subtract this value from the ANG_BASE register.
Application Note
21
V1.5, 2012-11-15
TLE5012B
SSC Registers
Offset X Register
OFFX
Offset
Offset X
Reset Value
0AH
device-specific
15
8
X_OFFSET
w
7
4
3
X_OFFSET
0
Res
w
Field
Bits
Type
Description
X_OFFSET
15:4
w
Offset Correction of X-value in digits
Raw X-value offset correction at 25°C.
Reset: device-specific
Offset Y Register
OFFY
Offset
Offset Y
Reset Value
0BH
device-specific
15
8
Y_OFFSET
w
7
4
3
Y_OFFSET
0
Res
w
Field
Bits
Type
Description
Y_OFFSET
15:4
w
Offset Correction of Y-value in digits
Raw Y-value offset correction at 25°C.
Reset: device-specific
Application Note
22
V1.5, 2012-11-15
TLE5012B
SSC Registers
Synchronicity Register
SYNCH
Offset
Synchronicity
Reset Value
0CH
device-specific
15
8
SYNCH
w
7
4
3
0
SYNCH
Res
w
Field
Bits
Type
Description
SYNCH
15:4
w
Amplitude Synchronicity
Raw value amplitude synchronicity correction.
+2047D 112.494%
0D
100%
-2048D 87.500%
Reset: device-specific
IFAB Register (multi-purpose)
IFAB
Offset
IFAB Register
Reset Value
0DH
device-specific
15
8
ORTHO
w
7
Application Note
4
3
2
ORTHO
FIR_UDR
IFAB_OD
IFAB_HYST
w
w
w
w
23
1
0
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
ORTHO
15:4
w
Orthogonality Correction of X and Y Components
GMR element orthogonality correction.
+2047D 11.2445°
0D
0°
-2048D -11.2500°
Reset: device-specific
FIR_UDR
3
w
FIR Update Rate
Initial filter update rate (FIR) setting to be loaded into
FIR_MD on startup. Changes of FIR setting can be done
after power-on via SPI within FIR_MD.
0B
FIR_MD = ‘10’ (85.3 µs)
1B
FIR_MD = ‘01’ (42.7 µs)
Reset: derivate-specific
IFAB_OD
2
w
IFA,IFB,IFC Output Mode
0B
Push-Pull
1B
Open Drain
Reset: derivate-specific
IFAB_HYST (multi-purpose)
1:0
w
HSM and IIF Mode: Hysteresis
Electrical switching hysteresis for HSM and IIF interface.
00B 0°
01B 0.09°
10B 0.27°
11B 0.625°
SPC Mode: Unit Time
00B 3.0 µs
01B 2.5 µs
10B 2.0 µs
11B 1.5 µs
Reset: derivate-specific
Interface Mode4 Register (multi-purpose)
MOD_4
Offset
Interface Mode4 Register
Reset Value
0EH
device-specific
15
9
7
5
TCO_X_T
HSM_PL
P
w
4
w
0
3
HSM_PLP
IFAB_RES
w
w
Application Note
8
24
2
Res
1
IF_MD
w
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
TCO_X_T
15:9
w
Offset Temperature Coefficient for X-Component1)
Reset: device-specific
HSM_PLP (multi-purpose)
8:5
w
Hall Switch Mode: Pole-Pair Configuration
0000B 1 pole pairs
0001B 2 pole pairs
0010B 3 pole pairs
0011B 4 pole pairs
0100B 5 pole pairs
0101B 6 pole pairs
0110B 7 pole pairs
0111B 8 pole pairs
1000B 9 pole pairs
1001B 10 pole pairs
1010B 11 pole pairs
1011B 12 pole pairs
1100B 13 pole pairs
1101B 14 pole pairs
1110B 15 pole pairs
1111B 16 pole pairs
Pulse-Width-Modulation Mode: Error Indication
0000B error indication enabled
0010B error indication disabled
Incremental Interface Mode: Absolute Count
Interface counts to absolute value at startup
0000B absolute count enabled
0100B absolute count disabled
SPC Mode: Total Trigger Time
Duration of the master pulse to trigger SPC output
0000B 90*UT
1000B tmlow + 12 UT
Reset: derivate-specific
Application Note
25
V1.5, 2012-11-15
TLE5012B
SSC Registers
Field
Bits
Type
Description
IFAB_RES (multi-purpose)
4:3
w
Pulse-Width-Modulation Mode: Frequency
Selection of PWM frequency.
00B 244 Hz
01B 488 Hz
10B 977 Hz
11B 1953 Hz
Incremental Interface Mode: IIF resolution
00B 12bit, 0.088° step
01B 11bit, 0.176° step
10B 10bit, 0.352° step
11B 9bit, 0.703° step
SPC Mode: SPC Frame Configuration
00B 12bit angle
01B 16bit angle
10B 12bit angle + 8bit temperature
11B 16bit angle + 8bit temperature
Reset: derivate-specific
IF_MD
1:0
w
Interface Mode on IFA,IFB,IFC
Selected by external circuit of CLK pin at Power On Time.
pull-up on IFC (CLK) pin --> Incremental Interface is
selected; pull-down on IFC (CLK) pin --> IF_MD stored
Interface is used.
Switching to another interface during operation needs to
stop the DSPU (DSPU_HOLD).
SSC interface is always active in parallel on pins SCK,
CSQ and DATA.
00B IIF
01B PWM
10B HSM
11B SPC2)
Reset: derivate-specific
1) If auto-calibration is enabled, TCO_X_T is automatically set to 0. Once auto-calibration is deactivated, laser-fused
calibration values are loaded into TCO_X_T.
2) In SPC interface configuration, the sensor updates the AVAL register only when receiving an SPC trigger pulse on the IFA
pin.
Application Note
26
V1.5, 2012-11-15
TLE5012B
SSC Registers
Temperature Coefficient Register
TCO_Y
Offset
Temperature Coefficient Register
15
Reset Value
0FH
9
8
device-specific
7
0
TCO_Y_T
SBIS
T
CRC_PAR
w
w
w
Field
Bits
Type
Description
TCO_Y_T
15:9
w
Offset Temperature Coefficient for Y-Component1)
Reset: device-specific
SBIST
8
w
Startup-BIST
0B
Startup-BIST disabled
1B
Startup-BIST enabled
Reset: 1B
CRC_PAR
7:0
w
CRC of Parameters
CRC of parameters from address 08H to 0FH. If any
settings within these registers are changed, this CRC has
to be changed accordingly.
Reset: device-specific
1) If auto-calibration is enabled, TCO_Y_T is automatically set to 0. Once auto-calibration is deactivated, laser-fused
calibration values are loaded into TCO_Y_T.
Application Note
27
V1.5, 2012-11-15
TLE5012B
SSC Registers
X-raw Value Register
ADC_X
Offset
X-raw value
Reset Value
10H
0000H
15
0
ADC_X
r
Field
Bits
Type
Description
ADC_X
15:0
r
ADC value of X-GMR
Read-out of this register will update ADC_Y
Reset: 0H
Y-raw Value Register
ADC_Y
Offset
Y-raw value
Reset Value
11H
0000H
15
0
ADC_Y
r
Field
Bits
Type
Description
ADC_Y
15:0
r
ADC value of Y-GMR
Updated when ADC_X or ADC_Y is read.
Reset: 0H
Application Note
28
V1.5, 2012-11-15
TLE5012B
SSC Registers
Increment Counter Register
IIF_CNT
Offset
IIF Counter value
15
14
Reset Value
20H
0000H
13
0
Res
IIF_CNT
r
Field
Bits
Type
Description
IIF_CNT
13:0
r
Counter value of increments
This counter increments or decrements for every pulse
on the incremental interface, depending on the rotation
direction.
It can be used for synchronization purposes between
sensor and counter value on microcontroller side.
Reset: 0H
Application Note
29
V1.5, 2012-11-15
TLE5012B
SSC Registers
2.2
Communication Examples
This chapter gives some short SPI communication examples. The sensor has to be selected first via CSQ, and
SCK must be available for the communication.
Table 3
SSC Command to read the angle value
SSC Description
Word
No.
Master transmitting
1
Command
1_0000_0_000010_0001
2
Read Data
1_xxxxxxxxxxxxxxx
Read angle value
3
Safety Word
1_1_1_1_xxxx_xxxxxxxx
Read Safety Word
Table 4
TLE5012B transmitting
Note
R/W_Lock_UPD_ADD_ND
SSC Command to read angle speed and angle revolution
SSC Description
Word
No.
Master transmitting
1
Command
1_0000_0_000011_0010
2
Read Data
1_xxxxxxxxxxxxxxx
Read angle speed
3
Read Data
1_xxxxxx_xxxxxxxxx
Read angle revolution
4
Safety Word
1_1_1_1_xxxx_xxxxxxxx
Read Safety Word
Table 5
TLE5012B transmitting
Note
R/W_Lock_UPD_ADD_ND
SSC Command to change Interface Mode2 register
SSC Description
Word
No.
Master transmitting
1
Command
0_1010_0_001000_0001
R/W_Lock_UPD_ADD_ND
2
Write Data
0_00010000000_1_0_01
ANG_Range: 080H; ANG_DIR:
1B;
PREDICT: 0B;
AUTOCAL: 01B
3
Safety Word
Application Note
TLE5012B transmitting
1_1_1_1_xxxx_xxxxxxxx
30
Note
Read Safety Word
V1.5, 2012-11-15
TLE5012B
Fuse Values
3
Fuse Values
The derivate specific reset values for the configuration registers, which are stored in laser fuses on the sensor are
shown in Figure 1.
Interface Mode2 Register
Interface Mode3 Register
ang_dir predict autocal spikef ssc_od pad_drv
ang_range
TLE5012B - E1000 (IIF)
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
TLE5012B - E3005 (HSM)
0
0
0
1
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
TLE5012B - E5000 (PWM)
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
TLE5012B - E5020 (PWM)
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
TLE5012B - E9000 (SPC)
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
TLE5012B - E9010 (SPC)
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
msblsb
lsb
Temp. Coeff. Reg.
msb
IFAB Register
msb lsb
Interface Mode4 Register
ifab_od ifab_hyst
sbist
fir_udr
TLE5012B - E1000 (IIF)
1
1
0
1
1
0
0
0
1
0
0
0
0
TLE5012B - E3005 (HSM)
1
1
0
1
1
0
1
0
0
0
0
1
0
TLE5012B - E5000 (PWM)
1
0
0
0
0
0
0
0
0
0
0
0
1
TLE5012B - E5020 (PWM)
1
1
1
0
0
0
0
0
0
1
1
0
1
TLE5012B - E9000 (SPC)
1
0
1
0
0
0
0
0
0
0
0
1
1
TLE5012B - E9010 (SPC)
1
0
1
1
0
0
0
0
0
0
1
1
1
msb
hsm_plp
lsb msb
ifab_res
lsb msb
if_mod
lsb msb lsb
Interface Mode1 Register
FIR_MD CLK_SEL DSPU_HOLD IIF_MOD
TLE5012B - E1000 (IIF)
0
1
0
0
0
1
TLE5012B - E3005 (HSM)
0
1
0
0
0
0
TLE5012B - E5000 (PWM)
1
0
0
0
0
0
TLE5012B - E5020 (PWM)
0
1
0
0
0
0
TLE5012B - E9000 (SPC)
1
0
0
0
0
0
1
0
0
0
0
TLE5012B - E9010 (SPC)
msb
Figure 1
0
lsb
Derivate-specific fuse settings
Application Note
31
V1.5, 2012-11-15
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG