INTERSIL RFP8P06LE

RFD8P06LE, RFD8P06LESM, RFP8P06LE
Data Sheet
July 1999
8A, 60V, 0.300 Ohm, ESD Rated, Logic
Level, P-Channel Power MOSFET
• 8A, 60V
Formerly developmental type TA49203.
• rDS(ON) = 0.300Ω
• 2kV ESD Protected
• Temperature Compensating PSPICE® Model
• PSPICE Thermal Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
Ordering Information
PACKAGE
4273.1
Features
These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
PART NUMBER
File Number
Symbol
BRAND
D
RFD8P06LE
TO-251AA
F8P6LE
RFD8P06LESM
TO-252AA
F8P6LE
RFP8P06LE
TO-220AB
FP8P06LE
G
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e.,
RFD8P06LESM9A.
S
Packaging
JEDEC TO-251AA
DRAIN (FLANGE)
JEDEC TO-252AA
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
GATE
SOURCE
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
7-11
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
RFD8P06LE, RFD8P06LESM, RFP8P06LE
Absolute Maximum Ratings
TC = 25oC Unless Otherwise Specified
RFD8P06LE, RFD8P06LESM,
RFP8P06LE
-60
-60
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS
Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current
TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
(0.063in (1.6mm) from case for 10s)
UNITS
V
V
-8
-6.3
See Figure 5
±10
48
0.32
See Figure 6
-55 to 175
300
A
A
V
W
W/oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications
TC = 25oC Unless Otherwise Specified
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
BVDSS
ID = 250µA, VGS = 0V (Figure 11)
-60
-
-
V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA (Figure 12)
-1
-
-2
V
-
-
-1
µA
-
-
-50
µA
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
On Resistance (Note 1)
SYMBOL
IDSS
IGSS
rDS(ON)
Turn-On Time
tON
Turn-On Delay Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
VDS =- 60V, VGS = 0V
TJ = 25oC
TJ = 150oC
VGS = ±10V
-
-
±10
µA
ID = 8A, VGS = -5V (Figure 9, 10)
-
-
0.300
Ω
ID = 8A, VGS = -4.5V (Figure 9, 10)
-
-
0.330
Ω
VDD = -30V, ID ≅ 8A, RGS = 9.1Ω, RL = 3.75Ω
(Figure 13)
-
-
90
ns
-
10
-
ns
tr
-
50
-
ns
td(OFF)
-
30
-
ns
tf
-
20
-
ns
td(ON)
Rise Time
TEST CONDITIONS
tOFF
Total Gate Charge
Qg(TOT)
VGS = 0 to -10V
Gate Charge at -5V
Qg(-5)
VGS = 0 to -5V
Threshold Gate Charge
Qg(TH)
VGS = 0 to -1V
VDD = -48V, ID ≅ 8A,
RL = 6Ω
Ig(REF) = -0.2mA
(Figure 14)
VDS =- 25V, VGS = 0V, f = 1MHz
(Figure 15)
-
-
75
ns
-
25
30
nC
-
15
18
nC
-
1.2
1.5
nC
-
675
-
pF
-
175
-
pF
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
-
50
-
pF
Thermal Resistance Junction to Case
RθJC
-
-
3.125
oC/W
Thermal Resistance Junction to Ambient
RθJA
-
-
100
oC/W
80
oC/W
TO-251AA, TO-252AA
TO-220AB
Source to Drain Diode Specifications TC = 25oC Unless Otherwise Specified
PARAMETER
Source to Drain Diode Voltage (Note 1)
Reverse Recovery Time
SYMBOL
VSD
trr
NOTE:
2. Pulse Test: Pulse width ≤300µs, Duty Cycle ≤2%.
7-12
TEST CONDITIONS
TJ = 25oC, ISD =- 8A, VGS = 0V
TJ = 25oC, ISD =- 8A, dISD/dt = 100A/µs
MIN
TYP
MAX
UNITS
-
-
-1.5
V
-
-
125
ns
RFD8P06LE, RFD8P06LESM, RFP8P06LE
Typical Performance Curves
Unless Otherwise Specified
POWER DISSIPATION MULTIPLIER
1.2
-10
ID, DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
0.2
25
125
50
75
100
TC , CASE TEMPERATURE (oC)
175
150
-6
-4
-2
0
25
0
0
-8
50
75
150
125
100
175
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2.0
ZθJC, NORMALIZED
THERMAL IMPEDANCE
1.0
0.5
0.2
0.1
PDM
0.1
0.05
0.02
0.01
t1
t2
SINGLE PULSE
0.01
10-5
10-4
NOTES:DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC+ TC
10-3
10-2
10-1
101
100
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
-102
TC = 25oC, TJ = MAX RATED
100µs
-10
1ms
10ms
100ms
DC
-1
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
-0.1
-1
VDS(MAX) = -60V
-10
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
7-13
IDM , PEAK CURRENT (A)
ID , DRAIN CURRENT (A)
-100
TC = 25oC
FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
VGS = -10V
VGS = -5V
-10
-5
-100
 175 – T C
I = I 25  ------------------------
150 

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10-5
10-4
10-3
10-2
10-1
t, PULSE WIDTH (ms)
100
FIGURE 5. PEAK CURRENT CAPABILITY
101
RFD8P06LE, RFD8P06LESM, RFP8P06LE
Typical Performance Curves
Unless Otherwise Specified
-30
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
-25 TC = 25oC
STARTING TJ = 25oC
ID, DRAIN CURRENT (A)
IAS , AVALANCHE CURRENT (A)
-30
-10
VGS = -10V
-20
If R = 0
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
-1
0.1
VGS = -4.5V
-10
VGS = -4V
-5
If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
0.01
VGS = -5V
-15
STARTING TJ = 150oC
1
VGS = -3V
0
10
0
-1.5
tAV, TIME IN AVALANCHE (ms)
-3.0
-6.0
-4.5
-7.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
FIGURE 7. SATURATION CHARACTERISTICS
600
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDD = -15V
-25
-55oC
25oC
-20
175oC
-15
-10
-5
rDS(ON), ON-STATE RESISTANCE (mΩ)
ID(ON), ON-STATE DRAIN CURRENT (A)
-30
0
0
-1.5
-3.0
-4.5
-6.0
VGS, GATE TO SOURCE VOLTAGE (V)
-7.5
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
NORMALIZED ON RESISTANCE
1.75
1.50
1.25
1.00
0.75
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
7-14
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
200
-2.0
2.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2.00 VGS = -5V, ID = -8A
0
300
-2.5
-3.0
-3.5
-4.0
-4.5
-5.0
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
2.25
-40
400
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
0.50
-80
ID = -8A
ID = -4A
ID = -2A
ID = -1A
500
200
ID = -250µA
1.15
1.1
1.05
1.0
0.95
0.9
-80
-40
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
RFD8P06LE, RFD8P06LESM, RFP8P06LE
Typical Performance Curves
125
VGS = VDS, ID = -250µA
SWITCHING TIME (ns)
NORMALIZED GATE
THRESHOLD VOLTAGE
1.4
Unless Otherwise Specified
1.2
1.0
0.8
VDD = -30V, ID = -8A, RL= 3.75Ω
tr
100
75
td(OFF)
50
tf
25
td(ON)
0
0.6
-80
-40
200
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
-3.75
RL = 7.5Ω
IG(REF) = -0.20mA
-30
-15
-2.50
0.75 BVDSS
0.75 BVDSS
0.50 BVDSS
0.50 BVDSS
0.25 BVDSS
0.25 BVDSS
-1.25
VGS = -5V
0
20
IG(REF)
IG(ACT)
t, TIME ( µs)
80
CISS
600
400
COSS
200
CRSS
0.00
IG(REF)
VGS = 0V, f = 0.1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
800
C, CAPACITANCE (pF)
VDD = BVDSS
-45
50
1000
VGS , GATE TO SOURCE VOLTAGE (V)
VDD =BVDSS
20
30
40
10
RGS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 13. SWITCHING TIME AS A FUNCTION OF GATE
RESISTANCE
-5.00
-60
VDS , DRAIN TO SOURCE VOLTAGE (V)
0
0
0
IG(ACT)
-10
-20
-30
-40
-50
VDS , DRAIN TO SOURCE VOLTAGE (V)
-60
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
FIGURE 15. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
VDS
tAV
L
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0
-
RG
VDD
+
0V
DUT
tP
IAS
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
7-15
IAS
VDS
tP
0.01Ω
-VGS
VDD
BVDSS
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
RFD8P06LE, RFD8P06LESM, RFP8P06LE
Test Circuits and Waveforms
(Continued)
tON
tOFF
td(OFF)
td(ON)
tf
tr
0
RL
10%
10%
+
VDS
0V
0
10%
DUT
RGS
90%
90%
50%
-VGS
VGS
FIGURE 18. SWITCHING TIME TEST CIRCUIT
VDS
90%
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
VDS
Qg(TH)
0
RL
50%
PULSE WIDTH
VGS= -1V
VGS= -5V
-VGS
VGS
-
Qg(-5)
VDD
+
VGS= -10V
VDD
DUT
Qg(TOT)
-IG(REF)
0
Ig(REF)
FIGURE 20. GATE CHARGE TEST CIRCUIT
7-16
FIGURE 21. GATE CHARGE WAVEFORMS
RFD8P06LE, RFD8P06LESM, RFP8P06LE
PSpice Electrical Model
.SUBCKT RFD8P06LE 2 1 3
REV 7/29/96
LDRAIN
ESG
-
10
CA 12 8 1.50e-9
CB 15 14 1.50e-9
CIN 6 8 6.30e-10
DRAIN
2
5
+
8
6
RLDRAIN
RSLC1
51
+
RSLC2
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DESD1 91 9 DESD1MOD
DESD2 91 7 DESD2MOD
DPLCAP 10 6 DPLCAPMOD
5
51
EBREAK
+
17
18
-
ESLC
-
50
DPLCAP
EBREAK 5 11 17 18 -67.9
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTHRES 21 6 19 8 1
EVTEMP 6 20 18 22 1
LGATE
EVTHRES
+ 19 8
EVTEMP
RGATE
GATE
1
9
-
20
21
MWEAK
11
MMED
DBREAK
MSTRO
DESD1
91
DESD2
LDRAIN 2 5 1e-10
LGATE 1 9 2.92e-9
LSOURCE 3 7 2.92e-9
16
6
18 +
22
RLGATE
IT 8 17 1
DBODY
RDRAIN
LSOURCE
CIN
8
SOURCE
3
7
RSOURCE
RLSOURCE
MSTRONG 16 6 8 8 MstrongMOD
MMED 16 6 8 8 MmedMOD
MWEAK 16 21 8 8 MweakMOD
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 95e-3
RGATE 9 20 2.89
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RSourceMOD 97e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A
12
S2A
13
8
14
13
S1B
17
18
RVTEMP
S2B
13
CA
RBREAK
15
CB
6
8
EGS
-
19
-
IT
14
+
+
VBAT
5
8
EDS
-
+
8
22
RVTHRES
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/26,7))}
.MODEL DBDMOD D (IS=2.5e-12 RS=4e-2 IKF=0.01 N=0.97 TIKF=0.012 TRS1=0.8e-4 TRS2=-5e-6 CJO=5.25e-10 VJ=0.75 M=0.41 TT=7.50e-8)
.MODEL DBKMOD D (IKF=5 N=0.75 RS=0.245 TRS1=1e-3 TRS2=1.6e-4)
.MODEL DESD1MOD D (BV=16.4 TBV1=-1.25e-3 TBV2=5.79e-7 RS=36 NBV=50 IBV=7e-6)
.MODEL DESD2MOD D (BV=16.2 TBV1=-8.3e-4 TBV2=8.9e-7 NBV=50 IBV=7e-6)
.MODEL DPLCAPMOD D (CJO=4.25e-10 IS=1e-30 N=10 VJ=0.499 M=0.561)
.MODEL MSTRONGMOD PMOS (VTO=-1.91 KP=11.55 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MMEDMOD PMOS (VTO=-1.51 KP=0.95 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MWEAKMOD PMOS (VTO=-1.18 KP=0.03 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.045e-3 TC2=-3.5e-7)
.MODEL RDSMOD RES (TC1=0.92e-2 TC2=1.55e-5)
.MODEL RSOURCEMOD RES (TC1=2e-3 TC2=0.5e-6)
.MODEL RSCLMOD RES (TC1=2e-3 TC2=0)
.MODEL RVTHRESMOD RES (TC1=-2.5e-3 TC2=0)
.MODEL RVTEMPMOD RES (TC1=-1.55e-3 TC2=7.5e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.25 VOFF=1.75)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.75 VOFF=5.25)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.5 VOFF=-0.5)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.5 VOFF=0.5)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature
Options; authored by William J. Hepp and C. Frank Wheatley.
7-17
RFD8P06LE, RFD8P06LESM, RFP8P06LE
PSpice Thermal Model
7
JUNCTION
REV 7/29/96
RFP8P06LE
CTHERM1 7 6 1.3e-4
CTHERM2 6 5 4.5e-4
CTHERM3 5 4 1e-3
CTHERM4 4 3 2e-3
CTHERM5 3 2 1.5e-2
CTHERM6 2 1 0.55
RTHERM1
CTHERM1
6
RTHERM1 7 6 3.0e-2
RTHERM2 6 5 5.0e-2
RTHERM3 5 4 0.1
RTHERM4 4 3 1.15
RTHERM5 3 2 1.20
RTHERM6 2 1 0.55
RTHERM2
CTHERM2
5
RTHERM3
RFD8P06LE, RFD8P06LESM
CTHERM1 7 6 1.3e-4
CTHERM2 6 5 4.5e-4
CTHERM3 5 4 1e-3
CTHERM4 4 3 2e-3
CTHERM5 3 2 1.5e-2
CTHERM6 2 1 0.12
CTHERM3
4
RTHERM4
RTHERM1 7 6 3.0e-2
RTHERM2 6 5 5.0e-2
RTHERM3 5 4 0.1
RTHERM4 4 3 1.15
RTHERM5 3 2 1.20
RTHERM6 2 1 0.55
CTHERM4
3
RTHERM5
CTHERM5
2
RTHERM6
CTHERM6
1
CASE
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7-18
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