HV748DB1 Demonstration Board User's Guide

Supertex inc.
HV748DB1
HV748 ±75V 1.25A
Ultrasound Pulser Demoboard
Introduction
Designing a Pulser with HV748
The HV748 can deliver up to ±1.25A source and sink current to
a capacitive transducer. It is designed for medical ultrasound
imaging and ultrasound material NDT applications. It can
also be used as a high voltage driver for other piezoelectric
or capacitive MEMS transducers, or for ATE systems and
pulse signal generators as a signal source.
The HV748 circuit uses the DC coupling method in all
level translators. There are no external coupling capacitors
needed. The VPP and VNN rail voltages can be changed
rather quickly, compared to a high voltage capacitor gate
coupled driving pulser. This direct coupling topology of the
gate drivers not only saves two high voltage capacitors per
channel, but also makes the PCB layout easier.
The HV748 is a monolithic 4-channel, high speed, high
voltage, ultrasound transmitter pulser. This integrated, high
performance circuit is in a single 7x7mm, 48-lead QFN
package.
The HV748’s circuitry consists of controller logic circuits, level
translators, gate driving buffers and a high current and high
voltage MOSFET output stage. The output stages of each
channel are designed to provide peak output currents over
±1.8A for pulsing, when MC0=1 and MC1=1, with up to ±75V
swings. When in mode 1, all the output stages drop the peak
current to ±410mA for low-voltage CW mode operation to
save power. Two floating 9.0VDC power supplies, referenced
to VPP and VNN, supply the P- and N-type power FET gate
drivers. This pulser waveform’s frequency upper limit is
20MHz depending on the load capacitance. One HV748
can also be used as four damping circuits to generate fast
return-to-zero waveforms by working with another HV748 as
four pulsing circuits. It also has built-in under-voltage and
over-temperature protection functions.
This demoboard data sheet describes how to use the
HV748DB1 to generate the basic high voltage pulse
waveform as an ultrasound transmitting pulser.
The input stage of the HV748 has high-speed level translators
that are able to operate with logic signals of 1.2 to 5.0V and
are optimized at 2.5 to 3.3V. In this demoboard, the control
logic signals are connected to a high-speed ribbon cable
connector. The control signal logic-high voltage should be
the same as the VCC voltage of the demoboard, and the
logic-low should be reference to GND.
The HV748DB1 output waveforms can be displayed by using
an oscilloscope probe directly connected to the test point
TX1~4 and GND. The soldering jumper can select whether
or not to connect the on-board equivalent-load, a 330pF,
200V capacitor, parallel with a 2.5kΩ, 1.0W resistor. Also, a
coaxial cable can be used to connect the user’s transducer
to easily drive and evaluate the HV748 transmitter pulser.
Application Circuit
VCC
+75V VPP-9V
+9V
+2.5V
VLL VDD
OTP
0 to +75V
VSUB VPF
VPP
EN
RGND
MC0
MC1
Logic
Control
Level
Translator
PIN1
NIN1
P-Driver
TXP1
HVOUT1
HV748
GREF
TXN1
Level
Translator
N-Driver
GND
RGND
1 of 4 Channels Shown
VSS
GND
VNF
VNN + 9V
Doc.# DSDB-HV748DB1
B070214
VNN
0 to -75V
Supertex inc.
www.supertex.com
HV748DB1
The PCB Layout Techniques
Testing the Integrated Pulser
The large thermal pad at the bottom of the HV748 package
is connected to the VSUB pins to ensure that it always has
the highest potential of the chip, in any condition. VSUB is
the connection of the IC’s substrate. PCB designers need to
pay attention to the connecting traces as the output TXP1~4,
TXN1~4 high-voltage and high-speed traces. In particular,
low capacitance to the ground plane and more trace spacing
need to be applied in this situation.
This HV748 pulser demoboard should be powered up with
multiple lab DC power supplies with current limiting functions.
The following power supply voltages and current limits have
been used in the testing: VPP = 0 to +75V 5.0mA, VNN = 0 to
-75V 5.0mA, VDD = +9.0V 10mA, (VPP - VPF) = +9.0V 10mA,
(VNF - VNN) = +9.0.0V 10mA. VCC = +2.5V 5.0mA for HV748
VLL does not include the user’s logic circuits. The power-up
or down sequences of the voltage supply ensure that the
HV748 chip substrate VSUB is always at the highest potential
of all the voltages supplied to the IC.
High-speed PCB trace design practices that are compatible
with about 50 to 100MHz operating speeds are used for the
demoboard PCB layout. The internal circuitry of the HV748
can operate at quite a high frequency, with the primary speed
limitation being load capacitance. Because of this high speed
and the high transient currents that result when driving
capacitive loads, the supply voltage bypass capacitors and
the driver to the FET’s gate-coupling capacitors should be
as close to the pins as possible. The VSS pin pads should
have low inductance feed-through connections that are
connected directly to a solid ground plane. The VDD, VPP, VPF,
VNF and VNN supplies can draw fast transient currents of up
to ±1.5A, so they should be provided with a low-impedance
bypass capacitor at the chip’s pins. A ceramic capacitor of
up to 0.22 to 1.0µF may be used. Minimize the trace length
to the ground plane, and insert a ferrite bead in the power
supply lead to the capacitor to prevent resonance in the
power supply lines. For applications that are sensitive to
jitter and noise and using multiple HV748 ICs, insert another
ferrite bead between VDD and decouple each chip supply
separately.
The (VPP - VPF) and (VNF - VNN) are the two floating power
supplies. They are only 9.0V, but floating with VPP and VNN.
The floating voltages can be trimmed within the range of
+7.5 to +10V to match the rising and falling time of the output
pulses for the best HD2. Do not exceed the maximum voltage
of +10V. The VPP and VNN are the positive and negative high
voltages. They can be varied from 0 to +/-75V maximum.
Note when the VPP = VNN = 0, the VPF and VNF in respect to the
ground voltage is -9.0V and +9.0V.
The on-board dummy load 330pF//2.5kΩ should be
connected to the high voltage pulser output through the
solder jumper when using an oscilloscope’s high impedance
probe to meet the typical loading conditions. To evaluate
different loading conditions, one may change the values of
RC within the current and power limit of the device.
In order to drive piezo transducers with a cable, one should
match the output load impendence properly to avoid cable
and transducer reflections. A 70 to 75Ω coaxial cable is
recommended. The coaxial cable end should be soldered
to the TX1~4 and GND directly with very short leads. If a
user’s load is being used, the on board dummy load should
be disconnected by cutting the small shorting copper trace
in between the zero ohm resistors R7, R8, R9 or R10 pads.
They are shorted by factory default.
Pay particular attention to minimizing trace lengths and
using sufficient trace width to reduce inductance. Surface
mount components are highly recommended. Since the
output impedance of HV748’s high voltage power stages are
very low, in some cases it may be desirable to add a small
value resistor in series with the output TXP1~4 and TXN1~4
to obtain better waveform integrity at the load terminals.
This will, of course, reduce the output voltage slew rate at
the terminals of a capacitive load. Be aware of the parasitic
coupling from the outputs to the input signal terminals of
HV748. This feedback may cause oscillations or spurious
waveform shapes on the edges of signal transitions. Since
the input operates with signals down to 1.2V, even small
coupling voltages may cause problems. Use of a solid
ground plane and good power and signal layout practices
will prevent this problem. Also ensure that the circulating
ground return current from a capacitive load cannot react
with common inductance to create noise voltages in the
input logic circuitry.
Doc.# DSDB-HV748DB1
B070214
All the on-board test points are designed to work with the
high impedance probe of the oscilloscope. Some probes may
have limited input voltage. When using the probe on these
high voltage test-points, make sure that VPP/VNN voltages
do not exceed the probe limit. Using the high impendence
oscilloscope probe for the on-board test points, it is important
to have short ground leads to the circuit board ground plane.
Precautions need to be applied to not overlap the logic-high
time periods of the control signals. Otherwise, permanent
damage to the device may occur when cross-conduction or
shoot-through current exceed the device’s maximum limits.
2
Supertex inc.
www.supertex.com
HV748DB1
Schematic
1
D1
BAV99
3
TX1
R7
0
2
5
6
TP18
7
8
TP17
TP19
TP20
9
10
R12
1
2
VNN
VDD
R13
10
VNN
R14
10
R15
10
VCC
VNN
VPP
VDD
VPP
43
TP22
C14
1µ
100V
VPF
VNF
R16
10
1
2
3
4
5
6
7
8
1
VCC
VPP
TXN4
47
VNN
VPP
VPP
VPP
VPP
VPP
VPF
VPF
TXP4
PIN4
NIN4
D10
B1100-13
2
D9
B1100-13
1
2
VPP
1
VSUB
D7
B1100-13
VSUB
D8B
BAT54DW-7
2
1
D5
B1100-13
VPF
D8A
BAT54DW-7
3
4
1
6
D6A
BAT54DW-7
4
3
D6B
BAT54DW-7
1
6
VNF
TXP3
TXN3
VNF
VCC
TXN2
PIN3
NIN3
C12 C13
0.22 0.22
VDD
18
19
20
41
42
17
44
16
25
36
45
VDD
VDD
PIN2
NIN2
GREF
HEADER 12X2
U1
HV748K6
PIN1
NIN1
J2 HEADER 8
C15
1µ
100V
VPP
R17
10
C10
330p
250V
32
VSUB
R4
10
TP8
R2
2.55K
1W
TP14
D3
BAV99
31
1
30
3
29
C11
330p
250V
27
1
2
+75V > VSUB > VPP
VCC = +3.3V
VDD = +9.0V
(VPP - VPF) = +9.0V
(VNF - VNN) = +9.0V
VPP = 0 to +75V
VNN = 0 to -75V
TP16
R3
2.55K
1W
TP21
D4
BAV99
3
R5
0
TX3
R9
0
2
28
RGND
RGND
TP13
TXP2
TX2
R8
0
2
34
33
R1
2.55K
1W
TP3
D2
BAV99
3
26
35
TP12
TP11
3
4
TXN1
VNN
VNN
VNN
VNN
VNN
VNN
TP15
TP7
40
39
38
23
22
21
TP6
EN
NIN1
PIN1
NIN2
PIN2
NIN3
PIN3
NIN4
PIN4
OTP
MC1
MC0
VNF
VNF
2
4
6
8
10
12
14
16
18
20
22
24
C1
330p
250V
1
TXP1
OTP
EN
MC1
MC0
37
24
1
3
5
7
9
11
13
15
17
19
21
23
13
46
14
15
TP10
VLL
VSS
VSS
TP9
J1
VCC
48
2
11
R11
1k
VPP
TP2
C6
C9
C7 C8
0.22 0.22 1µ
1µ
100V 100V
C5
1µ
100V
C4
0.22
C3
0.22
VSUB
VSUB
VSUB
VSUB
C2
0.22
VSUB VPF
TP25
1
TP5
VDD
TP4
12
VCC
TP1
TX4
TP23
R10
0
C16
330p
250V
TP24
R6
2.55K
1W
Board Layout
Doc.# DSDB-HV748DB1
B070214
3
Supertex inc.
www.supertex.com
HV748DB1
Board Voltage Supply Power-Up Sequence
1
VSUB
VCC
2
VDD
3
4
VPF and VNF
5
VPP / VNN
6
Logic Active
Must be the most positive potential. Can be connected to VPP if it is the most positive in system
+1.2 to 5.0V positive logic supply voltage
+9.0V positive drive supply voltage
Floating supply voltages, (VPP- VPF) = +9.0V and (VNF- VNN) = +9.0V
0 to +/-75V positive and negative high voltages
Any logic control active high signals
Connector and Test Pin Description
Logic Control Signal Input Connector
1
VCC
Logic-high reference voltage input, VLL, +1.2 to 5.0V, normally from control circuit.
2
EN
Pulser output enable logic signal input, active high.
3
GND
Logic signal ground, 0V.(2)
4
NIN1
Logic signal input for CH1 negative pulse output, active high.(1)
5
GND
Logic signal ground, 0V.
6
PIN1
Logic signal input for CH1 positive pulse output, active high.(1)
7
GND
Logic signal ground, 0V.
8
NIN2
Logic signal input for CH2 negative pulse output, active high.(1)
9
GND
Logic signal ground, 0V.
10
PIN2
Logic signal input for CH2 positive pulse output, active high.(1)
11
GND
Logic signal ground, 0V.
12
NIN3
Logic signal input for CH3 negative pulse output, active high.(1)
13
GND
Logic signal ground, 0V.
14
PIN3
Logic signal input for CH3 positive pulse output, active high.(1)
15
GND
Logic signal ground, 0V.
16
NIN4
Logic signal input for CH4 negative pulse output, active high.(1)
17
GND
Logic signal ground, 0V.
18
PIN4
Logic signal input for CH4 positive pulse output, active high.(1)
19
GND
Logic signal ground, 0V.
20
OTP
Over temperature protection open drain output, active low, 1k pull up to VCC.
21
GND
Logic signal ground, 0V.
22
MC1
Logic signal input of mode control MSB.
23
GND
Logic signal ground, 0V.
24
MC0
Logic signal input of mode control LSB.
Power Supply Connector
Logic-high reference voltage supply, +1.2 to 5.0V current limit 5.0mA (if for VLL only).
1
VCC
2
GND
3
VDD
+9.0V positive driver voltage supply with current limit to 10mA.
4
VNN
0 to -75V negative high voltage supply with current limit to 5.0mA
5
VNF
Floating voltage supply (VNF-VNN) = +9.0V with current limit to 10mA.(3)
6
VPF
Floating voltage supply (VPP-VPF) = +9.0V with current limit to 10mA.(3)
7
VPP
0 to +75V positive high voltage supply with current limit to 2.0mA
8
VSUB
Chip substrate bias voltage, must be (+75V>VSUB/VPP) with limit to 5.0mA
Low voltage power supply ground, 0V
Note:
(1). Overlap control signals logic-high periods of PIN and NIN may cause the device permanent damage.
(2). Due to the speed of logic control signal, every GND wire in the ribbon cable must connect to signal source ground.
(3). (VPP - VPF) and (VNF - VNN) floating voltage can be trimmed from +7.5V to +10V for tr/tf time matching. Do not exceed the maximum +10V.
Doc.# DSDB-HV748DB1
B070214
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Supertex inc.
www.supertex.com
HV748DB1
HV748DB1 Waveforms
Figure 1: NIN, PIN and OUTPUT at 5MHz, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 75V, Load =
330pF//2.49kΩ, MC0 = MC1 = 1
Figure 2: NIN, PIN and OUTPUT at 5MHz, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 75V,
Load=330pF//2.49kΩ, MC0 = MC1 = 1
Doc.# DSDB-HV748DB1
B070214
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Supertex inc.
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HV748DB1
HV748DB1 Waveforms (cont.)
Figure 3: NIN, PIN and OUTPUT at 2.5MHz, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 75V, Load
= 330pF//2.49kΩ, MC0 = MC1 = 1
Figure 4: NIN, PIN and OUTPUT at 2.5MHz, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 75V, Load
= 330pF//2.49kΩ, MC0 = MC1 = 1
Doc.# DSDB-HV748DB1
B070214
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Supertex inc.
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HV748DB1
HV748DB1 Waveforms (cont.)
Figure 5: tdr/tdf = 20/20.5ns, tr/tf = 31.5/31.8ns, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 75V, Load
= 330pF//2.49kΩ, MC0 = MC1 = 1
Figure 6: tdr/tdf = 20/20.6ns, tr/tf = 36.2/35.6ns , VDD = +7.5V, (VPP - VPF) = +7.5V, (VNF - VNN) = +7.5V (BLUE), VPP/VNN = +/75V, Load = 330pF//2.49kΩ, MC0 = MC1 = 1. (The BLK trace same as Fig 6)
Doc.# DSDB-HV748DB1
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Supertex inc.
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HV748DB1
HV748DB1 Waveforms (cont.)
Figure 7: NIN, PIN and OUTPUT at CW 2.5MHz, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 5.0V,
Load = 330pF//2.49kΩ, MC0 = MC1 =1
Figure 8: NIN, PIN and OUTPUT at CW 5MHz, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 5.0V, Load
= 330pF//2.49kΩ, MC0 = MC1 = 0
Doc.# DSDB-HV748DB1
B070214
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Supertex inc.
www.supertex.com
HV748DB1
HV748DB1 Waveforms (cont.)
Figure 9: NIN, PIN and OUTPUT at 5MHz, VDD = +9.0V, (VPP - VPF) = +9.0V, (VNF - VNN) = +9.0V, VPP/VNN = +/- 20V, Load =
330pF//2.49kΩ, MC0,MC1 = (1,1),(1,0),(0,1) and (0,0) different modes
Doc.# DSDB-HV748DB1
B070214
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Supertex inc.
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HV748DB1
Bill of Materials
Component
Description
Manufacturer
Part Number
C1, C10, C11, C16
CAP CERAMIC 330PF 200V X7R 0603
Panasonic
ECJ-1VB2D331K
C2, C3, C4, C6,
C7, C12, C13
CAP CER .22UF 16V X7R 10% 0603
TDK Corp
C1608X7R1C224K080AC
C5, C8, C9, C14,
C15
CAP CER 1UF 100V X7R 20% 1210
TDK Corp
C3225X7R2A105M200AA
D1, D2, D3, D4
DIODE DUAL SW 75V 350MW SOT-23
Diodes Inc
BAV99-7
D5, D7, D9, D10
DIODE SCHOTTKY 100V 1A SMA
Diodes Inc
B1100-13-F
D6, D8
DIODE SCHOTTKY DUAL 30V SOT-363
Diodes Inc
BAT54CDW-7-F
R1, R2, R3, R6
RES 2.55K OHM 1W 1% 2512 SMD
Panasonic
ERJ-1TNF2551U
R11
RES 1.00K OHM 1/16W 1% 0603 SMD
Panasonic
ERJ-3EKF1001V
R12
RES 1.00 OHM 1/10W 1% 0603 SMD
Yageo
RC0603FR-071RL
R4, R13, R14, R15,
R16, R17
RES 10.0 OHM 1/10W 1% 0603 SMD
Panasonic
ERJ-3EKF10R0V
TP3, TP5, TP14,
TP21, TP24
TEST POINT PC
Mill-max
3132-0-00-15-00-00-08-0
U1
Ultrasound Pulser
Supertex Inc.
HV748K6-G
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
Supertex inc.
©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Doc.# DSDB-HV748DB1
B070214
10
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com