IRF340 Data Sheet March 1999 10A, 400V, 0.550 Ohm, N-Channel Power MOSFET • 10A, 400V • Single Pulse Avalanche Energy Rated • SOA is Power-Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Ordering Information PACKAGE TO-204AE • rDS(ON) = 0.550Ω • Majority Carrier Device Formerly developmental type TA17424. IRF340 2307.3 Features This N-Channel enhancement mode silicon gate power field effect transistor is designed, tested and guaranteed to withstand a specific level of energy in the breakdown avalanche mode of operation. These MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. PART NUMBER File Number BRAND Symbol IRF340 NOTE: When ordering, use the entire part number. D G S Packaging JEDEC TO-204AE DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRF340 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain To Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain To Gate Voltage (RGS = 20kΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate To Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg IRF340 400 400 10 6.3 40 ±20 125 1.0 520 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain To Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) 400 - - V Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V Zero Gate Voltage Drain Current IDSS On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time rDS(ON) gfs Fall Time Total Gate Charge (Gate to Source + Gate to Drain) µA 250 µA VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = ±20V ID = 5.2A, VGS = 10V (Figures 8, 9) VDS ≥ 50V, ID = 5.2A (Figure 12) VDD = 200V, ID ≈ 10A, RG = 9.1Ω, RL = 19.5Ω (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature 10 - - A - - ±100 nA - 0.4 0.550 Ω 5.8 8 - S 17 21 ns 41 ns td(OFF) - 45 75 ns tf - 20 36 ns - 41 63 nC Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS LD Internal Source Inductance 25 - 27 Qg(TOT) Internal Drain Inductance - - - tr Turn-Off Delay Time - VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC - d(ON) Rise Time VDS = Rated BVDSS, VGS = 0V LS VGS = 10V, ID = 10A, VDS = 0.8 x Rated BVDSS Ig(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) Measured between the Contact Screw on Header that is Closer to Source and Gate Pins and Center of Die Measured from the Source Lead, 6mm (0.25in) from Header and Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances - 7 - nC - 23 - nC - 1250 - pF - 300 - pF - 80 - pF - 5.0 - nH - 12.5 - nH - - 1.0 oC/W - - 30 oC/W D LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA 2 Free Air Operation IRF340 Source To Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D MIN TYP MAX UNITS - - 10 A - - 40 A - - 2.0 V 170 350 790 ns 1.6 4.0 8.2 µC G S Drain to Source Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovery Charge QRR TJ = 25oC, ISD = 9.2A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/µs TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/µs NOTES: 2. Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%. 3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance Curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 9.2mH, RG = 25Ω, peak IAS = 10A (Figures 15, 16). Typical Performance Curves 10 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 0 50 100 150 TC , CASE TEMPERATURE (oC) 8 6 4 2 0 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE ZθJC, TRANSIENT THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 1 0.5 0.2 0.1 0.1 0.05 PDM 0.02 0.01 0.01 10-3 t1 SINGLE PULSE t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 10-5 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 1 10 IRF340 Typical Performance Curves (Continued) 15 102 ID , DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10µs 100µs 10 1ms OPERATION IN THIS AREA LIMITED BY rDS(ON) 1 10ms TC = 25oC DC TJ = 150oC SINGLE PULSE 0.1 12 VGS = 5.5V 9 VGS = 5V 6 VGS = 4.5V 3 VGS = 4V 0 102 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 1 103 0 40 VGS = 6V 12 VGS = 5.5V 9 VGS = 5V 6 VGS = 4.5V VGS = 4V 0 2 4 6 8 VDS , DRAIN TO SOURCE VOLTAGE (V) IDS(ON), DRAIN TO SOURCE CURRENT (A) ID, DRAIN CURRENT (A) VGS = 10V 3 100 200 10 TJ = 150oC 1 TJ = 25oC 0.1 10 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 FIGURE 7. TRANSFER CHARACTERISTICS 3.0 5 ID = 10A VGS = 10V NORMALIZED DRAIN TO SOURCE ON RESISTANCE 80µs PULSE TEST VGS = 10V 4 ON RESISTANCE 160 VDS ≥ 50V 80µs PULSE TEST FIGURE 6. SATURATION CHARACTERISTICS rDS(ON), DRAIN TO SOURCE 120 FIGURE 5. OUTPUT CHARACTERISTICS 15 80µs PULSE TEST 80 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 0 80µs PULSE TEST VGS = 6V VGS = 10V 3 2 VGS = 20V 1 0 0 10 20 30 40 ID , DRAIN CURRENT (A) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4 50 2.4 1.8 1.2 0.6 0 -60 -40 -20 80 100 120 140 160 0 20 40 60 TJ, JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRF340 Typical Performance Curves (Continued) 2500 1.25 1.15 1.05 0.95 0.85 0.75 -60 -40 CRSS 1 COSS 10 100 VDS , DRAIN TO SOURCE VOLTAGE (V) 1000 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE ISD, SOURCE TO DRAIN CURRENT (A) 100 VDS ≥ 50V 80µs PULSE TEST TJ = 25oC 9 TJ = 150oC 6 3 10 TJ = 150oC TJ = 25oC 1 0.1 0 4 8 12 ID , DRAIN CURRENT (A) 16 20 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 20 VGS, GATE TO SOURCE VOLTAGE (V) gfs, TRANSCONDUCTANCE (S) 1000 0 -20 0 20 40 60 80 100 120 140 160 TJ , JUNCTION TEMPERATURE (oC) 12 0 CISS 1500 500 FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGS 2000 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250µA ID = 10A 0 0.3 0.6 0.9 1.2 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE VDS = 320V VDS = 200V VDS = 80V 16 12 8 4 0 0 12 24 36 48 Qg(TOT), TOTAL GATE CHARGE (nC) 60 FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 1.5 IRF340 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS - VGS VDS IAS VDD VDD DUT tP 0V IAS 0 0.01Ω tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr VDS RL 90% 90% + RG - VDD 10% 10% 0 90% DUT VGS VGS 0 10% VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0.2µF 50% PULSE WIDTH FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 Ig(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 6 Ig(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRF340 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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