IRFF130 Data Sheet March 1999 8.0A, 100V, 0.180 Ohm, N-Channel Power MOSFET 1564.3 Features • 8.0A, 100V This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 0.180Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Formerly developmental type TA17411. Ordering Information PART NUMBER File Number Symbol PACKAGE BRAND D IRFF130 TO-205AF IRFF130 NOTE: When ordering, use the entire part number. G S Packaging JEDEC TO-205AF SOURCE DRAIN (CASE) GATE 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFF130 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation, TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFF130 100 100 8.0 32 ±20 25 0.2 69 -55 to 150 UNITS V V A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified Electrical Specifications MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER SYMBOL BVDSS ID = 250µA, VGS = 0V (Figure 10) 100 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V - - 25 µA - - 250 µA 8.0 - - A Zero Gate Voltage Drain Current IDSS TEST CONDITIONS VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time rDS(ON) ±100 nA 0.14 0.180 Ω 4.0 5.5 - S VDD ≅ 0.5 x Rated BVDSS, ID ≈ 8.0A, RG = 9.1Ω, VGS = 10V, RL = 6.1Ω For VDSS = 50V, RL = 4.9Ω For VDSS = 40 (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature - 30 50 ns - 80 150 ns - 50 100 ns - 80 150 ns VGS = 10V, ID = 8.0A, VDS = 0.8 x Rated BVDSS (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature - 18 30 nC - 9.0 - nC - 9.0 - nC VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 600 - pF Qg(TOT) Gate to Source Charge - - VDS > ID(ON) x rDS(ON)MAX, ID = 4.0A (Figure 12) tf Total Gate Charge (Gate to Source + Gate to Drain) - ID = 4.0A, VGS = 10V (Figures 8, 9) gfs td(OFF) Fall Time VGS = ±20V td(ON) tr Turn-Off Delay Time VDS > ID(ON) x rDS(ON)MAX, VGS = 10V Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS - 300 - pF Reverse Transfer Capacitance CRSS - 100 - pF - 5.0 - nH - 15 - nH - - 5.0 oC/W - - 175 oC/W Internal Drain Inductance LD Measured from the Drain Lead, 5.0mm (0.2in) from Header to Center of Die Internal Source Inductance LS Measured from the Source Lead, 5.0mm (0.2in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D LD G LS S Thermal Resistance, Junction to Case RθJC Thermal Resistance, Junction to Ambient RθJA 2 Free Air Operation IRFF130 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D MIN TYP MAX UNITS - - 8.0 A - - 32 A V G S Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 8.0A, VGS = 0V (Figure 13) - - 2.5 trr TJ = 150oC, ISD = 8.0A, dISD/dt = 100A/µs TJ = 150oC, ISD = 8.0A, dISD/dt = 100A/µs - 300 - ns - 1.5 - µC Reverse Recovery Time Reverse Recovery Charge QRR NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 1.62mH, RG = 25Ω, peak IAS = 8.0A (Figures 15, 16). Typical Performance Curves Unless Otherwise Specified 10 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 0 50 100 150 TC , CASE TEMPERATURE (oC) 8 6 4 2 0 25 50 75 100 150 125 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1.0 ZθJC, NORMALIZED THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 0.5 0.2 0.1 PDM 0.1 0.05 t1 0.02 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC 0.01 SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t1, RECTANGULAR PULSE DURATION (S) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 1 10 IRFF130 Typical Performance Curves Unless Otherwise Specified (Continued) 20 VGS = 10V VGS = 8V 10µs 100µs 10.0 1ms 10ms OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 1.0 100ms TJ = MAX RATED ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 50.0 80µs PULSE TEST 16 VGS = 7V 12 VGS = 6V 8 VGS = 5V 4 DC VGS = 4V 0.1 1.0 10 100 VDS , DRAIN TO SOURCE VOLTAGE (V) 0 200 0 10 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 40 50 20 VGS = 10V VGS = 9V VGS = 8V 8 ID(ON), ON-STATE DRAIN CURRENT (A) 80µs PULSE TEST ID, DRAIN CURRENT (A) 30 FIGURE 5. OUTPUT CHARACTERISTICS 10 VGS = 7V VGS = 6V 6 4 VGS = 5V 2 VGS = 4V VDS > ID(ON) x rDS(ON)MAX 80µs PULSE TEST 16 12 125oC 8 25oC 4 0 0 0.8 0.4 1.6 1.2 -55oC 0 2.0 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS 2.50 2µs PULSE TEST 0.5 0.4 VGS = 10V 0.3 0.2 VGS = 20V 0.1 0 0 10 FIGURE 7. TRANSFER CHARACTERISTICS NORMALIZED DRAIN TO SOURCE ON RESISTANCE 0.6 rDS(ON), DRAIN TO SOURCE ON RESISTANCE (Ω) 20 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 10V ID = 4A 2.00 1.50 1.00 0.50 0 10 30 20 40 50 ID, DRAIN CURRENT (A) NOTE: Heating effect of 2µs pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4 60 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRFF130 Typical Performance Curves (Continued) 2000 ID = 250µA 1.15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 1600 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 Unless Otherwise Specified 1.05 0.95 0.85 1200 800 CISS 400 COSS 0.75 -40 0 40 80 0 120 10 1 TJ , JUNCTION TEMPERATURE (oC) ISD, SOURCE TO DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 40 50 100 8 -55oC 6 25oC 4 125oC 2 10 150oC 1 0 5 30 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 80ms PULSE TEST 0 20 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 10 CRSS 10 15 20 25 0 0.5 ID , DRAIN CURRENT (A) 25oC 1.0 ID = 8A VGS, GATE TO SOURCE (V) 2.5 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VDS = 50V 15 VDS = 20V 10 VDS = 80V 5 0 8 16 24 32 40 Qg(TOT) , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 2.0 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 0 1.5 3.0 IRFF130 Test Circuits and Waveforms VDS BVDSS tP VDS L IAS VARY tP TO OBTAIN VDD + RG REQUIRED PEAK IAS - VDD DUT VGS 0V tP 0 IAS tAV 0.01Ω FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORM tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 0.2µF 50% PULSE WIDTH 10% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 6 IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFF130 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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