IRFF310 Data Sheet March 1999 1.35A, 400V, 3.600 Ohm, N-Channel Power MOSFET • 1.35A, 400V • rDS(ON) = 3.600Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Formerly developmental type TA17444. Ordering Information PACKAGE 1888.3 Features This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits. PART NUMBER File Number Symbol BRAND D IRFF310 TO-205AF IRFF310 NOTE: When ordering, include the entire part number. G S Packaging JEDEC TO-205AF SOURCE DRAIN (CASE) GATE 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFF310 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and StorageTemperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFF310 400 400 1.35 5.5 ±20 15 0.12 150 -55 to 150 UNITS V V A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 10) 400 - - V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V VDS = Rated BVDSS, VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA 1.35 - - A Zero-Gate Voltage Drain Current On-State Drain Current (Note 2) IDSS ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time rDS(ON) gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse-Transfer Capacitance CRSS VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = ±20V - - ±100 nA VGS = 10V, ID = 0.8A (Figures 8, 9) - 3.3 3.600 Ω 1.0 1.2 - S VDS, = 10V, ID = 1.2A (Figure 12) VDD ≈ 0.5 x Rated BVDSS, RG = 9.1Ω, ID ≈ 1.35A, RL = 144.5Ω for BVDSS = 400V, RL = 126Ω for BVDSS = 350V (Figures 17, 18), MOSFET Switching Times are Essentially Independent of Operating Temperature - 3 10 ns - 10 20 ns - 5 10 ns - 8 15 ns VGS = 10V, ID = 1.35A, VDS = 0.8 x Rated BVDSS , Ig(REF) = 1.5mA (Figures 14, 19, 20), Gate Charge is Essentially Independent of Operating Temperature - 6 7.5 nC - 3 - nC VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) Internal Drain Inductance LD Measured from the Drain Lead, 5mm (0.2in) from Header to Center of Die Internal Source Inductance LS Measured from the Source Lead, 5mm (0.2in) from Header and Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D - 3 - nC - 135 - pF - 35 - pF - 8 - pF - 5.0 - nH - 15 - nH - - 8.33 oC/W - - 175 oC/W LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA 2 Free Air Operation IRFF310 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier MIN TYP MAX UNITS - - 1.35 A - - 5.5 A D G S Source to Drain Diode Voltage (Note 2) TJ = 25oC, ISD = 1.35A, VGS = 0V (Figure 13) - - 1.6 V trr TJ = 150oC, ISD = 1.35A, dISD/dt = 100A/µs - 380 - ns QRR TJ = 150oC, ISD = 1.35A, dISD/dt = 100A/µs - 2.7 - µC VSD Reverse Recovery Time Reverse Recovered Charge NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 40V, start TJ = 25oC, L = 44.89µH, RG = 50Ω, peak IAS = 1.35A (See Figures 15, 16). Typical Performance Curves TC = 25oC, Unless Otherwise Specified 1.6 1.4 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 1.2 1.0 0.8 0.6 0.4 0.2 0 50 100 150 0 25 50 TC , CASE TEMPERATURE (oC) 75 100 150 125 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1.0 ZθJC , NORMALIZED THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 0.5 0.2 0.1 0.1 PDM 0.05 t1 0.02 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC SINGLE PULSE 0.01 10-5 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (LC) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 t2 1 10 IRFF310 Typical Performance Curves VGS = 9V 10 10ms 100ms 1 1ms 10µs TC = 25oC TJ = MAX RATED SINGLE PULSE 0.1 VGS = 6V 4 2 VGS = 5V 100µs DC 0 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) 1000 VGS = 4V 0 10 20 30 40 50 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. OUTPUT CHARACTERISTICS 5 ID(ON) , ON-STATE DRAIN CURRENT (A) 5 80µs PULSE TEST ID, DRAIN CURRENT (A) VGS = 7V 6 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA VGS = 10V VGS = 9V VGS = 8V 4 3 VGS = 7V VGS = 6V 2 1 VGS = 5V VGS = 4V 0 0 1 2 3 4 VDS , DRAIN TO SOURCE VOLTAGE (V) TJ = 175oC TJ = 25oC TJ = -55oC 4 VDS > ID(ON) x rDS(ON) MAX 3 80µs PULSE TEST 2 1 0 0 5 FIGURE 6. SATURATION CHARACTERISTICS 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 FIGURE 7. TRANSFER CHARACTERISTICS 4 2.2 VGS = 10V ID = 5.6A NORMALIZED DRAIN TO SOURCE ON RESISTANCE 2µs PULSE TEST rDS(ON), DRAIN TO SOURCE ON RESISTANCE 80µs PULSE TEST VGS = 10V VGS = 8V 8 0.05 1 (Continued) 10 OPERATION IN THIS AREA IS LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 50 TC = 25oC, Unless Otherwise Specified 3 VGS = 10V 2 VGS = 20V 1 1.8 1.4 1.0 0.6 0.2 0 0 2 4 6 ID, DRAIN CURRENT (A) 8 10 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) NOTE: Heating effect of 2µs pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4 FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 160 IRFF310 Typical Performance Curves TC = 25oC, Unless Otherwise Specified 400 ID = 250µA VGS = 0V, f = 1MHz CISS = CGS + CGD 1.05 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.15 (Continued) 0.95 0.85 CRSS = CGD 300 COSS ≈ CDS + CGS 200 CISS 100 COSS CRSS 0.75 -40 0 40 80 160 120 10 0 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 30 40 50 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 10 80µs PULSE TEST ISD , SOURCE TO DRAIN CURRENT (A) 2.4 TJ = -55oC 2.0 TJ = 25oC 1.6 TJ = 125oC 1.2 0.8 0.4 TJ = 175oC 1 TJ = 25oC 0.1 0 0 2 4 6 ID , DRAIN CURRENT (A) 8 0 10 1 2 ID = 4A VDS = 160V VDS = 100V VDS = 40V 15 10 5 0 2 4 6 8 10 Qg(TOT) , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 4 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 0 3 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT VGS , GATE TO SOURCE VOLTAGE (V) gfs , TRANSCONDUCTANCE (S) 20 VDS , DRAIN TO SOURCE VOLTAGE (V) 5 IRFF310 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS - VGS VDS IAS VDD VDD DUT tP 0V IAS 0 0.01Ω tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr VDS RL 90% 90% + RG - VDD 10% 10% 0 90% DUT VGS VGS 0 10% VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0.2µF 50% PULSE WIDTH FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 Ig(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 6 Ig(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFF310 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. 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