INTERSIL HI1386Y

HI1386Y
S E M I C O N D U C T O R
8-Bit, 75 MSPS Flash A/D Converter
April 1995
Features
•
•
•
•
•
•
•
•
•
•
•
Description
Differential Linearity Error . . . . . . . . ±0.5 LSB or Less
Integral Linearity Error . . . . . . . . . . . ±0.5 LSB or Less
Built-In Integral Linearity Compensation Circuit
High-Speed Operation with Maximum Conversion
Rate of 75 MSPS (Min)
Low Input Capacitance . . . . . . . . . . . . . . . . 17pF (Typ)
Wide Analog Input Bandwidth . . . . . . . . . . . . . 150MHz
(Min. for Full Scale Input)
Single Power Supply . . . . . . . . . . . . . . . . . . . . . . . -5.2V
Low Power Consumption . . . . . . . . . . . . . 580mW (Typ)
Low Error Rate
Operable at 50% Clock Duty Cycle
Capable of Driving 50Ω Loads
This is a specification that outlines the mechanical and
electrical characteristics for the HI1386Y, 8-bit Flash A/D
converter IC, in chip (die) form.
Ordering Information
PART
NUMBER
HI1386Y
TEMPERATURE
+25oC
PACKAGE
Die
• All performance parameters are for packaged
devices when supplied by Harris.
Applications
• Video Digitizing
• Communication Systems
• HDTV (High Definition TV)
• Radar Systems
• Direct RF Down-Conversion • Digital Oscilloscopes
Die Metallization Layer
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
© Harris Corporation 1995
1
File Number
3959
HI1386Y
Functional Block Diagram
MINV
R1
62
COMPARATOR
VRT
R/2
R
1
R
D7 (MSB)
26
D6
25
D5
24
D4
21
D3
16
D2
15
D1
13
D0 (LSB)
12
2
R
63
R
51, 52
64
VIN
R
65
OUTPUT
R
126
R
127
R2
54
VRM
ENCODE
LOGIC
R
128
R
129
R
191
R
51, 52
192
VIN
R
193
R
254
R
255
46
VRB
39
CLK
38
CLK
R3
R/2
CLOCK
DRIVER
LINV
2
Specifications HI1386Y
Absolute Maximum Ratings TA = +25oC
Supply Voltage (AVEE, DVEE) . . . . . . . . . . . . . . . . . . . . -7V to +0.5V
Analog Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V
Reference Input Voltage
VRT, VRB, VRM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.7V to +0.5V
|VRT -VRB |. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5V
Digital Input Voltage
CLK, CLK, MINV, LINV . . . . . . . . . . . . . . . . . . . . . . . -4V to +0.5V
|CLK-CLK | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V
VRM Pin Input Current (IVRM) . . . . . . . . . . . . . . . . . . .-3mA to +3mA
Digital Output Current (ID0 to ID7) . . . . . . . . . . . . . . .-30mA to 0mA
Storage Temperature Range (TSTG) . . . . . . . . . . . . -65oC to +150oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Supply Voltage
AVEE, DVEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5.5V to -4.95V
AVEE - DVEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to 0.05V
AGND - DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.05V to 0.05V
Reference Input Voltage
VRT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.1V to 0.1V
VRB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.2V to -1.8V
Electrical Specifications
Analog Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . VRB to VRT
Pulse Width of Clock
TPW1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.6ns Min.
TPW0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.6ns Min.
TA = +25oC, AVEE = DVEE = -5.2V, VRT = 0V, VRB = -2V
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
Differential Linearity Error (DNL)
(00000000 to 11111111)
-0.5
0.5
LSB
Integral Linearity Error (INL)
(00000000 to 11111111)
-0.5
0.5
LSB
8
-
Bits
Resolution
Input Bias Current, LIN
VIN = -1.0V
0
160
µA
Analog Input Resistance, RIN
VIN = -1.0V
100
1000
kΩ
Resister-String Current, IREF
-22
-16
mA
Reference Voltage, VRM
-1.1
-0.9
V
Digital Input Current HI,
Hi = -0.8V
0
40
µA
Digital Input Current LO,
Lo = -1.6V
-30
30
µA
CLK Open Voltage, VOPN
CLK = Open
-1.4
-1.2
V
Leakage (1) D0 to D7, VLEAK
I = -10µA
-0.8
-0.4
V
Leakage (2) D0 to D7,
VIN, LINV, MINV, CLK, CLK, ILEAK
V = 0.3V
-1.0
1.0
µA
Digital Output Voltage HI, VOH
220Ω to -5.2V
-1.095
-0.6
V
Digital Output Voltage LO, VOL
220Ω to -5.2V
-2
-1.64
V
-140
-70
mA
Supply Current, IEE
3
HI1386Y
Timing Diagram
TDS
ANALOG IN
N+1
N
N+2
TPW1
TPW0
CLK
CLK
DIGITAL OUT
N-1
20%
80%
N
80%
TR
TOD
N+1
20%
TF
FIGURE 1.
Pad Descriptions
SYMBOL
I/O
STANDARD
VOLTAGE
LEVEL
50, 53,
55, 58
AGND
-
0V
Analog GND. Used as GND for
input buffers and latches of comparators.
Isolated
from
DGND,
DGND1, and DGND2.
47, 48,
60, 61
AVEE
-
-5.2V
Analog VEE -5.2V (Typ.). Internally
connected to DVEE (Resistance: 4Ω
to 6Ω). Bypass with 0.1µF to AGND.
39
CLK
I
ECL
PAD
NUMBER
EQUIVALENT CIRCUIT
DESCRIPTION
CLK Input
DGND, DGND1
38
CLK
R
R
R
CLK
R
Input complementary to CLK. When
open pulled down to -1.3V. Device is
operable without CLK input, but use
of complementary inputs of CLK
and CLK is recommended to obtain
stable high speed operation.
CLK
DVEE
9, 29
DGND1
-
R
0V
R
Digital GND (used for internal
circuits and output transistors).
4
HI1386Y
Pad Descriptions (Continued)
PAD
NUMBER
SYMBOL
I/O
STANDARD
VOLTAGE
LEVEL
10, 28
DGND2
-
0V
8, 30
DVEE
-
-5.2V
12
D0
O
ECL
EQUIVALENT CIRCUIT
DESCRIPTION
Digital GND
buffers).
D1
15
D2
16
D3
21
D4
24
D5
25
D6
26
D7
1
LINV
MINV
VIN
LSB of data outputs. External
pulldown resistor is required.
D1
DVEE
I
MSB of data outputs. External pulldown resistor is required.
ECL
Input pin for D0 (LSB) to D6 output
polarity inversion (see A/D Output
Code Table). Pulled low when left
open.
I
ECL
Input pin for D7 (MSB) output
polarity inversion (see A/D Output
Code Table). Pulled low when left
open.
R
R
51, 52
output
Data outputs. External pull-down
resistors are required.
DGND, DGND1
35
for
Digital VEE. Internally connected to
AVEE (resistance: 4Ω to 6Ω).
Bypass with 0.1µF to DGND
DGND
13
(used
I
LINV
OR
MINV
R
DVEE
R
-1.3V
VRT to VRB
AGND
VIN
VIN
AVEE
5
Analog input pins. These two pins
must be connected externally, since
they are not internally connected.
See Application Note for precautions.
HI1386Y
Pad Descriptions (Continued)
PAD
NUMBER
SYMBOL
I/O
STANDARD
VOLTAGE
LEVEL
46
VRB
I
-2V
VRM
I
EQUIVALENT CIRCUIT
VRT
DESCRIPTION
Reference
voltage
(bottom).
Typically -2V. Bypass with a 0.1µF
and 10µF to AGND.
R1
R/2
54
VRB/2
COMPARATOR 1
Reference voltage mid point. Can
be used as a pin for integral linearity
compensation.
COMPARATOR 2
Reference voltage (top) typically 0V.
R
R
62
VRT
I
0V
R
VRM
COMPARATOR 127
R2
R
COMPARATOR 128
R
COMPARATOR 129
R
COMPARATOR 130
R
COMPARATOR 255
VRB
R/2
R3
A/D OUTPUT CODE TABLE
MINV 1
LINV 1
VIN (Note 1)
STEP
0V
-1V
D7
0
1
D0
D7
1
0
D0
D7
0
0
D0
D7
D0
000 • • • • • 00
100 • • • • • 00
011 • • • • • 11
111 • • • • • 11
0
000 • • • • • 00
100 • • • • • 00
011 • • • • • 11
111 • • • • • 11
1
000 • • • • • 01
100 • • • • • 01
011 • • • • • 10
111 • • • • • 10
•
•
•
•
•
•
•
•
•
•
•
•
127
011 • • • • • 11
111 • • • • • 11
000 • • • • • 00
100 • • • • • 00
128
100 • • • • • 00
000 • • • • • 00
111 • • • • • 11
011 • • • • • 11
•
•
•
•
•
•
•
•
•
•
•
•
254
111 • • • • • 10
011 • • • • • 10
100 • • • • • 01
000 • • • • • 01
255
111 • • • • • 11
011 • • • • • 11
100 • • • • • 00
000 • • • • • 00
111 • • • • • 11
011 • • • • • 11
100 • • • • • 00
000 • • • • • 00
-2V
NOTE:
1. VRT = 0V, VRB = -2V
6
HI1386Y
Pad Coordinates
PAD COORDINATE 1
PAD
NO.
PAD
NAME
X [µm]
Y [µm]
PAD
NO.
1
LINV
2198.40
4490.40
23
2
2008.00
4490.40
24
3
1817.60
4490.40
4
1627.20
5
PAD
NAME
X [µm]
Y [µm]
PAD
NO.
209.60
1730.40
45
D5
209.60
1540.00
46
25
D6
209.60
1349.60
4490.40
26
D7
209.60
1436.80
4490.40
27
6
1246.40
4490.40
28
7
1056.00
4490.40
PAD
NAME
X [µm]
Y [µm]
3545.60
215.20
VRB
3736.00
215.20
47
AVEE
3926.40
215.20
1159.20
48
AVEE
4075.20
215.20
209.60
588.00
49
4377.60
215.20
DGND
209.60
362.40
50
AGND
4377.60
1292.00
29
DGND
484.80
215.20
51
VIN
4377.60
1570.40
DVEE
675.20
215.20
52
VIN
4377.60
1720.80
8
DVEE
865.60
4490.40
30
9
DGND
675.20
4490.40
31
865.60
215.20
53
AGND
4377.60
1999.20
10
DGND
388.80
4490.40
32
1056.00
215.20
54
VRM
4377.60
2352.80
209.60
4311.20
33
1246.40
215.20
55
AGND
4377.60
2698.40
1436.80
215.20
56
VIN
4377.60
2984.80
1627.20
215.20
57
VIN
4377.60
3135.20
AGND
4377.60
3413.60
4377.60
4490.40
11
12
D0
209.60
3730.40
34
13
D1
209.60
3540.00
35
209.60
3349.60
36
1817.60
215.20
58
2008.00
215.20
59
14
MINV
15
D2
209.60
3159.20
37
16
D3
209.60
2968.80
38
CLK
2198.40
215.20
60
AVEE
4075.20
4490.40
17
209.60
2778.40
39
CLK
2388.80
215.20
61
AVEE
3926.40
4490.40
18
209.60
2629.60
40
2579.20
215.20
62
VRT
3736.00
4490.40
19
209.60
2458.40
41
2728.00
215.20
63
3545.60
4490.40
20
209.60
2301.60
42
2974.40
215.20
64
3164.80
4490.40
209.60
2111.20
43
3164.80
215.20
65
2728.00
4490.40
209.60
1920.80
44
3355.20
215.20
66
2579.20
4490.40
21
22
D4
7
HI1386Y
Pad Coordinates (Continued)
PAD COORDINATE 2
PAD
NO.
PAD
NAME
X [µm]
Y [µm]
PAD
NO.
1
LINV
2158.40
4450.40
23
2
1968.00
4450.40
24
3
1777.60
4450.40
4
1587.20
5
PAD
NAME
X [µm]
Y [µm]
PAD
NO.
169.60
1690.40
45
D5
169.60
1500.00
46
25
D6
169.60
1309.60
4450.40
26
D7
169.60
1396.80
4450.40
27
6
1206.40
4450.40
28
7
1016.00
4450.40
PAD
NAME
X [µm]
Y [µm]
3505.60
175.20
VRB
3696.00
175.20
47
AVEE
3886.40
175.20
1119.20
48
AVEE
4035.20
175.20
169.60
548.00
49
4337.60
175.20
DGND
169.60
322.40
50
AGND
4337.60
1252.00
29
DGND
444.80
175.20
51
VIN
4337.60
1530.40
DVEE
635.20
175.20
52
VIN
4337.60
1680.80
8
DVEE
825.60
4450.40
30
9
DGND
635.20
4450.40
31
825.60
175.20
53
AGND
4337.60
1959.20
10
DGND
348.80
4450.40
32
1016.00
175.20
54
VRM
4337.60
2312.80
169.60
5271.20
33
1206.40
175.20
55
AGND
4337.60
2658.40
1396.80
175.20
56
VIN
4337.60
2944.80
1587.20
175.20
57
VIN
4337.60
3095.20
AGND
4337.60
3373.60
4337.60
4450.40
11
12
D0
169.60
3690.40
34
13
D1
169.60
3500.00
35
169.60
3309.60
36
1777.60
175.20
58
1968.00
175.20
59
14
MINV
15
D2
169.60
3119.20
37
16
D3
169.60
2928.80
38
CLK
2158.40
175.20
60
AVEE
4035.20
4450.40
17
169.60
2738.40
39
CLK
2348.80
175.20
61
AVEE
3886.40
4450.40
18
169.60
2589.60
40
2539.20
175.20
62
VRT
3696.00
4450.40
19
169.60
2418.40
41
2688.00
175.20
63
3505.60
4450.40
20
169.60
2261.60
42
2934.40
175.20
64
3124.80
4450.40
169.60
2071.20
43
3124.80
175.20
65
2688.00
4450.40
169.60
1880.80
44
3315.20
175.20
66
2539.20
4450.40
21
22
D4
Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
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8
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