Package Outline Drawing (POD)

Plastic Packages for Integrated Circuits
Package Outline Drawing
W6x7.42
42 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP 0.40mm PITCH)
Rev 0, 2/15
X
Y
0.400
2.80 ±0.030
G
42x 0.265 ±0.035
F
E
3.20 ±0.030
D
C
B
0.400
A
1
0.10
(4X)
PIN 1 (A1 CORNER)
2
4
5
6
0.200
TOP VIEW
0.400
BOTTOM VIEW
Z
PACKAGE
OUTLINE
0.240
3
0.05
Z
SEATING PLANE
3
0.290
2
0.400
6 NSMD
0.200 ±0.030
0.500 ±0.050
TYPICAL RECOMMENDED LAND PATTERN
SIDE VIEW
NOTES:
1.
2.
3.
4.
5.
6.
Dimensions and tolerance per ASME Y 14.5M - 1994.
Dimension is measured at the maximum bump diameter parallel to primary datum Z .
Primary datum Z and seating plane are defined by the spherical crowns of the bump.
Bump position designation per JESD 95-1, SPP-010.
All dimensions are in millimeters.
NSMD refers to non-solder mask defined pad design per Intersil Techbrief TB451.
1
0.265 ±0.035
0.10
ZXY
0.05
Z
4