I2P AK PSMN4R3-100ES N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK Rev. 1 — 31 October 2011 Product data sheet 1. Product profile 1.1 General description Standard level N-channel MOSFET in a I2PAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High efficiency due to low switching and conduction losses Suitable for standard level gate drive sources 1.3 Applications DC-to-DC converters Motor control Load switching Server power supplies 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 100 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 - - 120 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 338 W Tj junction temperature -55 - 175 °C - 6.6 7.8 mΩ - 3.7 4.3 mΩ [1] Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 100 °C; see Figure 12; see Figure 13 VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 13 [2] Dynamic characteristics QGD gate-drain charge QG(tot) total gate charge VGS = 10 V; ID = 75 A; VDS = 50 V; see Figure 14; see Figure 15 - 49 - nC - 170 - nC - - 537 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy [1] Continuous current limited by package [2] Measured 3 mm from package. VGS = 10 V; Tj(init) = 25 °C; ID = 120 A; Vsup ≤ 100 V; RGS = 50 Ω; Unclamped PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain Simplified outline Graphic symbol mb 3 S source mb D mounting base; connected to drain D G mbb076 S 1 2 3 SOT226 (I2PAK) 3. Ordering information Table 3. Ordering information Type number Package PSMN4R3-100ES Name Description Version I2PAK plastic single-ended package (I2PAK); TO-262 SOT226 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 100 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ - 100 V VGS gate-source voltage -20 20 V ID drain current - 119 A VGS = 10 V; Tj = 100 °C; see Figure 1 VGS = 10 V; Tmb = 25 °C; see Figure 1 [1] - 120 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 3 - 673 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 338 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C Source-drain diode [1] IS source current Tmb = 25 °C - 120 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 673 A VGS = 10 V; Tj(init) = 25 °C; ID = 120 A; Vsup ≤ 100 V; RGS = 50 Ω; Unclamped - 537 mJ Avalanche ruggedness EDS(AL)S [1] non-repetitive drain-source avalanche energy Continuous current limited by package PSMN4R3-100ES Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 2 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 003aag825 200 03aa16 120 ID (A) Pder (%) 160 80 120 (1) 80 40 40 0 0 0 Fig 1. 50 100 150 Tmb (°C) 200 0 50 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aag822 103 ID (A) Limit RDSon = VDS / ID tp =10 μ s 102 100 μ s 10 DC 1 ms 1 10 ms 100 ms 10-1 10-1 Fig 3. 1 10 102 VDS (V) 103 Safe operating area; continuous and peak drain currents as a function of drain-source voltage PSMN4R3-100ES Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 3 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 - 0.22 0.44 K/W Rth(j-a) thermal resistance from junction to ambient Vertical in free air - 60 - K/W 003aaf733 1 Zth(j-mb) (K/W) d = 0.5 10-1 0.2 0.1 0.05 10-2 = P tp T 0.02 single shot t tp T 10-3 10-6 Fig 4. 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN4R3-100ES Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 4 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit ID = 250 µA; VGS = 0 V; Tj = 25 °C 100 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C Static characteristics V(BR)DSS drain-source breakdown voltage 90 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10 - - 4.6 V ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 10 1 - - V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 11; see Figure 10 2 3 4 V µA IDSS drain leakage current VDS = 100 V; VGS = 0 V; Tj = 25 °C - 0.08 10 VDS = 100 V; VGS = 0 V; Tj = 175 °C - - 500 µA IGSS gate leakage current VGS = -20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 12; see Figure 13 - 10.4 12 mΩ VGS = 10 V; ID = 25 A; Tj = 100 °C; see Figure 12; see Figure 13 - 6.6 7.8 mΩ - 3.7 4.3 mΩ f = 1 MHz - 0.9 - Ω ID = 75 A; VDS = 50 V; VGS = 10 V; see Figure 14; see Figure 15 - 170 - nC ID = 0 A; VDS = 0 V; VGS = 10 V - 140 - nC ID = 75 A; VDS = 50 V; VGS = 10 V; see Figure 14; see Figure 15 - 48 - nC - 31 - nC RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 13 RG gate resistance [1] Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gate-source charge QGS(th-pl) post-threshold gate-source charge - 17.3 - nC QGD gate-drain charge - 49 - nC VGS(pl) gate-source plateau voltage VDS = 50 V; see Figure 14; see Figure 15 - 5.1 - V Ciss input capacitance - 9900 - pF Coss output capacitance VDS = 50 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 16 - 660 - pF Crss reverse transfer capacitance - 381 - pF td(on) turn-on delay time - 45 - ns tr rise time - 91 - ns td(off) turn-off delay time - 122 - ns tf fall time - 63 - ns PSMN4R3-100ES Product data sheet VDS = 50 V; RL = 0.67 Ω; VGS = 10 V; RG(ext) = 4.7 Ω; ID = 75 A; Tj = 25 °C All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 5 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit - 0.8 1.2 V - 75 - ns - 235 - nC Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 17 trr reverse recovery time Qr recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 50 V [1] Measured 3 mm from package. 003aaf723 250 003aaf724 100 ID (A) gfs (S) 200 80 150 60 100 40 50 20 0 Tj = 25 °C 0 0 Fig 5. Tj = 175 °C 30 60 90 ID (A) 120 Forward transconductance as a function of drain current; typical values 0 Fig 6. 003aag794 20 2 4 Transfer characteristics: drain current as a function of gate-source voltage; typical values 003aag793 80 10.0 6.0 5.5 RDSon (mΩ) 6 VGS (V) ID (A) 15 60 10 40 5 20 VGS (V) = 4.5 0 0 0 Fig 7. 4 8 12 16 20 VGS (V) Drain-source on-state resistance as a function of gate-source voltage; typical values PSMN4R3-100ES Product data sheet 0 Fig 8. 0.2 0.4 0.6 0.8 VDS (V) 1 Output characteristics; drain current as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 6 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 003aaf727 105 003aad280 5 VGS(th) (V) C (pF) 4 max Ciss 104 Crss 3 typ 2 min 103 1 102 10-1 Fig 9. 1 10 VGS (V) 102 Input and reverse transfer capacitances as a function of gate-source voltage, typical values 0 −60 0 60 120 Fig 10. Gate-source threshold voltage as a function of junction temperature 03aa35 10−1 ID (A) 180 Tj (°C) 003aaf728 2.8 a min 10−2 typ max 2.4 2 10−3 1.6 10−4 1.2 0.8 10−5 0.4 10−6 0 2 4 6 0 -60 VGS (V) Fig 11. Sub-threshold drain current as a function of gate-source voltage PSMN4R3-100ES Product data sheet 0 60 120 Tj (°C) 180 Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 7 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 003aag795 7 VDS VGS (V) = RDSon (mΩ) ID 6 VGS(pl) VGS(th) 5 5.5 VGS 6.0 QGS1 8.0 10.0 4 QGS2 QGS QGD QG(tot) 003aaa508 3 0 20 40 60 ID (A) 80 Fig 13. Drain-source on-state resistance as a function of drain current; typical values 003aaf729 10 VGS (V) Fig 14. Gate charge waveform definitions 003aaf730 105 C (pF) 80V 8 Ciss 104 50V VDS = 20V 6 Coss 103 4 Crss 102 2 0 0 50 100 150 Q (nC) 200 G Fig 15. Gate-source voltage as a function of gate charge; typical values PSMN4R3-100ES Product data sheet 10 10-1 1 10 VDS (V) 102 Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 8 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 003aaf731 100 IS (A) 80 60 40 20 Tj = 175 °C Tj = 25 °C 0 0 0.3 0.6 0.9 VSD (V) 1.2 Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN4R3-100ES Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 9 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 7. Package outline Plastic single-ended package (I2PAK); low-profile 3-lead TO-262 SOT226 A A1 E D1 mounting base D L1 Q b1 L 1 2 3 c b e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D max D1 E e L L1 Q mm 4.5 4.1 1.40 1.27 0.85 0.60 1.3 1.0 0.7 0.4 11 1.6 1.2 10.3 9.7 2.54 15.0 13.5 3.30 2.79 2.6 2.2 OUTLINE VERSION SOT226 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 06-02-14 09-08-25 TO-262 Fig 18. Package outline SOT226 (I2PAK) PSMN4R3-100ES Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 10 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN4R3-100ES v.1 20111031 Product data sheet - - PSMN4R3-100ES Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 11 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 9. Legal information 9.1 Data sheet status Document status [1] [2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. 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In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. PSMN4R3-100ES Product data sheet Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 12 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PSMN4R3-100ES Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 October 2011 © NXP B.V. 2011. All rights reserved. 13 of 14 PSMN4R3-100ES NXP Semiconductors N-channel 100 V 4.3 mΩ standard level MOSFET in I2PAK 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 31 October 2011 Document identifier: PSMN4R3-100ES