PSMN2R0-30YLE N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 12 October 2012 Product data sheet 1. Product profile 1.1 General description Logic level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits • Enhanced forward biased safe operating area for superior linear mode operation • Very low Rdson for low conduction losses 1.3 Applications • Electronic fuse • Hot swap • Load switch • Soft start 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 30 V ID drain current Tmb = 25 °C; VGS = 10 V; Fig. 1 - - 100 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - - 272 W VGS = 10 V; ID = 25 A; Tj = 25 °C; - 1.7 2 mΩ - 3 3.5 mΩ - 13.8 - nC - 87 - nC [1] Static characteristics RDSon drain-source on-state resistance Fig. 12 VGS = 4.5 V; ID = 25 A; Tj = 25 °C; Fig. 12 Dynamic characteristics QGD gate-drain charge VGS = 4.5 V; ID = 25 A; VDS = 15 V; Fig. 14; Fig. 15 QG(tot) total gate charge VGS = 10 V; ID = 25 A; VDS = 15 V; Fig. 14; Fig. 15 Scan or click this QR code to view the latest information for this product PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK Symbol Parameter Conditions Min Typ Max Unit VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; - - 370 mJ Avalanche ruggedness EDS(AL)S non-repetitive drainsource avalanche energy [1] Vsup ≤ 30 V; unclamped; RGS = 50 Ω; Fig. 3 Capped at 100A due to package 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D mb G S mbb076 1 2 3 4 LFPAK; PowerSO8 (SOT669) 3. Ordering information Table 3. Ordering information Type number Package PSMN2R0-30YLE Name Description Version LFPAK; Power-SO8 plastic single-ended surface-mounted package; 4 leads SOT669 4. Marking Table 4. Marking codes Type number Marking code PSMN2R0-30YLE 2R030 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 30 V VDGR drain-gate voltage Tj ≤ 175 °C; Tj ≥ 25 °C; RGS = 20 kΩ - 30 V VGS gate-source voltage 20 V PSMN2R0-30YLE Product data sheet -20 All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 2 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK Symbol Parameter Conditions ID drain current VGS = 10 V; Tmb = 100 °C; Fig. 1 VGS = 10 V; Tmb = 25 °C; Fig. 1 Min Max Unit [1] - 100 A [1] - 100 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 4 - 1084 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - 272 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C - 100 A Source-drain diode IS source current Tmb = 25 °C ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 1084 A VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; - 370 mJ [1] Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Vsup ≤ 30 V; unclamped; RGS = 50 Ω; Fig. 3 [1] Capped at 100A due to package 003aah010 300 ID (A) Pder (%) 80 200 100 0 40 (1) 0 50 100 150 Tmb (°C) Continuous drain current as a function of mounting base temperature PSMN2R0-30YLE Product data sheet 0 200 (1) Capped at 100A due to package Fig. 1. 03aa16 120 Fig. 2. 0 100 150 Tmb (°C) 200 Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 12 October 2012 50 © NXP B.V. 2012. All rights reserved 3 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 003aaj896 103 IAL(A) 102 (1) (2) 10 1 10-3 Fig. 3. 10-2 10-1 1 tAL(ms) 10 Single pulse avalanche rating; avalanche current as a function of avalanche time 003aah012 104 ID (A) 103 Limit RDSon = V DS / ID tp =10 µ s 102 100 µ s 1 ms 10 DC 10 ms 100 ms 1 10-1 Fig. 4. 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - 0.45 0.55 K/W PSMN2R0-30YLE Product data sheet All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 4 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 003aag993 1 Z th(j-mb) (K/W) 10 δ = 0.5 -1 0.2 0.1 0.05 P 0.02 10-2 tp T δ= single shot tp 10 -3 10-6 Fig. 5. 10-5 10-4 10-3 10-2 t T 10-1 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration 7. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 27 - - V ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C; 0.5 - - V 1.3 1.7 2.15 V - - 2.45 V VDS = 30 V; VGS = 0 V; Tj = 25 °C - 0.05 10 µA VDS = 30 V; VGS = 0 V; Tj = 100 °C - - 200 µA VGS = 16 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; - 1.7 2 mΩ - - 2.8 mΩ - 3 3.5 mΩ - - 3.8 mΩ Static characteristics V(BR)DSS VGS(th) Fig. 10 ID = 1 mA; VDS = VGS; Tj = 25 °C; Fig. 11; Fig. 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 10 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Fig. 12 VGS = 10 V; ID = 25 A; Tj = 100 °C; Fig. 13; Fig. 12 VGS = 4.5 V; ID = 25 A; Tj = 25 °C; Fig. 12 VGS = 10 V; ID = 25 A; Tj = 175 °C; Fig. 13; Fig. 12 PSMN2R0-30YLE Product data sheet All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 5 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK Symbol Parameter Conditions Min Typ Max Unit RG internal gate resistance (AC) f = 1 MHz 0.3 0.6 1.2 Ω ID = 25 A; VDS = 15 V; VGS = 10 V; - 87 - nC - 41 - nC ID = 0 A; VDS = 0 V; VGS = 10 V - 79 - nC gate-source charge ID = 25 A; VDS = 15 V; VGS = 4.5 V; - 13.3 - nC QGS(th) pre-threshold gatesource charge Fig. 14; Fig. 15 - 8.1 - nC QGS(th-pl) post-threshold gatesource charge - 5.2 - nC QGD gate-drain charge - 13.8 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 15 V; Fig. 14; Fig. 15 - 2.8 - V Ciss input capacitance VDS = 15 V; VGS = 0 V; f = 1 MHz; - 5217 - pF Coss output capacitance Tj = 25 °C; Fig. 16 - 1015 - pF Crss reverse transfer capacitance - 474 - pF td(on) turn-on delay time VDS = 15 V; RL = 0.6 Ω; VGS = 4.5 V; - 32.7 - ns tr rise time RG(ext) = 4.7 Ω; Tj = 25 °C - 55.7 - ns td(off) turn-off delay time - 41.5 - ns tf fall time - 29.5 - ns Dynamic characteristics QG(tot) total gate charge Fig. 14; Fig. 15 ID = 25 A; VDS = 15 V; VGS = 4.5 V; Fig. 14; Fig. 15 QGS Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.8 1.2 V trr reverse recovery time IS = 25 A; dIS/dt = 100 A/µs; VGS = 0 V; - 42.6 - ns Qr recovered charge VDS = 15 V - 49.8 - nC PSMN2R0-30YLE Product data sheet All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 6 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 003aah014 100 10 ID (A) 003aah015 8 VGS (V) = 3.5 4.5 RDSon (mΩ ) 80 6 60 4 3 40 2.8 20 2 2.6 2.4 0 Fig. 6. 0 0.5 1 1.5 0 2 VDS(V) Output characteristics; drain current as a Fig. 7. function of drain-source voltage; typical values 003aah016 150 gfs (S) 0 4 8 12 VGS (V) 16 Drain-source on-state resistance as a function of gate-source voltage; typical values 003aah017 200 ID (A) 120 150 90 100 60 50 30 Tj = 175 ° C Tj = 25 ° C 0 Fig. 8. 0 20 40 60 80 ID (A) 0 100 Forward transconductance as a function of drain current; typical values PSMN2R0-30YLE Product data sheet Fig. 9. 0 1 3 4 VGS (V) 5 Transfer characteristics; drain current as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 12 October 2012 2 © NXP B.V. 2012. All rights reserved 7 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 003aaj515 3 003aaj514 10-1 ID (A) VGS(th) (V) 10-2 max 2 typ min 10-3 max typ 10-4 min 1 10-5 0 -60 0 60 120 Tj (°C) 10-6 180 Fig. 10. Gate-source threshold voltage as a function of junction temperature 30 1 2 V GS (V) 3 Fig. 11. Sub-threshold drain current as a function of gate-source voltage 003aah020 003aag820 2 VGS (V) = 3 2.8 0 a RDSon (mΩ ) 1.5 20 1 10 3.5 0.5 4.5 0 10 10 30 50 70 ID (A) 0 -60 90 Fig. 12. Drain-source on-state resistance as a function of drain current; typical values PSMN2R0-30YLE Product data sheet 0 60 120 Tj (°C) 180 Fig. 13. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 8 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 003aah022 10 VDS VGS (V) ID 8 VGS(pl) 24 V 6 VGS(th) VGS VDS = 15V 4 QGS1 QGS2 QGS 6V QGD 2 QG(tot) 003aaa508 0 Fig. 14. Gate charge waveform definitions 0 20 40 60 80 100 QG (nC) Fig. 15. Gate-source voltage as a function of gate charge; typical values 003aah023 104 Ciss C (pF) 003aah024 100 IS (A) 80 60 10 3 Coss 40 Tj = 150° C Crss 20 102 10-1 1 10 VDS (V) 0 102 Tj = 25 °C 0 0.3 0.6 0.9 VSD (V) 1.2 Fig. 16. Input, output and reverse transfer capacitances Fig. 17. Source current as a function of source-drain as a function of drain-source voltage; typical voltage; typical values values PSMN2R0-30YLE Product data sheet All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 9 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 8. Package outline Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads E A2 A SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w M A b X c 1/2 e A (A 3) A1 C θ L detail X 0 2.5 y C 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 A2 A3 b b2 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 mm b3 b4 2.2 2.0 0.9 0.7 c D (1) c2 D1(1) E(1) E1(1) max 0.25 0.30 4.10 4.20 0.19 0.24 3.80 5.0 4.8 3.3 3.1 e H L L1 L2 w y θ 1.27 6.2 5.8 0.85 0.40 1.3 0.8 1.3 0.8 0.25 0.1 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 06-03-16 11-03-25 MO-235 Fig. 18. Package outline LFPAK; Power-SO8 (SOT669) PSMN2R0-30YLE Product data sheet All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 10 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 9. Legal information 9.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. PSMN2R0-30YLE Product data sheet Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 11 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of nonautomotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. PSMN2R0-30YLE Product data sheet All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 12 / 13 PSMN2R0-30YLE NXP Semiconductors N-channel 30 V 2 mΩ logic level MOSFET in LFPAK 10. Contents 1 1.1 1.2 1.3 1.4 Product profile ....................................................... 1 General description .............................................. 1 Features and benefits ...........................................1 Applications .......................................................... 1 Quick reference data ............................................ 1 2 Pinning information ............................................... 2 3 Ordering information ............................................. 2 4 Marking ................................................................... 2 5 Limiting values .......................................................2 6 Thermal characteristics .........................................4 7 Characteristics ....................................................... 5 8 Package outline ................................................... 10 9 9.1 9.2 9.3 9.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP B.V. 2012. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 12 October 2012 PSMN2R0-30YLE Product data sheet All information provided in this document is subject to legal disclaimers. 12 October 2012 © NXP B.V. 2012. All rights reserved 13 / 13