Data Sheet

TO
-2
20A
B
PSMN1R9-40PL
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
1 February 2013
Product data sheet
1. General description
Logic level N-channel MOSFET in SOT78 using TrenchMOS technology. Product design
and manufacture has been optimized for use in battery operated power tools.
2. Features and benefits
•
•
•
High efficiency due to low switching & conduction losses
Robust construction for demanding applications
Logic level gate
3. Applications
•
•
•
•
Battery-powered tools
Load switching
Motor control
Uninterruptible power supplies
4. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
40
V
ID
drain current
VGS = 10 V; Tmb = 25 °C; Fig. 1
-
-
150
A
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
-
349
W
VGS = 10 V; ID = 25 A; Tj = 25 °C;
-
1.4
1.7
mΩ
[1]
Static characteristics
RDSon
drain-source on-state
resistance
Fig. 11
Dynamic characteristics
QG(tot)
QGD
total gate charge
VGS = 10 V; ID = 25 A; VDS = 32 V;
-
230
-
nC
gate-drain charge
Fig. 13; Fig. 14
-
40.9
-
nC
ID = 150 A; Vsup ≤ 40 V; RGS = 50 Ω;
-
-
801.1
mJ
Avalanche ruggedness
EDS(AL)S
non-repetitive drainsource avalanche
energy
[1]
VGS = 10 V; Tj(init) = 25 °C; unclamped;
Fig. 3
Continuous current is limited by package.
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
5. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
G
gate
2
D
drain
3
S
source
Simplified outline
Graphic symbol
D
mb
G
S
mbb076
1 2 3
TO-220AB (SOT78)
6. Ordering information
Table 3.
Ordering information
Type number
Package
PSMN1R9-40PL
Name
Description
Version
TO-220AB
plastic single-ended package; heatsink mounted; 1 mounting
hole; 3-lead TO-220AB
SOT78
7. Marking
Table 4.
Marking codes
Type number
Marking code
PSMN1R9-40PL
PSMN1R9-40PL
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
40
V
VDGR
drain-gate voltage
RGS = 20 kΩ
-
40
V
VGS
gate-source voltage
-20
20
V
ID
drain current
IDM
peak drain current
PSMN1R9-40PL
Product data sheet
Tmb = 100 °C; VGS = 10 V; Fig. 1
[1]
-
150
A
Tmb = 25 °C; VGS = 10 V; Fig. 1
[1]
-
150
A
-
1332
A
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
Symbol
Parameter
Conditions
Min
Max
Unit
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
349
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Tsld(M)
peak soldering temperature
-
260
°C
-
150
A
Source-drain diode
IS
source current
Tmb = 25 °C
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
-
1332
A
ID = 150 A; Vsup ≤ 40 V; RGS = 50 Ω;
-
801.1
mJ
[1]
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; unclamped;
Fig. 3
[1]
Continuous current is limited by package.
003aak794
360
ID
(A)
300
03aa16
120
Pder
(%)
80
240
180
(1)
40
120
60
0
Fig. 1.
0
30
60
90
120
150
Tj (°C)
Continuous drain current as a function of
mounting base temperature
PSMN1R9-40PL
Product data sheet
0
180
Fig. 2.
0
100
150
Tmb (°C)
200
Normalized total power dissipation as a
function of mounting base temperature
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
IAL
(A)
003aak795
103
102
(1)
(2)
10
10-3
Fig. 3.
10-2
10-1
1
tAL (ms)
10
Avalanche rating; avalanche current as a function of avalanche time
ID
(A)
003aak796
104
Limit RDSon = VDS / ID
103
tp = 10 us
100 us
102
DC
10
1 ms
10 ms
100 ms
1
10-1
10-1
Fig. 4.
1
10
VDS (V)
102
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance
from junction to
mounting base
Fig. 5
-
0.35
0.43
K/W
Rth(j-a)
thermal resistance
from junction to
ambient
-
60
-
K/W
PSMN1R9-40PL
Product data sheet
vertical in still air
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
003aaf570
1
Zth(j-mb)
(K/W)
= 0.5
0.2
10-1
0.1
0.05
tp
T
P
10-2
0.02
tp
single shot
10-3
10-6
Fig. 5.
10-5
10-4
10-3
10-2
t
T
10-1
1
tp (s)
Transient thermal impedance from junction to mounting base as a function of pulse duration.
10. Characteristics
Table 7.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
40
-
-
V
ID = 250 µA; VGS = 0 V; Tj = -55 °C
36
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
1.4
1.7
2.1
V
-
-
2.45
V
0.5
-
-
V
VDS = 40 V; VGS = 0 V; Tj = 25 °C
-
0.13
1
µA
VDS = 40 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
VGS = 16 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = -16 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 10 V; ID = 25 A; Tj = 25 °C;
-
1.4
1.7
mΩ
-
1.65
1.94
mΩ
-
-
3.15
mΩ
0.38
0.76
1.52
Ω
Static characteristics
V(BR)DSS
VGS(th)
Fig. 9; Fig. 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 9
ID = 1 mA; VDS = VGS; Tj = 175 °C;
Fig. 9
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
Fig. 11
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
Fig. 11
VGS = 10 V; ID = 25 A; Tj = 175 °C;
Fig. 12; Fig. 11
RG
gate resistance
PSMN1R9-40PL
Product data sheet
f = 1 MHz
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ID = 25 A; VDS = 32 V; VGS = 5 V;
-
120
-
nC
ID = 25 A; VDS = 32 V; VGS = 10 V;
-
230
-
nC
Fig. 13; Fig. 14
-
26.9
-
nC
-
40.9
-
nC
Dynamic characteristics
QG(tot)
total gate charge
Fig. 13; Fig. 14
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
-
13200 -
pF
Coss
output capacitance
Tj = 25 °C; Fig. 15
-
1530
-
pF
Crss
reverse transfer
capacitance
-
740
-
pF
td(on)
turn-on delay time
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
-
95
-
ns
tr
rise time
RG(ext) = 5 Ω
-
118
-
ns
td(off)
turn-off delay time
-
195
-
ns
tf
fall time
-
119
-
ns
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16
-
0.77
1.2
V
trr
reverse recovery time
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
57
-
ns
Qr
recovered charge
VDS = 25 V
-
97
-
nC
003aai099
400
VGS (V) = 10
ID
(A)
3.5
5
003aai100
10
RDSon
(mΩ )
300
7.5
3
200
5
2.8
100
0
2.5
2.6
2.4
2.2
0
0.5
1
0
1.5 V (V) 2
DS
Tj = 25 °C; tp = 300 μs
Fig. 6.
Fig. 7.
Output characteristics; drain current as a
function of drain-source voltage; typical values
PSMN1R9-40PL
Product data sheet
0
5
7.5
VGS (V)
10
Drain-source on-state resistance as a function
of gate-source voltage; typical values
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
003aag335
400
003aah025
3
VGS(th)
(V)
2.5
ID
(A)
max
300
2
typ
1.5
200
min
1
100
0
Fig. 8.
Tj = 175 °C
Tj = 25 °C
2
4
0
0.5
VGS (V)
0
-60
6
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
003aah026
10-1
Fig. 9.
10-2
4
min
10-3
typ
max
2
10-5
1
0
1
2
V GS (V)
0
3
Fig. 10. Sub-threshold drain current as a function of
gate-source voltage
PSMN1R9-40PL
Product data sheet
120
Tj (° C)
180
003aai105
2.6
2.8
3
3.5
3
10-4
10-6
60
Gate-source threshold voltage as a function of
junction temperature
5
RDSon
(mΩ )
ID
(A)
0
5
VGS (V) = 10
0
100
200
300 I (A) 400
D
Tj = 25 °C; tp = 300 μs
Fig. 11. Drain-source on-state resistance as a function
of drain current; typical values
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
003aag820
2
VDS
a
ID
1.5
VGS(pl)
VGS(th)
1
VGS
QGS1
0.5
QGS2
QGS
QGD
QG(tot)
003aaa508
0
-60
0
60
120
Tj (°C)
Fig. 13. Gate charge waveform definitions
180
Fig. 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
003aag341
10
VGS
(V)
003aag337
105
C
(pF)
8
Ciss
104
14 V
6
4
VDS = 32 V
Coss
103
Crss
2
0
0
60
120
180
QG (nC)
240
102
10-1
Tj = 25 °C; ID = 25 A
Product data sheet
10
VDS (V)
102
VGS = 0 V; f = 1 MHz
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
PSMN1R9-40PL
1
Fig. 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
003aag342
300
IS
(A)
240
180
120
Tj = 175 °C
60
0
0
0.5
Tj = 25 °C
1
VSD (V)
1.5
VGS = 0 V
Fig. 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
PSMN1R9-40PL
Product data sheet
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
11. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
A
A1
p
q
mounting
base
D1
D
L1(1)
L2(1)
Q
L
b1(2)
(3×)
b2(2)
(2×)
1
2
3
b(3×)
e
c
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
b1(2)
b2(2)
c
D
D1
E
e
L
L1(1)
L2(1)
max.
p
q
Q
mm
4.7
4.1
1.40
1.25
0.9
0.6
1.6
1.0
1.3
1.0
0.7
0.4
16.0
15.2
6.6
5.9
10.3
9.7
2.54
15.0
12.8
3.30
2.79
3.0
3.8
3.5
3.0
2.7
2.6
2.2
Notes
1. Lead shoulder designs may vary.
2. Dimension includes excess dambar.
OUTLINE
VERSION
SOT78
REFERENCES
IEC
JEDEC
JEITA
3-lead TO-220AB
SC-46
EUROPEAN
PROJECTION
ISSUE DATE
08-04-23
08-06-13
Fig. 17. Package outline TO-220AB (SOT78)
PSMN1R9-40PL
Product data sheet
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
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punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
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whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
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is deemed to offer functions and qualities beyond those described in the
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or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
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source outside of NXP Semiconductors.
PSMN1R9-40PL
Product data sheet
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Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
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representation or warranty that such applications will be suitable for the
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in the customer’s applications or products, or the application or use by
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
grant, conveyance or implication of any license under any copyrights, patents
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12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
PSMN1R9-40PL
Product data sheet
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PSMN1R9-40PL
NXP Semiconductors
N-channel 40 V, 1.7 mΩ logic level MOSFET in SOT78
13. Contents
1
General description ............................................... 1
2
Features and benefits ............................................1
3
Applications ........................................................... 1
4
Quick reference data ............................................. 1
5
Pinning information ............................................... 2
6
Ordering information ............................................. 2
7
Marking ................................................................... 2
8
Limiting values .......................................................2
9
Thermal characteristics .........................................4
10
Characteristics ....................................................... 5
11
Package outline ................................................... 10
12
12.1
12.2
12.3
12.4
Legal information .................................................11
Data sheet status ............................................... 11
Definitions ...........................................................11
Disclaimers .........................................................11
Trademarks ........................................................ 12
© NXP B.V. 2013. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 1 February 2013
PSMN1R9-40PL
Product data sheet
All information provided in this document is subject to legal disclaimers.
1 February 2013
© NXP B.V. 2013. All rights reserved
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