PSMN8R5-60YS N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 22 July 2015 Product data sheet 1. General description Standard level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 2. Features and benefits • • • • Advanced TrenchMOS provides low RDSon and low gate charge High efficiency gains in switching power converters Improved mechanical and thermal characteristics LFPAK provides maximum power density in a Power SO8 package 3. Applications • • • • • DC-to-DC converters Lithium-ion battery protection Load switching Motor control Server power supplies 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 60 V ID drain current Tmb = 25 °C; VGS = 10 V; Fig. 2 - - 76 A Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 106 W Tj junction temperature -55 - 175 °C - - 12.8 mΩ - 5.6 8 mΩ - 7.7 - nC Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 15 A; Tj = 100 °C; Fig. 12 VGS = 10 V; ID = 15 A; Tj = 25 °C; Fig. 13 Dynamic characteristics QGD gate-drain charge VGS = 10 V; ID = 60 A; VDS = 30 V; Fig. 15; Fig. 14 Scan or click this QR code to view the latest information for this product PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET Symbol Parameter Conditions Min Typ Max Unit QG(tot) total gate charge VGS = 10 V; ID = 60 A; VDS = 30 V; - 39 - nC - - 97 mJ Fig. 14; Fig. 15 Avalanche ruggedness EDS(AL)S non-repetitive drainsource avalanche energy VGS = 10 V; Tj(init) = 25 °C; ID = 76 A; Vsup ≤ 60 V; RGS = 50 Ω; unclamped 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D mb G mbb076 S 1 2 3 4 LFPAK56; PowerSO8 (SOT669) 6. Ordering information Table 3. Ordering information Type number Package PSMN8R5-60YS Name Description Version LFPAK56; Power-SO8 Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads SOT669 7. Marking Table 4. Marking codes Type number Marking code PSMN8R5-60YS 8R560 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 60 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ - 60 V PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 2 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET Symbol Parameter Conditions VGS gate-source voltage Ptot total power dissipation ID drain current Min Max Unit -20 20 V Tmb = 25 °C; Fig. 1 - 106 W VGS = 10 V; Tmb = 100 °C; Fig. 2 - 54 A VGS = 10 V; Tmb = 25 °C; Fig. 2 - 76 A pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3 - 303 A IDM peak drain current Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C Source-drain diode IS source current Tmb = 25 °C - 76 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 303 A VGS = 10 V; Tj(init) = 25 °C; ID = 76 A; - 97 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Vsup ≤ 60 V; RGS = 50 Ω; unclamped 03aa16 120 Pder (%) 80 40 0 Fig. 1. 0 50 100 150 Tmb (°C) 200 Normalized total power dissipation as a function of mounting base temperature PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 3 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 003aad791 100 ID (A) 80 60 40 20 0 Fig. 2. 0 50 10 0 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature 003a a d792 103 ID (A) Limit RDSon = VDS / ID 102 tp = 10 µs 100 µs 10 DC 1 ms 1 10 ms 100 ms 10- 1 10- 1 Fig. 3. 1 10 102 103 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 4 - 0.63 1.42 K/W PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 4 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 003aad834 1 Zth(j-mb) (K/W) d = 0.5 0.2 10 -1 0.1 0.05 0.02 10-2 P δ= single shot tp 10-3 10-6 Fig. 4. 10-5 10-4 10-3 10-2 tp T t T 10-1 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration; typical values 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 54 - - V ID = 250 µA; VGS = 0 V; Tj = 25 °C 60 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 2 3 3.8 V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = -55 °C; - - 4.3 V 0.95 - - V VDS = 60 V; VGS = 0 V; Tj = 25 °C - 0.03 2 µA VDS = 60 V; VGS = 0 V; Tj = 125 °C - - 50 µA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 15 A; Tj = 175 °C; - 12 18.4 mΩ - - 12.8 mΩ - 5.6 8 mΩ - 0.61 - Ω Static characteristics V(BR)DSS VGS(th) VGSth Fig. 10; Fig. 11 Fig. 11 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 11 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Fig. 12 VGS = 10 V; ID = 15 A; Tj = 100 °C; Fig. 12 VGS = 10 V; ID = 15 A; Tj = 25 °C; Fig. 13 RG gate resistance PSMN8R5-60YS Product data sheet f = 1 MHz All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 5 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET Symbol Parameter Conditions Min Typ Max Unit ID = 60 A; VDS = 30 V; VGS = 10 V; - 39 - nC ID = 0 A; VDS = 0 V; VGS = 10 V - 33 - nC ID = 60 A; VDS = 30 V; VGS = 10 V; - 13.3 - nC - 7 - nC - 6.2 - nC - 7.7 - nC Dynamic characteristics QG(tot) total gate charge Fig. 14; Fig. 15 QGS gate-source charge Fig. 15; Fig. 14 QGS(th) pre-threshold gatesource charge QGS(th-pl) post-threshold gatesource charge QGD gate-drain charge ID = 60 A; VDS = 30 V; VGS = 10 V; Fig. 14 ID = 60 A; VDS = 30 V; VGS = 10 V; Fig. 15; Fig. 14 VGS(pl) gate-source plateau voltage VDS = 30 V; Fig. 14; Fig. 15 - 5.2 - V Ciss input capacitance VDS = 30 V; VGS = 0 V; f = 1 MHz; - 2370 - pF Coss output capacitance Tj = 25 °C; Fig. 16 - 307 - pF Crss reverse transfer capacitance - 172 - pF td(on) turn-on delay time VDS = 30 V; RL = 0.5 Ω; VGS = 10 V; - 18.4 - ns tr rise time RG(ext) = 4.7 Ω - 13.7 - ns td(off) turn-off delay time - 32.4 - ns tf fall time - 9.2 - ns Source-drain diode VSD source-drain voltage IS = 15 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.8 1.2 V trr reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; - 43.3 - ns recovered charge VDS = 30 V - 61.4 - nC Qr PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 6 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 003aad794 60 003aad801 4000 C (pF) gfs (S) Ciss 3000 40 Crss 2000 20 1000 0 Fig. 5. 0 20 40 60 ID (A) 0 80 Forward transconductance as a function of drain current; typical values Fig. 6. 003aad797 40 0 3 6 9 003aad795 10 ID (A) 30 12 Input and reverse transfer capacitances as a function of gate-source voltage, typical values 80 RDSon (mΩ) VGS (V) 7 5.5 6 60 5 20 40 10 20 VGS (V) = 4.5 0 Fig. 7. 4 8 12 16 VGS (V) 0 20 Drain-source on-state resistance as a function of gate-source voltage; typical values PSMN8R5-60YS Product data sheet Fig. 8. 0 1 1.5 VDS (V) 2 Output characteristics: drain current as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 22 July 2015 0.5 © NXP Semiconductors N.V. 2015. All rights reserved 7 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 003aad796 80 aaa-019191 10-1 ID (A) ID (A) 10-2 60 Min 10-3 Typ Max 40 10-4 20 0 Fig. 9. VGS(th) (V) 0 2 10-5 Tj = 25 °C Tj = 175 °C 4 VGS (V) 10-6 6 Transfer characteristics: drain current as a function of gate-source voltage; typical values 1 2 3 4 VGS (V) 5 Tj = 25 °C; VDS = 5V Fig. 10. Sub-threshold drain current as a function of gate-source voltage aaa-019190 5 0 003aad696 2.4 a 2 4 Max 1.6 3 Typ 1.2 2 Min 0.8 1 0 -60 0.4 -30 0 30 60 90 120 150 Tj (°C) 0 -60 180 ID = 1 mA ; VDS = VGS Fig. 11. Gate-source threshold voltage as a function of junction temperature PSMN8R5-60YS Product data sheet 0 60 120 Tj (°C) 180 Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature. All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 8 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 003aad798 25 VDS 5.5 VGS (V) = 5 RDSon (mΩ) ID 20 VGS(pl) 15 VGS(th) VGS 6 10 QGS2 QGS1 7 QGS 8 10 5 0 20 40 60 ID (A) QGD QG(tot) 003aaa508 Fig. 14. Gate charge waveform definitions 80 Fig. 13. Drain-source on-state resistance as a function of drain current; typical values 003aad799 10 VGS (V) C (pF) 12 V 8 003aad800 104 VDS = 30 V Ciss 48 V 6 103 4 Coss 2 Crss 0 0 20 40 QG (nC) Fig. 15. Gate-source voltage as a function of gate charge; typical values PSMN8R5-60YS Product data sheet 102 60 10- 1 1 10 VDS (V) 102 Fig. 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 9 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 003aad802 80 IS (A) 60 40 20 Tj = 175 °C 0 0 0.4 Tj = 25 °C 0.8 VSD (V) 1.2 Fig. 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 10 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 11. Package outline Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads E A2 A SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w b A X c 1/2 e A (A3) A1 C q L detail X 0 y C θ 5 mm 8° scale 0° Dimensions (mm are the original dimensions) Unit(1) A A1 A2 A3 b b2 max 1.20 0.15 1.10 0.50 4.41 nom 0.25 min 1.01 0.00 0.95 0.35 3.62 mm c c2 D(1) D1(1) E(1) E1(1) b3 b4 2.2 0.9 0.25 0.30 4.10 4.20 5.0 3.3 2.0 0.7 0.19 0.24 3.80 4.8 3.1 e 1.27 H L L1 L2 6.2 0.85 1.3 1.3 5.8 0.40 0.8 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. Outline version SOT669 References IEC JEDEC JEITA w y 0.25 0.1 sot669_po European projection Issue date 11-03-25 13-02-27 MO-235 Fig. 18. Package outline LFPAK56; Power-SO8 (SOT669) PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 11 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 12. Legal information 12.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. 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The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Bitsound, CoolFlux, CoReUse, DESFire, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, MIFARE, MIFARE Plus, MIFARE Ultralight, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP Semiconductors N.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 13 / 14 PSMN8R5-60YS NXP Semiconductors N-channel LFPAK 60 V, 8 mΩ standard level MOSFET 13. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Package outline ................................................... 11 12 12.1 12.2 12.3 12.4 Legal information .................................................12 Data sheet status ............................................... 12 Definitions ...........................................................12 Disclaimers .........................................................12 Trademarks ........................................................ 13 © NXP Semiconductors N.V. 2015. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 22 July 2015 PSMN8R5-60YS Product data sheet All information provided in this document is subject to legal disclaimers. 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved 14 / 14