Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T18S160W31S
Rev. 0, 5/2015
RF Power LDMOS Transistors
N--Channel Enhancement--Mode Lateral MOSFETs
These 32 W RF power LDMOS transistors are designed for cellular base
station applications requiring very wide instantaneous bandwidth capability
covering the frequency range of 1805 to 1995 MHz.
A2T18S160W31SR3
A2T18S160W31GSR3
1800 MHz
 Typical Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQ = 1000 mA, Pout = 32 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
1805 MHz
19.6
32.1
1840 MHz
20.1
1880 MHz
19.9
Output PAR
(dB)
ACPR
(dBc)
IRL
(dB)
7.2
–34.7
–12
32.1
7.2
–35.0
–17
31.6
7.2
–35.4
–12
1900 MHz
 Typical Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQ = 1000 mA, Pout = 32 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
1930 MHz
21.0
32.2
1960 MHz
21.3
1995 MHz
21.6
Output PAR
(dB)
ACPR
(dBc)
IRL
(dB)
7.5
–34.4
–17
32.2
7.4
–34.4
–19
32.9
7.1
–33.9
–12
1805–1995 MHz, 32 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTORS
NI--780S--2L2LA
A2T18S160W31SR3
NI--780GS--2L2LA
A2T18S160W31GSR3
Features
 Designed for Wide Instantaneous Bandwidth Applications
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Able to Withstand Extremely High Output VSWR and Broadband Operating
Conditions
 Optimized for Doherty Applications
4 VBW (1)
RFin/VGS 1
3 RFout/VDS
2 VBW (1)
(Top View)
Figure 1. Pin Connections
1. Device can operate with the VDD current
supplied through pin 2 or pin 4 alone.
 Freescale Semiconductor, Inc., 2015. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T18S160W31SR3 A2T18S160W31GSR3
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
TC
–40 to +125
C
Case Operating Temperature Range
Operating Junction Temperature Range
(1,2)
CW Operation @ TC = 25C
Derate above 25C
TJ
–40 to +225
C
CW
185
1.0
W
W/C
Symbol
Value (2,3)
Unit
RJC
0.36
C/W
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 76C, 32 W CW, 28 Vdc, IDQ = 1000 mA, 1840 MHz
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
5
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 160 Adc)
VGS(th)
1.2
1.8
2.2
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, ID = 1000 mAdc, Measured in Functional Test)
VGS(Q)
2.1
2.6
3.1
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.6 Adc)
VDS(on)
0.1
0.14
0.3
Vdc
Characteristic
Off Characteristics
On Characteristics
Functional Tests (4,5) (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1000 mA, Pout = 32 W Avg., f = 1880 MHz,
Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz
Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
18.5
19.9
21.5
dB
Drain Efficiency
D
27.0
31.6
—
%
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Input Return Loss
1.
2.
3.
4.
5.
PAR
6.7
7.2
—
dB
ACPR
—
–35.4
–32.0
dBc
IRL
—
–12
–6.5
dB
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.freescale.com/rf/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
Part internally matched both on input and output.
Measurements made with device in straight lead configuration, before any lead forming operation is applied. Lead forming is used for gull
wing (GS) parts.
(continued)
A2T18S160W31SR3 A2T18S160W31GSR3
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Load Mismatch (In Freescale Test Fixture, 50 ohm system) IDQ = 1000 mA, f = 1840 MHz
VSWR 10:1 at 32 Vdc, 173 W CW Output Power
(3 dB Input Overdrive from 129 W CW Rated Power)
No Device Degradation
Typical Performance (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1000 mA, 1805–1880 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
129
—
W

—
–15
—

VBWres
—
110
—
MHz
Gain Flatness in 75 MHz Bandwidth @ Pout = 32 W Avg.
GF
—
0.5
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.006
—
dB/C
P1dB
—
0.005
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 1805–1880 MHz frequency range.)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C) (1)
Table 5. Ordering Information
Device
A2T18S160W31SR3
A2T18S160W31GSR3
Tape and Reel Information
Package
NI--780S--2L2LA
R3 Suffix = 250 Units, 44 mm Tape Width, 13--inch Reel
NI--780GS--2L2LA
1. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
3
C3
C11
VGG
C4
C12
R1
C5*
C21
C13*
D61217
CUT OUT AREA
C2*
C1*
VDD
C6*
R2
C7
VGG
C14*
C19* C20*
C9
C10
C15*
C22
C16*
C18
VDD
C17
C8
C23*
A2T18S160W31S
Rev. 5
*C1, C2, C5, C6, C13, C14, C15, C16, C19, C20, and C23 are mounted vertically.
Figure 2. A2T18S160W31SR3 Test Circuit Component Layout
Table 6. A2T18S160W31SR3 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C13, C14, C15, C16, C23
8.2 pF Chip Capacitors
ATC100B8R2CT500XT
ATC
C2
1.7 pF Chip Capacitor
ATC100B1R7BT500XT
ATC
C3, C4, C7, C8, C9, C10, C11,
C12, C17, C18
10 F Chip Capacitors
GRM32ER61H106KA12L
Murata
C5, C6
9.1 pF Chip Capacitors
ATC100B9R1CT500XT
ATC
C19
2.2 pF Chip Capacitor
ATC100B2R2JT500XT
ATC
C20
0.5 pF Chip Capacitor
ATC100B0R5BT500XT
ATC
C21, C22
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26-RH
Multicomp
R1, R2
2.37 , 1/4 W Chip Resistors
CRCW12062R37FNEA
Vishay
PCB
Rogers RO4350B, 0.020, r = 3.66
D61217
MTL
A2T18S160W31SR3 A2T18S160W31GSR3
4
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 1805–1880 MHz
20.5 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
20 Probability on CCDF
19.5
19
31
30
D
29
Gps
ACPR
18.5
–33.5
0
–34
–5
–34.5
18
–35
17.5
PARC
17
1760
1780
–35.5
IRL
1800
1820 1840 1860
f, FREQUENCY (MHz)
1880
–10
–15
–20
–36
1920
1900
–25
–2.5
–2.6
–2.7
–2.8
–2.9
PARC (dB)
Gps, POWER GAIN (dB)
21
32
IRL, INPUT RETURN LOSS (dB)
21.5
33
D, DRAIN
EFFICIENCY (%)
VDD = 28 Vdc, Pout = 32 W (Avg.)
IDQ = 1000 mA, Single--Carrier W--CDMA
ACPR (dBc)
22
–3
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 32 Watts Avg.
–10
VDD = 28 Vdc, Pout = 44 W (PEP), IDQ = 1000 mA
Two--Tone Measurements, (f1 + f2)/2 = Center
Frequency of 1840 MHz
IM3--U
–20
–30
IM3--L
IM5--U
–40
IM7--L
–50
IM7--U
–60
–70
IM5--L
1
10
300
100
TWO--TONE SPACING (MHz)
20
0
19.8
19.6
19.4
19.2
19
VDD = 28 Vdc, IDQ = 1000 mA, f = 1840 MHz
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
45
–20
40
–25
D
–1
ACPR
–1 dB = 17.3 W
–2
35
30
–2 dB = 25 W
–3
25
–3 dB = 32.5 W
Gps
–4
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
–5
8
18
PARC
28
38
Pout, OUTPUT POWER (WATTS)
48
–30
–35
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
20.2
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
–40
20
–45
15
58
–50
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 1805–1880 MHz
1805 MHz
Gps, POWER GAIN (dB)
20
1805 MHz
1840 MHz
1880 MHz
18 VDD = 28 Vdc, IDQ = 1000 mA
Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth, Input Signal
16 PAR = 9.9 dB @ 0.01%
Probability on CCDF
ACPR
1840 MHz
12
Gps
1805 MHz
0
50
–10
40
20
10
1880 MHz
1
60
30
14
10
D
0
300
10
100
Pout, OUTPUT POWER (WATTS) AVG.
–20
–30
–40
ACPR (dBc)
1880 MHz 1840 MHz
D, DRAIN EFFICIENCY (%)
22
–50
–60
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
5
21
Gain
0
19
–5
18
–10
17
–15
IRL
16
15
1650
IRL (dB)
GAIN (dB)
20
1700
1750
1800 1850 1900
f, FREQUENCY (MHz)
VDD = 28 Vdc
Pin = 0 dBm
IDQ = 1000 mA
1950
2000
–20
–25
2050
Figure 7. Broadband Frequency Response
A2T18S160W31SR3 A2T18S160W31GSR3
6
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ = 1041 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1805
0.77 – j2.95
0.81 + j3.12
1840
0.80 – j3.23
0.93 + j3.34
1880
1.00 – j3.43
1.14 + j3.63
Zload
()
(1)
AM/PM
()
Gain (dB)
(dBm)
(W)
D
(%)
1.85 – j3.49
19.0
51.9
156
50.2
–9
1.93 – j3.61
19.0
52.0
157
50.4
–11
2.03 – j3.75
19.0
51.8
150
49.3
–11
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
0.77 – j2.95
0.75 + j3.23
1.89 – j3.56
17.0
53.0
199
54.2
–13
1840
0.80 – j3.23
0.86 + j3.47
1.96 – j3.58
17.0
53.0
200
55.0
–15
1880
1.00 – j3.43
1.05 + j3.80
2.03 – j3.43
17.4
52.9
197
56.3
–15
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQ = 1041 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
0.77 – j2.95
0.82 + j3.23
3.67 – j0.62
22.5
49.3
85
61.0
–10
1840
0.80 – j3.23
0.87 + j3.45
2.54 – j0.27
23.1
49.3
85
62.6
–11
1880
1.00 – j3.43
1.07 + j3.82
2.12 – j0.54
23.0
49.7
93
66.7
–14
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.49 – j0.50
20.6
50.6
115
67.0
–16
0.90 + j3.56
2.96 – j0.69
20.6
50.9
124
68.1
–17
1.12 + j3.91
2.66 – j0.75
20.7
51.0
126
70.4
–20
f
(MHz)
Zsource
()
Zin
()
1805
0.77 – j2.95
0.81 + j3.37
1840
0.80 – j3.23
1880
1.00 – j3.43
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
7
P1dB – TYPICAL LOAD PULL CONTOURS — 1840 MHz
1
1
48
0
48.5
E
–1
IMAGINARY ()
IMAGINARY ()
0
49
–2
49.5
–3
51
–5
50.5
P
–4
1
51.5
60
–2
3
4
REAL ()
6
5
–5
7
56
58
–3
52
54
50
P
51
2
62
–1
–4
48
46
2
1
3
4
REAL ()
5
46
6
7
Figure 9. P1dB Load Pull Efficiency Contours (%)
1
1
23
E
22
22.5
–1
21.5
21
P
–4
19
1
2
20.5
20
4
REAL ()
–10
–1
–10
–12
–2
–3
P
–4
19.5
3
E
–14
–2
–3
–16
0
IMAGINARY ()
0
IMAGINARY ()
E
50
Figure 8. P1dB Load Pull Output Power Contours (dBm)
–5
48
6
5
7
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
–5
1
2
3
4
REAL ()
5
6
7
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18S160W31SR3 A2T18S160W31GSR3
8
RF Device Data
Freescale Semiconductor, Inc.
P3dB – TYPICAL LOAD PULL CONTOURS — 1840 MHz
1
1
49
49.5
66
–1
50
50.5
E
0
IMAGINARY ()
IMAGINARY ()
0
51
–2
52
52.5
51.5
–3
62 60
–2
58
–3
P
–4
52
1
2
3
4
REAL ()
6
5
–5
7
1
1
0
0
20.5
21
19.5
–2
19
–3
P
–4
17
1
2
18.5
18
4
REAL ()
3
4
REAL ()
6
5
–26
–24
–20
–22
E
–1
–16
–2
–14
–3
P
5
6
7
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
7
–18
–12
–4
17.5
3
2
1
20
E
–1
52
Figure 13. P3dB Load Pull Efficiency Contours (%)
IMAGINARY ()
IMAGINARY ()
Figure 12. P3dB Load Pull Output Power Contours (dBm)
–5
56
54
P
–4
–5
64
E
–1
–5
1
2
3
4
REAL ()
5
6
7
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
9
C4
C14
VGG
C5
C15
R1
C6*
D61217
C2*
C24
C7*
C3*
C16*
CUT OUT AREA
C1*
VDD
C17*
C26*
C22* C23*
C12
C13
C8*
C9*
C25
C19*
C18*
R2
C10
C21
VGG
C20
C11
VDD
A2T18S160W31S
Rev. 5
*C1, C2, C3, C6, C7, C8, C9, C16, C17, C18, C19, C22, C23, and C26 are mounted vertically.
Figure 16. A2T18S160W31SR3 Test Circuit Component Layout — 1930–1995 MHz
Table 9. A2T18S160W31SR3 Test Circuit Component Designations and Values — 1930–1995 MHz
Part
Description
Part Number
Manufacturer
C1, C6, C7, C8, C9, C16, C17,
C18, C19, C26
8.2 pF Chip Capacitors
ATC100B8R2CT500XT
ATC
C2
0.8 pF Chip Capacitor
ATC100B0R8BT500XT
ATC
C3
1.0 pF Chip Capacitor
ATC100B1R0BT500XT
ATC
C4, C5, C10, C11, C12, C13,
C14, C15, C20, C21
10 F Chip Capacitors
GRM32ER61H106KA12L
Murata
C22
2.2 pF Chip Capacitor
ATC100B2R2JT500XT
ATC
C23
0.5 pF Chip Capacitor
ATC100B0R5BT500XT
ATC
C24, C25
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26-RH
Multicomp
R1, R2
2.37 , 1/4 W Chip Resistors
CRCW12062R37FNEA
Vishay
PCB
Rogers RO4350B, 0.020, r = 3.66
D61217
MTL
A2T18S160W31SR3 A2T18S160W31GSR3
10
RF Device Data
Freescale Semiconductor, Inc.
20.5
20.4
31.5
30.5
Gps
D
20.3
29.5
PARC
20.2
20.1
–28
–5
–30
–10
–32
20
–34
19.9
19.8
1880
IRL
1900
1920
–36
ACPR
1940 1960 1980
f, FREQUENCY (MHz)
2000
2020
–15
–20
–25
–38
2040
–30
–2
–2.5
–3
–3.5
–4
PARC (dB)
20.6
32.5
IRL, INPUT RETURN LOSS (dB)
20.7
Gps, POWER GAIN (dB)
33.5
VDD = 28 Vdc, Pout = 32 W (Avg.), IDQ = 1000 mA
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability
on CCDF
ACPR (dBc)
20.8
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS — 1930–1995 MHz
–4.5
Figure 17. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 32 Watts Avg.
16
50
–10
40
ACPR
1995 MHz
1960 MHz
30
20
Gps
10
1930 MHz
1
0
1960 MHz
20 V = 28 Vdc, I = 1000 mA
DD
DQ
Single--Carrier W--CDMA, 3.84 MHz
19 Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01%
D
Probability on CCDF
18
17
60
0
300
10
100
Pout, OUTPUT POWER (WATTS) AVG.
–20
–30
–40
ACPR (dBc)
1930 MHz
1995 MHz
1995 MHz
1930 MHz
21
1960 MHz
D, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
22
–50
–60
Figure 18. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
23
5
22
0
–5
Gain
20
–10
19
–15
18
17
1800
IRL
1850
1900
1950 2000 2050
f, FREQUENCY (MHz)
VDD = 28 Vdc
Pin = 0 dBm
IDQ = 1000 mA
2100
2150
IRL (dB)
GAIN (dB)
21
–20
–25
2200
Figure 19. Broadband Frequency Response
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
11
Table 10. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ = 1044 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1930
1.28 – j3.84
1.45 + j4.15
1960
1.53 – j4.20
1.80 + j4.46
1995
2.15 – j4.41
2.49 + j4.79
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.49 – j2.77
20.3
52.2
166
56.2
–10
1.49 – j2.90
20.4
52.4
173
57.9
–11
1.54 – j3.27
20.4
52.3
170
55.2
–12
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1930
1.28 – j3.84
1.43 + j4.30
1.70 – j3.10
18.1
53.3
212
60.1
–16
1960
1.53 – j4.20
1.80 + j4.66
1.70 – j3.17
18.2
53.4
217
61.6
–17
1995
2.15 – j4.41
2.53 + j5.08
1.66 – j3.36
18.3
53.2
211
59.4
–17
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 11. Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQ = 1044 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1930
1.28 – j3.84
1.51 + j4.28
1.85 – j1.07
23.4
50.1
103
68.4
–15
1960
1.53 – j4.20
1.91 + j4.57
1.81 – j1.49
23.1
50.7
118
70.3
–16
1995
2.15 – j4.41
2.69 + j4.90
1.75 – j1.77
23.1
50.6
114
66.1
–16
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.26 – j1.34
20.9
51.5
142
71.9
–21
2.03 + j4.74
2.05 – j1.25
21.3
51.2
130
73.0
–24
2.78 + j5.10
1.96 – j1.87
20.9
51.6
145
69.3
–23
f
(MHz)
Zsource
()
Zin
()
1930
1.28 – j3.84
1.55 + j4.38
1960
1.53 – j4.20
1995
2.15 – j4.41
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T18S160W31SR3 A2T18S160W31GSR3
12
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL LOAD PULL CONTOURS — 1960 MHz
0
–0.5
49
–0.5
49.5
–1
–1.5
E
50.5
–2
51
–2.5
52
P
–3
1.5
2
2.5
3
3.5
REAL ()
4
4.5
–0.5
–0.5
22.5
23
22
–2
21.5
–2.5
21
P
–3
–4
1.5
2
58
56
2
2.5
3
3.5
REAL ()
4
4.5
5
–10
–22
–18
–20
–1.5
E
–16
–2
–12
–14
–2.5
–12
P
–3.5
20
1
1.5
1
–3
20.5
–3.5
62
60
54
–1
IMAGINARY ()
IMAGINARY ()
23.5
E
P
Figure 21. P1dB Load Pull Efficiency Contours (%)
0
–1.5
66
64
–2.5
0
24
68
–2
–4
5
Figure 20. P1dB Load Pull Output Power Contours (dBm)
–1
E
–3.5
51.5
1
70
–1.5
–3
51.5
–3.5
–4
–1
50
IMAGINARY ()
IMAGINARY ()
0
48.5
2.5
3
REAL ()
3.5
4
4.5
5
Figure 22. P1dB Load Pull Gain Contours (dB)
NOTE:
–4
1
1.5
2
2.5
3
3.5
REAL ()
4
4.5
5
Figure 23. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
13
P3dB -- TYPICAL LOAD PULL CONTOURS — 1960 MHz
0
0
50
49.5
51
51.5
52
--2
52.5
53
--3
64
--1
E
IMAGINARY ()
IMAGINARY ()
--1
50.5
P
E
70
52
66
64
P
62
60
1
58
52.5
51.5
--5
1.5
2
2.5
REAL ()
3.5
3
--5
4
1
Figure 24. P3dB Load Pull Output Power Contours (dBm)
1.5
2
2.5
REAL ()
3.5
3
4
Figure 25. P3dB Load Pull Efficiency Contours (%)
0
0
22
21.5
E
--1
20.5
--2
20
19.5
19
--3
P
18.5
1
1.5
2
--26 --24
--22
E
--18
--20
--2
--3
P
--16
18
--4
--30 --28
21
IMAGINARY ()
--1
IMAGINARY ()
68
--4
--4
--5
72
--2
--3
62
--4
2.5
3.5
3
4
--5
1
1.5
2
2.5
3
3.5
REAL ()
REAL ()
Figure 26. P3dB Load Pull Gain Contours (dB)
Figure 27. P3dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
4
Gain
Drain Efficiency
Linearity
Output Power
P3dB -- TYPICAL CARRIER LOAD PULL CONTOURS — 1960 MHz
A2T18S160W31SR3 A2T18S160W31GSR3
14
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
15
A2T18S160W31SR3 A2T18S160W31GSR3
16
RF Device Data
Freescale Semiconductor, Inc.
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
Freescale Semiconductor, Inc.
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A2T18S160W31SR3 A2T18S160W31GSR3
18
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
May 2015
Description
 Initial Release of Data Sheet
A2T18S160W31SR3 A2T18S160W31GSR3
RF Device Data
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19
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A2T18S160W31SR3 A2T18S160W31GSR3
Document Number: A2T18S160W31S
Rev.
20 0, 5/2015
RF Device Data
Freescale Semiconductor, Inc.