INFINEON TLE4998S3C

Data Sheet, Rev 1.1, September 2009
TLE4998S3C
Programmable Linear Hall Sensor
Sensors
N e v e r
s t o p
t h i n k i n g .
Edition 2009-09
Published by Infineon Technologies AG,
Am Campeon 1-12,
85579 Neubiberg, Germany
© Infineon Technologies AG 2009.
All Rights Reserved.
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characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Information
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be endangered.
TLE4998S3C
Revision History:
2009-09
Previous Version:
Data Sheet Rev 1.0
Page
Subjects (major changes since last revision)
Page 12
Table 4: Footnote 3) adapted
Page 14
Table 5: Sensitivity drift description adapted
Page 14
Table 5: Footnote 3) adapted
Page 24
Table 14: Footnote 1) and 2) adapted
General
Package nomenclature changed to PG-SSO-3-92
Rev 1.1
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TLE4998S3C
1
1.1
1.2
1.3
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5
6
6
2
2.1
2.2
2.3
2.4
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Principle of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transfer Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
7
7
8
9
3
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5
Electrical, Thermal, and Magnetic Parameters . . . . . . . . . . . . . . . . . . . 12
Calculation of the Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 14
Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6
6.1
6.2
6.3
6.4
6.5
Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Magnetic Field Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Magnetic Field Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Offset Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DSP Input Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
7.1
7.2
Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Voltages Outside the Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
EEPROM Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8
8.1
Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Parameter Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
9
9.1
9.2
9.3
9.4
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Calibration Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Programming Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Transfer Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Programming of Sensors with Common Supply Lines . . . . . . . . . . . . . . .
10
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
11
PG-SSO-3-92 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
12
12.1
12.2
12.3
SENT Output Definition (SAE J2716) . . . . . . . . . . . . . . . . . . . . . . . . . . .
Basic SENT Protocol Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Unit Time Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Checksum Nibble Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Sheet
4
16
16
16
17
18
18
19
21
26
27
28
28
28
31
31
32
35
Rev 1.1, 2009-09
Programmable Linear Hall Sensor
1
Overview
1.1
Features
TLE4998S3C
• Single Edge Nibble Transmission (SENT) open-drain
output signal (SAE J2716)
• 20-bit Digital Signal Processing (DSP)
• Digital temperature compensation
• 16-bit overall resolution
• Operates within automotive temperature range
• Low drift of output signal over temperature and lifetime
• Programmable parameters stored in EEPROM with
single-bit error correction:
– SENT unit time
– Magnetic range and sensitivity (gain), polarity of the
output slope
– Offset
– Bandwidth
– Clamping levels
– Customer temperature compensation coefficients
– Memory lock
• Re-programmable until memory lock
• Supply voltage 4.5 - 5.5 V (4.1 - 16 V extended range)
• Operation between -200 mT and +200 mT within three
ranges
• Reverse-polarity and overvoltage protection for all pins
• Output short-circuit protection
• On-board diagnostics (overvoltage, EEPROM error, start up)
• Output of internal magnetic field values and temperature
• Programming and operation of multiple sensors with common power supply
• Two-point calibration of magnetic transfer function without iteration steps
• High immunity against mechanical stress, EMC, ESD
• Package with two capacitors: 47nF (VDD to GND) and 4.7nF (OUT to GND)
PG-SSO-3-9x
Type
Marking
Ordering Code
Package
TLE4998S3C
98S3C
SP000481484
PG-SSO-3-92
Data Sheet
5
Rev 1.1, 2009-09
TLE4998S3C
Overview
1.2
Target Applications
• Robust replacement of potentiometers
– No mechanical abrasion
– Resistant to humidity, temperature, pollution and vibration
• Linear and angular position sensing in automotive applications such as pedal position,
suspension control, throttle position, headlight levelling, and steering torque sensing
• Sensing of high current for battery management, motor control, and electronic fuses
1.3
Pin Configuration
Figure 1 shows the location of the Hall element in the chip and the distance between
Hall probe and the surface of the package.
B
2.67
d
0.2 B
A
1.53
Center of
sensitive area
Branded Side
2
Hall-Probe
3
0.2 A
1
d: Distance chip to upper side of IC
0.3 ±0.05 mm
AEP03538
Figure 1
TLE4998x3C Pin Configuration and Hall Cell Location
Table 1
TLE4998S3C Pin Definitions and Functions
Pin No.
Symbol
Function
1
VDD
Supply voltage / programming interface
2
GND
Ground
3
OUT
Output / programming interface
Data Sheet
6
Rev 1.1, 2009-09
TLE4998S3C
General
2
General
2.1
Block Diagram
Figure 2 is a simplified block diagram.
VDD
Supply
Bias
*)
EEPROM
spinning
HALL
Interface
TST
A
D
OUT
DSP
Temp.
Sense
SENT
A
D
GND
ROM
Figure 2
2.2
*) TLE4998S4 only
Block Diagram
Functional Description
The linear Hall IC TLE4998S3C has been designed specifically to meet the requirements
of highly accurate rotation and position detection, as well as for current measurement
applications. Two capacitors are integrated on the lead frame, making this sensor
especially suitable for applications with demanding EMC requirements.
The sensor provides a digital SENT signal based on the SAE J2716 standard, which
consists of a sequence of pulses. Each transmission has a constant number of nibbles
containing the Hall value, the temperature, and status information of the sensor.The
output stage is an open-drain driver pulling the output pin to low only. Therefore, the high
level needs to be obtained by an external pull-up resistor. This output type has the
advantage that the receiver may use an even lower supply voltage (e.g. 3.3 V). In this
case the pull-up resistor must be connected to the given receiver supply.
Data Sheet
7
Rev 1.1, 2009-09
TLE4998S3C
General
The IC is produced in BiCMOS technology with high voltage capability, and it also has
reverse-polarity protection.
Digital signal processing using a 16-bit DSP architecture together with digital
temperature compensation guarantee excellent long-time stability compared to analog
compensation methods.
While the overall resolution is 16 bits, some internal stages work with resolutions up to
20 bits.
2.3
Principle of Operation
• A magnetic flux is measured by a Hall-effect cell
• The output signal from the Hall-effect cell is converted from analog to digital
• The chopped Hall-effect cell and continuous-time A/D conversion ensure a very low
and stable magnetic offset
• A programmable low-pass filter to reduce noise
• The temperature is measured and A/D converted, too
• Temperature compensation is done digitally using a second-order function
• Digital processing of output value is based on zero field and sensitivity value
• The output value range can be clamped by digital limiters
• The final output value is represented by the data nibbles of the SENT protocol
Data Sheet
8
Rev 1.1, 2009-09
TLE4998S3C
General
2.4
Transfer Functions
The examples in Figure 3 show how different magnetic field ranges can be mapped to
the desired output value ranges.
• Polarity Mode:
– Bipolar: Magnetic fields can be measured in both orientations. The limit points
do not necessarily have to be symmetrical around the zero field point
– Unipolar: Only north- or south-oriented magnetic fields are measured
• Inversion: The gain can be set to both positive and negative values
OUT12 /
OUT16
B (mT)
50
4095 /
100
65535
0
0
-50
OUT12 /
OUT16
B (mT)
4095 /
65535
0
0
-100
Example 1:
- Bipolar
Figure 3
Data Sheet
B (mT)
OUT12 /
OUT16
200
4095 /
65535
0
0
-200
Example 2:
- Unipolar
- Big offset
Example 3:
- Bipolar
- Inverted (neg. gain)
Examples of Operation
9
Rev 1.1, 2009-09
TLE4998S3C
Maximum Ratings
3
Maximum Ratings
Table 2
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
min.
Storage temperature
TST
- 40
Unit
Notes
max.
150
°C
1)
Junction temperature
TJ
- 40
170
°C
Voltage on VDD pin with
respect to ground
VDD
-18
18
V
Supply current
@ overvoltage VDD max.
IDDov
-
15
mA
Reverse supply current
@ VDD min.
IDDrev
-1
0
mA
Voltage on output pin with VOUT
respect to ground
-13)
184)
V
Magnetic field
BMAX
-
unlimited
T
ESD protection
VESD
-
8
kV
2)
According HBM
JESD22-A114-B 5)
1)
For limited time of 96 h. Depends on customer temperature lifetime cycles. Please ask for support by Infineon
2)
Higher voltage stress than absolute maximum rating, e.g. 150% in latch-up tests is not applicable. In such
cases, Rseries ≥100 Ω for current limitation is required
3)
IDD can exceed 10 mA when the voltage on OUT is pulled below -1 V (-5 V at room temperature)
4)
VDD = 5 V, open drain permanent low, for max. 10 minutes
5)
100 pF and 1.5 kΩ
Note: Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Data Sheet
10
Rev 1.1, 2009-09
TLE4998S3C
Operating Range
4
Operating Range
The following operating conditions must not be exceeded in order to ensure correct
operation of the TLE4998S3C. All parameters specified in the following sections refer to
these operating conditions, unless otherwise indicated.
Table 3
Operating Range
Parameter
Supply voltage
Symbol Limit Values
VDD
min.
max.
4.5
5.5
1)
2)
Unit
V
4.1
16
V
Vpull-up
-
18
V
RL
1
-
kΩ
Output current3)
IOUT
0
5
mA
Junction temperature
TJ
- 40
125
1504)
°C
Output pull-up voltage3)
Load
resistance3)
Notes
Extended range
For 5000 h
For 1000 h not additive
1)
For reduced output accuracy
2)
For supply voltages > 12 V, a series resistance Rseries ≥ 100 Ω is recommended
3)
Output protocol characteristics depend on these parameters, RL must be according to max. output current
4)
For reduced magnetic accuracy; extended limits are taken for characteristics
Keeping signal levels within the limits specified in this table ensures operation without
overload conditions.
Data Sheet
11
Rev 1.1, 2009-09
TLE4998S3C
Electrical, Thermal, and Magnetic Parameters
5
Electrical, Thermal, and Magnetic Parameters
Table 4
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit Notes
min. typ. max.
VDD-GND capacitor
CVDD
-
47
-
nF
Ceramic
OUT-GND capacitor
CL
-
4.7
-
nF
Ceramic
SENT transmission time tSENT
-
-
1
ms
1)
Supply current
IDD
3
6
8
mA
Output current @ OUT
shorted to supply lines
IOUTsh
-
95
-
mA
Thermal resistance
RthJA
-
190 -
K/W Junction to air
RthJC
-
41
-
K/W Junction to case
Power-on time2)
tPon
-
0.7
15
2
20
ms
Power-on reset level
VDDpon
-
3.6
4
V
Output impedance
ZOUT
19
30
44
kΩ
3)
Output fall time
tfall
2
-
4
µs
VOUT 4.5 V to 0.5 V 4)
Output rise time
trise
-
20
-
µs
VOUT 0.5 V to 4.5 V 4)5)
Output low saturation
voltage
VOUTsat
-
0.3
0.2
0.6
0.4
V
IOUTsink = 5 mA
IOUTsink = 2.2 mA
Output noise (rms)
OUTnoise -
1
2.5
LSB12 6)
VOUT = 5 V, max. 10
minutes
≤ ± 5% target out value
≤ ± 1% target out value
1)
Transmission time depends on the data values being sent and on int. RC oscillator freq. variation of +/- 20%
2)
Response time to set up output data at power on when a constant field is applied. The first value given has a
± 5% error, the second value has a ± 1% error. Measured with 640-Hz low-pass filter
3)
Output impedance is measured ∆VOUT/∆IOUT (∆VOUT=18V ... 4.2V) at VDD = 5V, open-drain high state
4)
For VDD = 5 V, RL = 2.2 kΩ, CL = 4.7 nF (in package), at room temperature, not considering condensator
tolerance or influence of external circuitry
Data Sheet
12
Rev 1.1, 2009-09
TLE4998S3C
Electrical, Thermal, and Magnetic Parameters
5)
Depends on external RL and CL
VOUT
*)
t HIGH
tlow
VDD
90% VDD
10% VDD
VOUTsat
*)
RL to VDD assumed
tfall
6)
trise
t
Range 100 mT, Gain 2.23, internal LP filter 244 Hz, B = 0 mT, T = 25 °C
Data Sheet
13
Rev 1.1, 2009-09
TLE4998S3C
Electrical, Thermal, and Magnetic Parameters
Calculation of the Junction Temperature
The internal power dissipation PTOT of the sensor increases the chip junction
temperature above the ambient temperature.
The power multiplied by the total thermal resistance RthJA (Junction to Ambient) added
to TA leads to the final junction temperature. RthJA is the sum of the addition of the two
components, Junction to Case and Case to Ambient.
RthJA = RthJC + RthCA
TJ = TA + ∆T
∆T = RthJA x PTOT = RthJA x ( VDD x IDD + VOUT x IOUT )
IDD , IOUT > 0, if direction is into IC
Example (assuming no load on Vout):
– VDD = 5 V
– IDD = 8 mA
– ∆T = 190 [K/W] x (5 [V] x 0.008 [A] + 0 [VA] ) = 7.6 K
For moulded sensors, the calculation with RthJC is more adequate.
Magnetic Parameters
Table 5
Magnetic Characteristics
Parameter
Symbol Limit Values
Unit
min.
typ.
max.
Notes
Sensitivity
S1)
± 8.2
-
± 245 LSB12/ Programmable2)
mT
Sensitivity drift
∆S
-
± 80
± 150 ppm/
°C
3)
See Figure 4
Magnetic field range
MFR
± 50
± 1004) ± 200 mT
Programmable 5)
Integral nonlinearity
INL
-
± 0.05
± 0.1
6)8)
Magnetic offset
BOS
-
-
± 400 µT
Magnetic offset drift
∆BOS
-
±1
±5
µT / °C Error band8)
Magnetic hysteresis
BHYS
-
-
10
µT
%MFR
7)8)
9)
1)
Defined as ∆OUT / ∆B
2)
Programmable in steps of 0.024%
3)
For any 1st and 2nd order polynomial, coefficient within definition in Chapter 8. Valid for characterization at 0h
Data Sheet
14
Rev 1.1, 2009-09
TLE4998S3C
Electrical, Thermal, and Magnetic Parameters
4)
This range is also used for temperature and offset pre-calibration of the IC
5)
Depending on offset and gain settings, the output may already be saturated at lower fields
6)
Gain setup is 1.0
7)
In operating temperature range and over lifetime
8)
Measured at ± 100 mT range
9)
Measured in 100 mT range, Gain = 1, room temperature
∆S ~
S(T)/S0-1
max. pos.
TC-error
TCmax = ∆S/∆T
∆S0
0
Tmin
Tmax
T0
Tj
max. neg.
TC-error
TCmin = ∆S/∆T
Figure 4
Data Sheet
Sensitivity drift
15
Rev 1.1, 2009-09
TLE4998S3C
Signal Processing
6
Signal Processing
The signal flow diagram in Figure 5 shows the signal path and data-processing
algorithm.
Range
Gain
LP
Limiter
(Clamp)
Hall
Sensor
Temperature
Sensor
A
D
X
D
+
Protocol
Generation
out
Offset
TC 2
X
X
A
X
1
+
TC 1
-T0
Stored in
EEPROM
Memory
+
X
Temperature
Compensation
Figure 5
Signal Processing Flow
Magnetic Field Path
• The analog output signal of the chopped Hall-effect cell is converted to a digital signal
in the continuous-time A/D converter. The range of the chopped A/D converter can be
set in several steps (see Table 6). This gives a suitable level for the A/D converter
• After the A/D conversion, a digital low-pass filter reduces the bandwidth (Table 10)
• A multiplier amplifies the value depending on the gain (see Table 8) and temperature
compensation settings
• The offset value is added (see Table 9)
• A limiter reduces the resulting signal to 16 bits (see Chapter 11) and feeds the
Protocol Generation stage
Temperature Compensation
(Details are listed in Chapter 8)
• The output signal of the temperature cell is also A/D converted
Data Sheet
16
Rev 1.1, 2009-09
TLE4998S3C
Signal Processing
• The temperature is normalized by subtraction of the reference temperature T0 value
(zero point of the quadratic function)
• The linear path is multiplied with the TC1 value
• In the quadratic path, the temperature difference to T0 is squared and multiplied with
the TC2 value
• Both path outputs are added together and multiplied with the Gain value from the
EEPROM
6.1
Magnetic Field Ranges
The working range of the magnetic field defines the input range of the A/D converter. It
is always symmetrical around the zero field point. Any two points in the magnetic field
range can be selected to be the end points of the output value. The output value is
represented within the range between the two points.
In the case of fields higher than the range values, the output signal may be distorted. The
range must be set before the calibration of offset and gain.
Table 6
Range Setting
Range
Range in mT1)
Parameter R
Low
± 50
3
Mid
± 100
12)
High
± 200
0
1)
Ranges do not have a guaranteed absolute accuracy. The temperature pre-calibration is performed in the mid
range (100 mT)
2)
Setting R = 2 is not used, internally changed to R = 1
Table 7
Parameter
Range
Symbol Limit Values
min.
Register size
Data Sheet
R
Unit
Notes
max.
2
17
bit
Rev 1.1, 2009-09
TLE4998S3C
Signal Processing
6.2
Gain Setting
The overall sensitivity is defined by the range and the gain setting. The output of the ADC
is multiplied with the Gain value.
Table 8
Gain
Parameter
Symbol Limit Values
min.
Register size
Gain range
- 4.0
Gain
Gain quantization steps ∆Gain
Notes
bit
Unsigned integer value
-
1)2)
ppm
Corresponds to 1/4096
max.
15
G
Unit
3.9998
244.14
1)
For Gain values between - 0.5 and + 0.5, the numerical accuracy decreases
To obtain a flatter output curve, it is advisable to select a higher range setting
2)
A gain value of +1.0 corresponds to typical 32 LSB12/mT sensitivity (100 mT range, not guaranteed). It is
crucial to do a final calibration of each IC within the application using the Gain/OUTOS value
The Gain value can be calculated by:
:
( G – 16384 )
Gain = -----------------------------4096
6.3
Offset Setting
The offset value corresponds to an output value with zero field at the sensor.
Table 9
Offset
Parameter
Symbol
Limit Values
min.
Register size
Offset range
Offset quantization
steps
1)
Unit
Notes
bit
Unsigned integer value
LSB12
1)
max.
15
OS
OUTOS -16384 16383
∆OUTOS
1
LSB12
Infineon pre-calibrates the samples at zero field to 50% output value (100 mT range), but does not guarantee
the value. Therefore it is crucial to do a final calibration of each IC within the application
The offset value can be calculated by:
OUT OS = OS – 16384
Data Sheet
18
Rev 1.1, 2009-09
TLE4998S3C
Signal Processing
6.4
DSP Input Low-Pass Filter
A digital low-pass filter is placed between the Hall A/D converter and the DSP, and can
be used to reduce the noise level. The low-pass filter has a constant DC amplification of
0 dB (Gain of 1), which means that its setting has no influence on the internal Hall ADC
value.
The bandwidth can be set to any of 8 values.
Table 10
Low Pass Filter Setting
Cutoff frequency in Hz (-3dB point)1)
Note: Parameter LP
0
80
1
240
2
440
3
640
4
860
5
1100
6
1390
7
off
1)
As this is a digital filter running with an RC-based oscillator, the cutoff frequency may vary within ±20%
Table 11
Low-Pass Filter
Parameter
Symbol Limit Values
min.
Register size
Corner frequency
variation
LP
∆f
- 20
Unit
Notes
max.
3
bit
+ 20
%
Note: In range 7 (filter off), the output noise increases.
Data Sheet
19
Rev 1.1, 2009-09
TLE4998S3C
Signal Processing
Figure 6 shows the filter characteristics as a magnitude plot (the highest setting is
marked). The “off” position would be a flat 0 dB line. The update rate after the low-pass
filter is 16 kHz.
0
Magnitude (dB)
-1
-2
-3
-4
-5
-6
101
2
10
10
3
Frequency (Hz)
Figure 6
Data Sheet
DSP Input Filter (Magnitude Plot)
20
Rev 1.1, 2009-09
TLE4998S3C
Signal Processing
6.5
Clamping
The clamping function is useful for separating the output range into an operating range
and error ranges. If the magnetic field is exceeding the selected measurement range, the
output value OUT is limited to the clamping values. Any value in the error range is
interpreted as an error by the sensor counterpart.
Table 12
Clamping
Parameter
Symbol
Limit Values
min.
Register size
Clamping value low
Clamping value high
Clamping quantization
steps
CL,CH
OUTCL
OUTCH
∆OUTCx
Unit
Notes
bit
(0...127)
max.
2x7
0
65024
LSB16
1)
511
65535
LSB16
1) 2)
LSB16
3)
512
1)
For CL = 0 and CH = 127, the clamping function is disabled
2)
OUTCL < OUTCH mandatory
3)
Quantization starts for CL at 0 LSB16 and for CH at 65535 LSB16
The clamping values are calculated by:
Clamping value low (deactivated if CL=0):
OUT CL = CL ⋅ 32 ⋅ 16
Clamping value high (deactivated if CH=127):
OUT CH = ( CH + 1 ) ⋅ 32 ⋅ 16 – 1
Data Sheet
21
Rev 1.1, 2009-09
TLE4998S3C
Signal Processing
Figure 7 shows an example in which the magnetic field range between Bmin and Bmax
is mapped to output values between 10240 LSB16 and 55295 LSB16.
OUT (LSB16)
65535
Error range
OUTCH
55295
Operating range
OUTCL
10240
Error range
0
Bmax
Bmin
B (mT)
Figure 7
Clamping Example
Note: The clamping high value must be above the low value.
Data Sheet
22
Rev 1.1, 2009-09
TLE4998S3C
Error Detection
7
Error Detection
Different error cases can be detected by the On-Board Diagnostics (OBD) and reported
to the microcontroller in the status nibble (see Chapter 11).
7.1
Voltages Outside the Operating Range
The output signals an error condition if VDD crosses the overvoltage threshold level.
Table 13
Overvoltage
Parameter
Symbol
Limit Values
min.
Overvoltage threshold
1)
VDDov
typ.
16.65 17.5
Unit
Notes
max.
18.35 V
1)
Overvoltage bit activated in status nibble, output stays in “off” state (high ohmic)
7.2
EEPROM Error Correction
The parity method is able to correct a single bit in the EEPROM line. One other single bit
error in another EEPROM line can also be detected, but not corrected. In an
uncorrectable EEPROM failure, the open drain stage is disabled and kept in the off state
permanently (high ohmic/sensor defect).
Data Sheet
23
Rev 1.1, 2009-09
TLE4998S3C
Temperature Compensation
8
Temperature Compensation
The magnetic field strength of a magnet depends on the temperature. This material
constant is specific for the different magnet types. Therefore, the TLE4998S3C offers a
second-order temperature compensation polynomial, by which the Hall signal output is
multiplied in the DSP. There are three parameters for the compensation:
• Reference temperature T0
• A linear part (1st order) TC1
• A quadratic part (2nd order) TC2
The following formula describes the sensitivity dependent on the temperature in relation
to the sensitivity at the reference temperature T0:
S TC ( T ) = 1 + TC 1 × ( T – T 0 ) + TC 2 × ( T – T0 )
2
For more information, please refer to the signal processing flow in Figure 5.
The full temperature compensation of the complete system is done in two steps:
1. Pre-calibration in the Infineon final test
The parameters TC1, TC2, T0 are set to maximally flat temperature characteristics
with respect to the Hall probe and internal analog processing parts.
2. Overall system calibration
The typical coefficients TC1, TC2, T0 of the magnetic circuitry are programmed. This
can be done deterministically, as the algorithm of the DSP is fully reproducible. The
final setting of the TC1, TC2, T0 values depend on the pre-calibrated values.
Table 14
Temperature Compensation
Parameter
Register size TC1
1st order coefficient TC1
Quantization steps of TC1
Register size TC2
2nd order coefficient TC2
Quantization steps of TC2
Reference temp.
Quantization steps of T0
Symbol Limit Values Unit
Notes
min.
max.
TL
TC1
qTC1
-
9
TQ
TC2
qTC2
T0
qT0
-
8
bit
Unsigned integer values
-4
4
ppm/ °C²
2)
bit
Unsigned integer values
-1000 2500
ppm/ °C
1)
15.26
ppm/ °C
0.119
- 48
64
1
ppm/ °C²
°C
°C
3)
1)
Relative range to Infineon TC1 temperature pre-calibration, the maximum adjustable range is limited by the
register-size and depends on specific pre-calibrated TL setting, full adjustable range: -2441 to +5355 ppm/°C
2)
Relative range to Infineon TC2 temperature pre-calibration, the maximum adjustable range is limited by the
register-size and depends on specific pre-calibrated TQ setting, full adjustable range: -15 to +15 ppm/°C2
Data Sheet
24
Rev 1.1, 2009-09
TLE4998S3C
Temperature Compensation
3)
Handled by algorithm only (see Application Note)
8.1
Parameter Calculation
The parameters TC1 and TC2 may be calculated by:
TL – 160
TC 1 = ---------------------- × 1000000
65536
TQ – 128
TC 2 = ----------------------- × 1000000
8388608
Now the digital output for a given field BIN at a specific temperature can be calculated by:
 B IN

- × S TC × S TCHall × S 0 × 4096 + OUT OS
OUT = 2 ⋅  ----------- B FSR

BFSR is the full-range magnetic field. It is dependent on the range setting (e.g 100 mT).
S0 is the nominal sensitivity of the Hall probe times the Gain factor set in the EEPROM.
STC is the temperature-dependent sensitivity factor calculated by the DSP.
STCHall is the temperature behavior of the Hall probe.
The pre-calibration at Infineon is performed such that the following condition is met:
S TC ( T J – T 0 ) × S TCHall ( T J ) ≈ 1
Within the application, an additional factor BIN(T) / BIN(T0) is given due to the magnetic
system. STC then needs to be modified to STCnew so that the following condition is
satisfied:
B IN ( T )
-------------------× S TCnew ( T ) × S TCHall ( T ) ≈ S TC ( T ) × S TCHall ( T ) ≈ 1
B IN ( T 0 )
Therefore, the new sensitivity parameters STCnew can be calculated from the precalibrated setup STC using the relationship:
B IN ( T )
-------------------× S TCnew ( T ) ≈ S TC ( T )
B IN ( T 0 )
Data Sheet
25
Rev 1.1, 2009-09
TLE4998S3C
Calibration
9
Calibration
For the calibration of the sensor, a special hardware interface to a PC is required. All
calibration and setting bits can be temporarily written into a Random Access Memory
(RAM). This allows the EEPROM to remain untouched during the entire calibration
process, since the number of the EEPROM programming cycles is limited. Therefore,
this temporary setup (using the RAM only) does not stress the EEPROM.
The digital signal processing is completely deterministic. This allows a two-point
calibration to be performed in one step without iterations. After measuring the Hall output
signal for the two end points, the signal processing parameters Gain and Offset can be
calculated.
Table 15
Calibration Characteristics
Parameter
Symbol
1)
Unit
Notes
min.
max.
10
30
°C
∆OUTCAL1 -8
8
LSB12
Position 1
∆OUTCAL2 -8
8
LSB12
Position 2
Ambient temperature at TCAL
calibration
2 point Calibration
accuracy1)
Limit Values
Corresponds to ± 0.2% accuracy in each position
Data Sheet
26
Rev 1.1, 2009-09
TLE4998S3C
Calibration
9.1
Calibration Data Memory
When the MEMLOCK bits are programmed (two redundant bits), the memory content is
frozen and may no longer be changed. Furthermore, the programming interface is locked
out and the chip remains in application mode only, preventing accidental programming
due to environmental influences.
Row Parity Bits
Column Parity Bits
User-Calibration Bits
Pre-Calibration Bits
Figure 8
EEPROM Map
A matrix parity architecture allows automatic correction of any single-bit error. Each row
is protected by a row parity bit. The sum of bits set (including this bit) must be an odd
number (ODD PARITY). Each column is additionally protected by a column parity bit.
Each bit in the even positions (0, 2, etc.) of all lines must sum up to an even number
(EVEN PARITY), and each bit in the odd positions (1, 3, etc.) must have an odd sum
(ODD PARITY). The parity column must have an even sum (EVEN PARITY).
This system of different parity calculations also protects against many block errors (such
as erasing a full line or even the whole EEPROM).
When modifying the application bits (such as Gain, Offset, TC, etc.), the parity bits must
be updated. As for the column bits, the pre-calibration area must be read out and
considered for correct parity generation as well.
Note: A specific programming algorithm must be followed to ensure data retention.
A detailed separate programming specification is available on request.
Data Sheet
27
Rev 1.1, 2009-09
TLE4998S3C
Calibration
Table 16
Programming Characteristics
Parameter
Symbol Limit Values
Number of EEPROM
programming cycles
NPRG
Ambient temperature at TPRG
programming
Unit
Notes
min.
max.
-
10
Cycles1) Programming allowed
only at start of lifetime
10
30
°C
100
-
ms
For complete memory 2)
Programming time
tPRG
Calibration memory
-
150
Bit
All active EEPROM bits
Error Correction
-
26
Bit
All parity EEPROM bits
1)
1 cycle is the simultaneous change of ≥ 1 bit
2)
Depending on clock frequency at VDD, write pulse 10 ms ±1%, erase pulse 80 ms ±1%
9.2
Programming Interface
The VDD pin and the OUT pin are used as a two-wire interface to transmit the EEPROM
data to and from the sensor.
This allows:
• Communication with high data reliability, parity protected
• The bus-type connection of several sensors and separate programming via the OUT
pin
9.3
Data Transfer Protocol
The data transfer protocol is described in a separate document (User Programming
Description), available on request.
9.4
Programming of Sensors with Common Supply Lines
In many automotive applications, two sensors are used to measure the same parameter.
This redundancy makes it possible to continue operation in an emergency mode. If both
sensors use the same power supply lines, they can be programmed together in parallel.
Data Sheet
28
Rev 1.1, 2009-09
TLE4998S3C
Application Circuit
10
Application Circuit
Figure 9 shows the connection of multiple sensors to a microcontroller.
Sensor
Module
Voltage Supply
Sensor
Voltage Supply
µC
ECU
Module
µC
VDD
Vdd
VDD
TLE out
4998x3C
2k2
OUT1
50
CCin1
GND
1n
GND
VGND
CCin2
2k2
V DD
TLE out
4998x3C
OUT2
50
GND
Figure 9
optional
1n
Application Circuit
Note: For calibration and programming, the interface has to be connected directly to the
OUT pin.
The application circuit shown should be regarded as an example only. It will need to be
adapted to meet the requirements of other specific applications.
Data Sheet
29
Rev 1.1, 2009-09
TLE4998S3C
PG-SSO-3-92 Package Outlines
PG-SSO-3-92 Package Outlines
5.34 ±0.05
5.16 ±0.08
B
1 x 45˚ ±1˚
0.2
2A
1.905
B
0.25 ±0.05
C
7˚ ±2˚
A
C
2.2 ±0.05
A
0.1
0.2 +0.04
0.35 ±0.05
(8.17)
0.87±0.05
5.67±0.1
1.67±0.05
7.07±0.1
0.6 MAX.
1.9 MAX.
0.4 ±0.05
1 MAX.1)
0.2 B
(2.68)
2x
0.2 B
(2.2)
0.65 ±0.1
(0.25)
7˚
B
1-0.1
7˚
1.905
3.38 ±0.06
0.1 MAX.
1.9 MAX.
3.71±0.08
11
5.34 ±0.05
5.16 ±0.08
0.9 ±0.05
1
1.655
2
0.2 B
1.2 ±0.05
0.2 B 3x
3
2 x 1.655 = 3.31
7˚
(0.52)
Capacitor
(1.75)
45˚ ±1˚
(1.75)
C-C
(4.35)
Burr MAX 0.15
5.16 ±0.08
Burr MAX 0.15
Burr MAX 1.1
B 0.2
1-1
6 ±0.5
18 ±0.5
9 +0.75
-0.5
38 MAX.
2 C
(14.8)
(Useable Length)
23.8 ±0.5
12.7 ±1
Burr MAX 1.1
(0.9)
B-B
15˚ ±2˚
(1.75)
A-A
A
Adhesive
Tape
Tape
6.35 ±0.4
4 ±0.3
12.7 ±0.3
Total tolerance at 10 pitches ±1
1) No solder function area
Figure 10
Data Sheet
0.25 -0.15
0.39 ±0.1
P/PG-SSO-3-9x-PO V07
PG-SSO-3-92 (Plastic Green Single Small Outline Package)
30
Rev 1.1, 2009-09
TLE4998S3C
SENT Output Definition (SAE J2716)
12
SENT Output Definition (SAE J2716)
The sensor supports a basic version of the Single Edge Nibble Transmission (SENT)
protocol defined by SAE. The main difference between the standard version and its
implementation in the TLE4998 is the usage of an open drain instead of a push-pull
output.
12.1
Basic SENT Protocol Definition
The single edge is defined by a 3 unit time (UT) low pulse on the output, followed by the
high time defined in the protocol (nominal values, may vary by tolerance of internal RC
oscillator, not including analog delay of the open drain output and influence by external
circuitry, unit time programming see Section 12.2). All values are multiples of a unit time
frame concept. A transfer consists of the following parts:
•
•
•
•
•
A synchronization period of 56 UT (in parallel, a new sample is calculated)
A status nibble of 12-27 UT
Three data nibbles of 12-27 UT (data packet 1 with a length of 36-81 UT)
Three data nibbles of 12-27 UT (data packet 2 with a length of 36-81 UT)
A CRC nibble of 12-27 UT
Sensor processing
compensate the sample
transfer compensated sample
Output pin (physical)
Next sampe
Sampling point:
values taken from
decimation filter
register
Transferred data (logical)
sync. period
Figure 11
Status
nibble
Data
nibble 1
high
Data
nibble 1
mid
Data
nibble 2
low
CRC
nibble
SENT Frame
The CRC checksum includes the status nibble and the data nibbles and can be used to
check the validity of the decoded data. The sensor is available for the next sample 90µs
after the falling edge of the end pulse. This leads to a minimum transfer time of 152 UT,
and a maximum transfer time of 272 UT per sample.
Data Sheet
31
Rev 1.1, 2009-09
TLE4998S3C
SENT Output Definition (SAE J2716)
It is important to know that the sampling time (when values are taken for temperature
compensation) here is always defined as the beginning of the synchronization period;
during this period, the resulting data is always calculated from scratch.
As only one Hall value needs to be transferred within one sequence, the second data
package is divided into two parts (see Table 19):
• First, the remaining 4 LSBs of the Hall signals are transferred in the first data nibble.
This means the receiver may use the whole 16-bit data available in the sensor when
reading and using all 4 nibbles transferred.
• Second, the temperature is transferred as an 8-bit value. The value is transferred in
unsigned integer format and corresponds to -55°C to 200°C. For example, transferring
the value 55 corresponds to 0°C. The temperature is additional information and
although it is not calibrated, may be used for a plausibility check, for example.
Table 17
Mapping of Temperature Value
Junction Temperature Typ. Decimal Value from Sensor Note
- 55°C
0
0°C
55
25°C
80
200°C
255
1)
Theoretical lower limit1)
Theoretical upper limit1)
Theoretical range of temperature values, not operating temperature range
The status nibble allows to check internal states and conditions of the sensor.
• The first two bits of the status nibble contain the selected magnetic range of the sensor
and therefore allow the received data to be interpreted easily.
• The third bit is set to “1” for the first transmission after the sensor returns from an
overvoltage operation with disabled open drain stage to regular operation (see
Chapter 7.1).
• The fourth bit is switched to “1” for the first data package transferred after a reset. This
allows the detection of low-voltage situations or EMC problems of the sensor.
12.2
Unit Time Setup
The basic SENT protocol unit time granularity is defined as 3 µs. Every timing is a
multiple of this basic time unit. To achieve more flexibility, trimming of the unit time can
be used to:
• Allow a calibration trim within a timing error of less than 20% clock error (as given in
SAE standard)
• Allow a modification of the unit time for small speed adjustments
Data Sheet
32
Rev 1.1, 2009-09
TLE4998S3C
SENT Output Definition (SAE J2716)
This enables a setup of different unit times, even if the internal RC oscillator varies by
±20%. Of course, timing values that are too low could clash with timing requirements of
the application and should therefore be avoided, but in principle it is possible to adjust
the timer unit for a more precise protocol timing. The output characteristic depends on
the external load, the wiring, as well on the pull-up voltage and the temperature. All these
parameters have considerable influence to find the proper unit time setup.
Table 18
Parameter
Predivider Setting
Symbol
Limit Values
min.
Register size
Prediv
Unit time
tUNIT
2.0
Unit
Notes
4
bit
Predivider1)
4.0
µs
ClkUNIT=8MHz2)
max.
1)
Useable predivider range is decimal 7 to 15. Prediv < 7 is internally kept at 7. Prediv default is decimal = 11 for
3 µs nominal unit time
2)
RC oscillator frequency variation +/- 20%
The nominal unit time is calculated by:
tUNIT = (Prediv × 2 + 2) / ClkUNIT
ClkUNIT = 8MHz ±20%
Data Sheet
33
Rev 1.1, 2009-09
TLE4998S3C
SENT Output Definition (SAE J2716)
Table 19
Content of a SENT Data Frame (8 Nibbles)
DATA WORD 1
SYNC
bits
STATUS
D1 MSN
D1 MidN
DATA WORD 2
D1 LSN
D2 MSN
D2 MidN
description
D2 LSN
CRC
description
state
range
status and current range
10
RR
startup condition in range RR
01
RR
overvoltage in range RR
CRC calculation
for all nibbles on the
basis of SAE J2716
00
RR
normal state using range RR
seed value: 0101
4
3
2
polynomial: X +X +X +1
bits
description
11
+/- 50mT
01
+/- 100mT
00
+/- 200mT
bits
description1
description 2
decimal: OUT12
decimal: OUT16
( = D1MSN*256 +D1MidN*16+D1LSN )
( = OUT12*16+D2MSN )
1111
4095 (FSR)
1110
4095
1111
:
1111
1111
1111
1111
1111
1111
1111
D1 MSN
D1 MidN
D1 LSN
D2MSN
1111
1111
1111
1111
1111
1111
1111
1111
1111
bits
description
decimal: TEMP8
D2MidN
D2LSN
65535 (FSR)
1111
1111
200 °C
65534
1111
1110
199 °C
4095
:
1111
:
:
0000
4095
65520
1111
0000
185 °C
1110
1111
4094
65519
1110
1111
184 °C
1110
1110
4094
65518
:
:
:
1111
1110
:
4094
:
0101
0000
25 °C
1111
1111
1110
0000
4094
65504
0100
1111
24 °C
1111
1111
1101
1111
4093
65503
:
:
:
:
:
:
:
:
:
0011
0111
0°C
0000
0000
0010
0000
2
32
0011
0110
-1°C
0000
0000
0001
1111
1
31
:
:
:
0000
0000
0001
:
1
:
0000
0001
-54 °C
0000
0000
0001
0000
1
16
0000
0000
-55 °C
0000
0000
0000
1111
0
15
0000
0000
0000
1110
0
14
0000
0000
0000
:
0
:
0000
0000
0000
0001
0
1
0000
0000
0000
0000
0
0
Data Sheet
34
( = D2MidN* 16+D2LSN )
Abbreviations:
SYNC – synchronization nibble
STATUS – status nibble
CRC – cyclic redundancy code nibble
FSR – full scale range
MSN – most significant nibble
MidN – middle nibble
LSN – least significant nibble
OUT12 – 12 bit output value
OUT16 – 16 bit output value
TEMP8 – 8 bit temperature value
Rev 1.1, 2009-09
TLE4998S3C
SENT Output Definition (SAE J2716)
12.3
Checksum Nibble Details
The Checksum nibble is a 4-bit CRC of the data nibbles including the status nibble. The
CRC is calculated using a polynomial x4 +x3 + x2 + 1 with a seed value of 0101.
In the TLE4998S3C it is implemented as a series of XOR and shift operations as shown
in the following flowchart:
CRC calculation
Pre-initialization :
Nibble
next Nibble
VALUE
GENERATOR = 1101
xor
SEED = 0101 , use this
constant as old CRC
value at first call
SEED
<<1
VALUE
VALUExor
xorSEED
SEED
0
4x
xor only if MSB = 1
GENPOLY
Figure 12
CRC Calculation
A microcontroller implementation may use an XOR command plus a small 4-bit lookup
table to calculate the CRC for each nibble.
// Fast way for any µC with low memory and compute capabilities
char Data[8] = {…}; // contains the input data (status nibble , 6 data nibble , CRC)
// required variables and LUT
char CheckSum, i;
char CrcLookup[16] = {0, 13, 7, 10, 14, 3, 9, 4, 1, 12, 6, 11, 15, 2, 8, 5};
CheckSum= 5; // initialize checksum with seed "0101"
for (i=0; i<7; i++) {
CheckSum = CheckSum ^ Data[i];
CheckSum = CrcLookup[CheckSum];
}
; // finally check if Data [7] is equal to CheckSum
Figure 13
Data Sheet
Example Code for CRC Generation
35
Rev 1.1, 2009-09
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG