INTEGRATED CIRCUITS DATA SHEET TDA8002 IC card interface Product specification Supersedes data of 1997 Mar 13 File under Integrated Circuits, IC02 1997 Nov 04 Philips Semiconductors Product specification IC card interface TDA8002 • Supply supervisor for spikes elimination and emergency deactivation. FEATURES • Single supply voltage interface (3.3 or 5 V environment) • Low-power sleep mode APPLICATIONS • Three specific protected half-duplex bidirectional buffered I/O lines • IC card readers for: • VCC regulation (5 V ±5%, ICC <65 mA at VDD = 5 V, with controlled rise and fall times – GSM applications – banking • Thermal and short-circuit protections with current limitations – electronic payment • Automatic ISO 7816 activation and deactivation sequences – Pay TV – identification – road tolling. • Enhanced ESD protections on card side (>6 kV) • Clock generation for the card up to 12 MHz with synchronous frequency changes GENERAL DESCRIPTION • Clock generation up to 20 MHz (auxiliary clock) The TDA8002 is a complete low-power, analog interface for asynchronous and synchronous cards. It can be placed between the card and the microcontroller. It performs all supply, protection and control functions. It is directly compatible with ISO 7816, GSM11.11 and EMV specifications. • Synchronous and asynchronous cards (memory and smart cards) • ISO 7816, GSM11.11 compatibility and EMV (Europay, Mastercard, Visa) compliant • Step-up converter for VCC generation QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDDA analog supply voltage IDD supply current 3.0 5 6.5 V sleep mode − − 150 µA idle mode; fCLK = 2.5 MHz; fCLKOUT = 10 MHz; VDD = 5 V − − 6 mA active mode; fCLK = 2.5 MHz; fCLKOUT = 10 MHz; VDD = 5 V − − 9 mA active mode; fCLK = 2.5 MHz; fCLKOUT = 10 MHz; VDD = 3 V − − 12 mA Card supply VCC(O) output voltage DC load <65 mA 4.75 − 5.25 V ICC(O) output current VCC short-circuited to GND − − 100 mA General fCLK card clock frequency 0 − 12 MHz Tde deactivation cycle time 60 80 100 µs Ptot continuous total power dissipation Tamb 1997 Nov 04 TDA8002AT; TDA8002BT Tamb = −25 to +85 °C − − 0.56 W TDA8002G Tamb = −25 to +85 °C − − 0.46 W −25 − +85 °C operating ambient temperature 2 Philips Semiconductors Product specification IC card interface TDA8002 ORDERING INFORMATION PACKAGE TYPE NUMBER(1) MARKING NAME TDA8002AT/3/C2(2) TDA8002AT/3 SO28 TDA8002AT/5/C2(3) TDA8002AT/5 TDA8002BT/3/C2(2) TDA8002BT/3 DESCRIPTION plastic small outline package; 28 leads; body width 7.5 mm VERSION SOT136-1 TDA8002BT/5/C2(3) TDA8002BT/5 TDA8002G/3/C2(2) 80023 TDA8002G/5/C2(3) 80025 LQFP32 plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm SOT401-1 Notes 1. The /3 or /5 suffix indicates the voltage supervisor option. 2. The /3 version can be used with a 3 or 5 V power supply environment (see Chapter “Functional description”). 3. The /5 version can be used with a 5 V power supply environment. 1997 Nov 04 3 Philips Semiconductors Product specification IC card interface TDA8002 BLOCK DIAGRAM handbook, full pagewidth VDDA VDDD 100 nF 100 nF 28 13 100 nF S1 S2 14 12 SUPPLY ALARM ALARM 4 3 STEP-UP CONVERTER INTERNAL REFERENCE VREF INTERNAL OSCILLATOR fINT 15 VUP 100 nF VOLTAGE SENSE ALARM OFF RSTIN CMDVCC MODE EN1 CLKUP EN2 26 PVCC 25 VCC GENERATOR 23 RST BUFFER 22 24 27 EN5 SEQUENCER CLKDIV1 CLKDIV2 CLKSEL STROBE CLKOUT VCC 100 nF 19 6 7 18 5 8 RST PRES PRES HORSEQ CLOCK CIRCUITRY EN4 9 CLOCK BUFFER 21 CLK CLK XTAL1 XTAL2 AUX1UC EN3 30 31 THERMAL PROTECTION OSCILLATOR I/O TRANSCEIVER 20 2 I/O TRANSCEIVER 17 32 I/O TRANSCEIVER 16 1 AUX1 TDA8002G AUX2UC I/OUC 10 29 11 MGE730 DGND1 DGND2 AGND All capacitors are mandatory. Fig.1 Block diagram (TDA8002G). 1997 Nov 04 4 AUX2 I/O Philips Semiconductors Product specification IC card interface TDA8002 PINNING PIN SYMBOL I/O DESCRIPTION TYPE A TYPE B TYPE G XTAL1 1 1 30 I/O crystal connection or input for external clock XTAL2 2 2 31 I/O crystal connection I/OUC 3 3 32 I/O data I/O line to and from microcontroller AUX1UC 4 4 1 I/O auxiliary line to and from microcontroller for synchronous applications AUX2UC 5 − 2 I/O auxiliary line to and from microcontroller for synchronous applications ALARM − 5 3 O open drain NMOS reset output for microcontroller (active LOW) ALARM 6 6 4 O open drain PMOS reset output for microcontroller (active HIGH) CLKSEL 7 7 5 I control input signal for CLK (LOW = XTAL oscillator; HIGH = STROBE input) CLKDIV1 8 8 6 I control input with CLKDIV2 for choosing CLK frequency CLKDIV2 9 9 7 I control input with CLKDIV1 for choosing CLK frequency STROBE 10 10 8 I external clock input for synchronous applications clock output (see Table 1) CLKOUT 11 11 9 O DGND1 12 12 10 supply digital ground 1 AGND 13 13 11 supply analog ground S2 14 14 12 I/O VDDA 15 15 13 supply capacitance connection for voltage doubler S1 16 16 14 I/O capacitance connection for voltage doubler VUP 17 17 15 I/O output of voltage doubler (connect to 100 nF) I/O 18 18 16 I/O data I/O line to and from card AUX2 19 − 17 I/O auxiliary I/O line to and from card PRES 20 19 18 I active LOW card input presence contact PRES − 20 19 I active HIGH card input presence contact AUX1 21 21 20 I/O auxiliary I/O line to and from card CLK 22 22 21 O clock to card output (C3) (see Table 1) analog supply voltage RST 23 23 22 O card reset output (C2) VCC 24 24 23 O supply for card (C1) (decouple with 100 nF) CMDVCC 25 25 24 I active LOW start activation sequence input from microcontroller RSTIN 26 26 25 I card reset input from microcontroller OFF 27 27 26 O open drain NMOS interrupt output to microcontroller (active LOW) MODE 28 28 27 I operating mode selection input (HIGH = normal; LOW = sleep) VDDD − − 28 supply digital supply voltage DGND2 − − 29 supply digital ground 2 1997 Nov 04 5 Philips Semiconductors Product specification IC card interface TDA8002 handbook, halfpage handbook, halfpage XTAL1 1 28 MODE XTAL1 1 28 MODE XTAL2 2 27 OFF XTAL2 2 27 OFF I/OUC 3 26 RSTIN I/OUC 3 26 RSTIN AUX1UC 4 25 CMDVCC AUX1UC 4 25 CMDVCC AUX2UC 5 24 VCC ALARM 5 24 VCC ALARM 6 23 RST ALARM 6 23 RST CLKSEL 7 22 CLK CLKSEL 7 22 CLK TDA8002B TDA8002A CLKDIV1 8 21 AUX1 CLKDIV1 8 21 AUX1 CLKDIV2 9 20 PRES CLKDIV2 9 20 PRES STROBE 10 19 AUX2 STROBE 10 19 PRES CLKOUT 11 18 I/O CLKOUT 11 18 I/O DGND1 12 DGND1 12 17 VUP AGND 13 AGND 13 16 S1 15 VDDA S2 14 16 S1 15 VDDA S2 14 MGE732 MGE731 25 RSTIN 26 OFF 27 MODE 28 VDDD 29 DGND2 30 XTAL1 handbook, full pagewidth Fig.3 Pin configuration (TDA8002B). 31 XTAL2 32 I/OUC Fig.2 Pin configuration (TDA8002A). AUX1UC 1 24 CMDVCC AUX2UC 2 23 VCC ALARM 3 22 RST ALARM 4 21 CLK TDA8002G 18 PRES STROBE 8 17 AUX2 CLKOUT I/O 16 7 VUP 15 CLKDIV2 S1 14 19 PRES VDDA 13 6 S2 12 CLKDIV1 AGND 11 20 AUX1 DGND1 10 5 9 CLKSEL Fig.4 Pin configuration (TDA8002G). 1997 Nov 04 17 VUP 6 MGE733 Philips Semiconductors Product specification IC card interface TDA8002 FUNCTIONAL DESCRIPTION Clock circuitry Power supply The TDA8002 supports both synchronous and asynchronous cards (I2C-bus memories requiring an acknowledge signal from the master are not supported). There are three methods to clock the circuitry: The supply pins for the chip are VDDA, VDDD, AGND, DGND1 and DGND2. VDDA and VDDD (i.e. VDD) should be in the range of 3.0 to 6.5 V. All card contacts remain inactive during power-up or power-down. • Apply a clock signal to pin STROBE • Use of an internal RC oscillator On power-up, the logic is reset by an internal signal. The sequencer is not activated until VDD reaches Vth2 + Vhys2 (see Fig.5). When VDD falls below Vth2, an automatic deactivation sequence of the contacts is performed. • Use of a quartz oscillator which should be connected between pins XTAL1 and XTAL2. When CLKSEL is HIGH, the clock should be applied on the STROBE pin, and when CLKSEL is LOW, one of the internal oscillators is used. Supply voltage supervisor (VDD) When an internal clock is used, the clock output is available on pin CLKOUT. The RC oscillator is selected by making CLKDIV1 HIGH and CLKDIV2 LOW. The clock output to the card is available on pin CLK. The frequency of the card clock can be the input frequency divided by 2 or 4, STOP LOW or 1.25 MHz, depending on the states of CLKDIV1 or CLKDIV2 (see Table 1). This block surveys the VDD supply. A defined reset pulse of 10 ms minimum (tW) can be retriggered and is delivered on the ALARM outputs during power-up or power-down of VDD (see Fig.5). This signal is also used for eliminating the spikes on card contacts during power-up or power-down. When VDD reaches Vth2 + Vhys2, an internal delay is started. The ALARM outputs are active until this delay has expired. When VDD falls below Vth2, ALARM is activated and a deactivation sequence of the contacts is performed. Do not change CLKSEL during activation. When in low-power (sleep) mode, the internal oscillator frequency which is available on pin CLKOUT is lowered to approximately 16 kHz for power-economy purposes. For 3 V supply, the supervisor option must be chosen at 3 V. For 5 V supply, both options (3 or 5 V) may be chosen depending on the application. handbook, full pagewidth Vth2 + Vhys2 VDD Vth2 tW tW ALARM ALARM MGE734 Fig.5 Alarm as a function of VDD (pulse width 10 ms). 1997 Nov 04 7 Philips Semiconductors Product specification IC card interface Table 1 TDA8002 Clock circuitry definition FREQUENCY OF CLK FREQUENCY OF CLKOUT 1⁄ f 2 int HIGH 1⁄ f 2 int 1⁄ f 4 xtal 1⁄ f 2 xtal HIGH STOP LOW fxtal HIGH X(1) X(1) STROBE X(1) X(1) X(1) MODE CLKSEL CLKDIV1 CLKDIV2 HIGH LOW HIGH LOW HIGH LOW LOW LOW HIGH LOW LOW HIGH LOW HIGH HIGH LOW(2) fxtal fxtal fxtal 1⁄ STOP LOW (3) 2fint Notes 1. X = don’t care. 2. In low-power mode. 3. fint = 32 kHz in low-power mode. When the input is back to HIGH level, a current booster is turned on during the delay td on the output side and then both sides are back to their idle state, ready to detect the next logic 0 on any side. I/O circuitry The three I/O transceivers are identical. The state is HIGH for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and AUX2UC). Pin I/O is referenced to VCC and pin I/OUC to VDD, thus ensuring proper operation in case VCC ≠ VDD. In case of a conflict, both lines may remain LOW until the software enables the lines to be HIGH. The anti-latch circuitry ensures that the lines do not remain LOW if both sides return HIGH, regardless of the prior conditions. The maximum frequency on the lines is approximately 1 MHz. The first side on which a falling edge is detected becomes a master (input). An anti-latch circuitry first disables the detection of the falling edge on the other side, which becomes slave (output). After a delay time td (about 50 ns), the logic 0 present on the master side is transferred on the slave side. handbook, full pagewidth I/O I/OUC td td td conflict idle MGD703 Fig.6 Master and slave signals. 1997 Nov 04 8 Philips Semiconductors Product specification IC card interface TDA8002 If pin MODE goes LOW in the active mode, a normal deactivation sequence is performed before entering low-power mode. When pin MODE goes HIGH, the circuit enters normal operation after a delay of at least 6 ms (96 cycles of CLKOUT). During this time the CLKOUT remains at 16 kHz. Logic circuitry After power-up, the circuit has six possible states of operation. Table 1 shows the sequence of these states. IDLE MODE • All card contacts are inactive After reset, the circuit enters the idle mode. A minimum number of functions in the circuit are active while waiting for the microcontroller to start a session: • Oscillator XTAL does not run • The VDD supervisor, ALARM output, card presence detection and OFF output remain functional • All card contacts are inactive • I/OUC, AUX1UC and AUX2UC are high-impedance • Internal oscillator is slowed to 32 kHz, CLKOUT providing 16 kHz. • Oscillator XTAL runs, delivering CLKOUT • Voltage supervisor is active. ACTIVE MODE LOW-POWER (SLEEP) MODE When the activation sequence is completed, the TDA8002 will be in the active mode. Data is exchanged between the card and the microcontroller via the I/O lines. When pin MODE goes LOW, the circuit enters the low-power (sleep) mode. As long as pin MODE is LOW, no activation is possible. State diagram handbook, full pagewidth ACTIVATION POWER OFF IDLE MODE FAULT ACTIVE MODE LOW-POWER MODE DEACTIVATION MGE735 Fig.7 State diagram. 1997 Nov 04 9 Philips Semiconductors Product specification IC card interface TDA8002 Figures 8 to 10 illustrate the activation sequence as described below: ACTIVATION SEQUENCE From idle mode, the circuit enters the activation mode when the microcontroller sets the CMDVCC line LOW or sets the MODE line HIGH when the CMDVCC line is already LOW. The internal circuitry is then activated, the internal clock is activated and an activation sequence is executed. When RST is enabled, it becomes the inverse of RSTIN. 1. Step-up converter is started (t1 ≈ t0) 2. VCC rises from 0 to 5 V (t2 = t1 + 11⁄2T) 3. I/O, AUX1, AUX2 are enabled and CLK is enabled (t3 = t1 + 4T); a special circuitry ensures that I/O remains below VCC during falling slope of VCC 4. CLK is set by setting RSTIN to HIGH (t4) 5. RST is enabled (t5 = t1 + 7T); after t5, RSTIN has no further action on CLK, but is only controlling RST. handbook, full pagewidth OSC_INT/64 tact CMDVCC t0 VUP t1 VCC T = 25 µs t2 t3 I/O CLK t5 high - Z t4 RSTIN RST MGE736 Fig.8 Activation sequence using RSTIN and CMDVCC. 1997 Nov 04 10 Philips Semiconductors Product specification IC card interface TDA8002 handbook, full pagewidth OSC_INT/64 tact CLKDIV1 CLKDIV2 CMDVCC t0 VUP t1 t2 VCC t3 I/O high - Z CLK RSTIN RST MGE737 Fig.9 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK. tact handbook, full pagewidth OSC_INT/64 PRES, OFF CMDVCC VCC I/O high - Z RSTIN STROBE RST MGE738 Fig.10 Activation sequence for synchronous application. 1997 Nov 04 11 Philips Semiconductors Product specification IC card interface TDA8002 Figures 11 and 12 illustrate the deactivation sequence as described below: DEACTIVATION SEQUENCE When a session is completed, the microcontroller sets the CMDVCC line to HIGH state or MODE line to LOW state. The circuit then executes an automatic deactivation sequence by counting the sequencer down and ends in idle mode. 1. RST goes LOW (t11 ≈ t10) 2. CLK is stopped (t12 = t11 + 1⁄2T) 3. I/O, AUX1, AUX2 are outputs into high-impedance state (t13 = t11 + T) 4. VCC falls to zero (t14 = t11 + 11⁄2T); a special circuitry ensures that I/O remains below VCC during falling slope of VCC 5. VUP falls (t15 = t11 + 5T). tde handbook, full pagewidth OSC_INT/64 CMDVCC t10 t15 VUP t14 VCC t13 I/O high - Z t12 CLK RSTIN RST t11 MGE739 Fig.11 Deactivation sequence. 1997 Nov 04 12 Philips Semiconductors Product specification IC card interface TDA8002 When one or more of these faults are detected, the circuit pulls the interrupt line OFF to its active LOW state and a deactivation sequence is initiated. In case the card is present the interrupt line OFF is set to HIGH when the microcontroller has reset the CMDVCC line HIGH (after completion of the deactivation sequence). In case the card is not present OFF remains LOW. Fault detection The following fault conditions are monitored by the circuit: • Short-circuit or high current on VCC • Removing card during transaction • VDD dropping • Overheating. tde handbook, full pagewidth OSC_INT/64 OFF t10 PRES t14 VCC t13 I/O high - Z t12 CLK RST t11 MGE740 Fig.12 Emergency deactivation sequence. 1997 Nov 04 13 Philips Semiconductors Product specification IC card interface TDA8002 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); note 1. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT −0.3 +6.5 V −0.3 +6.5 V −0.3 +6.5 V on pins I/O, RST, VCC, CLK, AUX1, AUX2, PRES and PRES −6 +6 kV on all other pins −2 +2 kV Tstg storage temperature −55 +125 °C Ptot continuous total power dissipation VDD supply voltage Vi(CMOS) voltage on CMOS pins XTAL1, XTAL2, ALARM, ALARM, MODE, RSTIN, CLKSEL, AUX2UC, AUX1UC, CLKDIV1, CLKDIV2, CLKOUT, STROBE, CMDVCC and OFF Vi(card) voltage on card contact pins I/O, AUX2, PRES, PRES, AUX1, CLK, RST and VCC Ves electrostatic handling TDA8002T Tamb = −25 to +85 °C − 0.56 W TDA8002G Tamb = −25 to +85 °C − 0.46 W Tamb operating ambient temperature −25 +85 °C Tj junction temperature − 150 °C Note 1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional operation of the device under this condition is not implied. HANDLING Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining. Method 3015 (HBM 1500 Ω, 100 pF) 3 positive pulses and 3 negative pulses on each pin referenced to ground. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 1997 Nov 04 PARAMETER VALUE UNIT SOT136-1 70 K/W SOT401-1 91 K/W thermal resistance from junction to ambient in free air 14 Philips Semiconductors Product specification IC card interface TDA8002 CHARACTERISTICS VDD = 5 V; Tamb = 25 °C; fxtal = 10 MHz; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD positive supply voltage option 5 V power supply (TDA8002xx/5) 4.5 5 6.5 V option 3.3 V or 5 V power supply (TDA8002xx/3) 3 5 6.5 V IDD(sl) supply current sleep mode; VDD = 5 V − − 200 µA IDD(idle) supply current idle mode; VDD = 5 V; fCLK = 2.5 MHz; fCLKOUT = 10 MHz − − 6 mA IDD(active) supply current active mode VDD = 5 V; fCLK = 2.5 MHz; fCLKOUT = 10 MHz − − 9 mA VDD = 3.3 V; fCLK = 2.5 MHz; fCLKOUT = 10 MHz − − 12 mA 3.9 4.05 4.2 V 2.7 2.8 V Vth2 threshold voltage on VDD for voltage supervisor falling option 5 V power supply (TDA8002xx/5) option 3.3 V or 5 V power 2.6 supply (TDA8002xx/3) rising Vhys2 option 5 V power supply (TDA8002xx/5) 4 4.2 4.4 V option 3.3 or 5 V power supply (TDA8002xx/3) 2.7 2.85 2.99 V 100 150 200 mV − − 0.4 V ICC < 20 mA: DC load with 3 V < VDD < 3.3 V 4.75 − 5.25 V ICC < 65 mA: DC load with 3.3 V < VDD < 6.5 V 4.75 − 5.25 V hysteresis on Vth2 CARD SUPPLY VCC(O)(idle) output voltage VCC(O)(active) output voltage idle mode active mode 4.6 − 5.4 V VCC(O) = from 0 to 5 V − − 65 mA VCC short-circuited to ground − − 100 mA rising or falling slope 0.12 0.17 0.22 V/µs ICC = 40 mA: AC load ICC(O) SR 1997 Nov 04 output current slew rate 15 Philips Semiconductors Product specification IC card interface SYMBOL TDA8002 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Crystal connections (XTAL1 and XTAL2) Cext external capacitors note 1 − 15 − pF fxtal resonance frequency note 2 2 − 24 MHz delay between falling edge of I/O, AUX1, AUX2 and I/OUC, AUX1UC, AUX2UC − 200 − ns delay between falling edge of I/OUC, AUX1UC, AUX2UC and I/O, AUX1, AUX2 − 200 − ns − − 0.5 µs Data lines GENERAL tedge tr, tf rise and fall times Ci = Co = 30 pF DATA LINES I/O, AUX1 AND AUX2 VOH(I/O) HIGH-level output voltage on data lines IOH = −20 µA VCC − 0.5 − IOH = −100 µA 3.5 − − V II/O = 1 mA − − 300 mV VCC + 0.1 V VOL(I/O) LOW-level output voltage on data lines VIH(I/O) HIGH-level input voltage on data lines 1.8 − VCC V VIL(I/O) LOW-level input voltage on data lines 0 − 0.8 V VI/O(idle) voltage on data lines outside a session − − 0.4 V Rpu internal pull-up resistance between data lines and VCC 8 10 12 kΩ Iedge current from data lines when active pull-up is active − 1 − mA IIL(I/O) LOW-level input current on data lines VIL = 0.4 V − − −600 µA IIH(I/O) HIGH-level input current on data lines VIH = VCC − − 10 µA DATA LINES I/OUC, AUX1UC AND AUX2UC VOH(I/OUC) HIGH-level output voltage on data lines IOH = −20 µA VDD − 1 − VDD + 0.2 V VOL(I/OUC) LOW-level output voltage on data lines II/OUC = 1 mA − − 300 mV VIH(I/OUC) HIGH-level input voltage on data lines 0.7VDD − VDD V VIL(I/OUC) LOW-level input voltage on data lines 0 − 0.3VDD V ZI/OUC(idle) impedance on data lines outside a session 10 − − MΩ 1997 Nov 04 16 Philips Semiconductors Product specification IC card interface SYMBOL PARAMETER TDA8002 CONDITIONS MIN. TYP. MAX. UNIT ALARM, ALARM and OFF when connected (open-drain outputs) IOH(ALARM) HIGH-level output current on pin ALARM VOH(ALARM) = 5 V − − 5 µA VOL(ALARM) LOW-level output voltage on pin ALARM IOL(ALARM) = 2 mA − − 0.4 V IOH(OFF) HIGH-level output current on pin OFF VOH(OFF) = 5 V − − 5 µA VOL(OFF) LOW-level output voltage on pin OFF IOL(OFF) = 2 mA − − 0.4 V IOL(ALARM) LOW-level output current on pin ALARM VOL(ALARM) = 0 V − − −5 µA VOH(ALARM) HIGH-level output voltage on pin ALARM IOH(ALARM) = −2 mA VDD − 1 − − V tW ALARM pulse width 6 − 20 ms 0 − 20 MHz Clock output (CLKOUT; powered from VDD) fCLKOUT frequency on CLKOUT low power − 16 − kHz VOL LOW-level output voltage IOL = 1 mA 0 − 0.5 V VOH HIGH-level output voltage IOH = −1 mA VDD − 0.5 − − V tr, tf rise and fall times CL = 15 pF; notes 3 and 5 − − 8 ns δ duty factor CL = 15 pF; notes 3 and 5 40 − 60 % active mode 2.2 2.7 3.2 MHz sleep mode − 32 − kHz inactive modes 0 − 0.3 V Internal oscillator fint frequency of internal oscillator Card reset output (RST) VO(inact) output voltage td(RST) delay between RSTIN and RST RST enabled − − 100 ns VOL LOW-level output voltage IOL = 200 µA 0 − 0.3 V VOH HIGH-level output voltage IOH = −200 µA 4.3 − VCC V IOH = −50 µA VCC − 0.5 − VCC V 0 − 0.3 V − Card clock output (CLK) VO(inact) output voltage inactive modes VOL LOW-level output voltage IOL = 200 µA 0 0.3 V VOH HIGH-level output voltage IOH = −50 µA VCC − 0.5 − VCC V tr rise time CL = 30 pF; note 3 − 8 ns tf fall time CL = 30 pF; note 3 − − 8 ns δ duty factor CL = 30 pF; note 3 45 − 55 % SR slew rate (rise and fall) 0.2 − − V/ns 1997 Nov 04 17 − Philips Semiconductors Product specification IC card interface SYMBOL PARAMETER TDA8002 CONDITIONS MIN. TYP. MAX. UNIT Strobe input (STROBE) fSTROBE frequency on STROBE 0 − 20 MHz VIL LOW-level input voltage 0 − 0.3VDD V VIH HIGH-level input voltage 0.7VDD − VDD V Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 4 VIL LOW-level input voltage 0 − 0.8 V VIH HIGH-level input voltage 1.8 − VDD V Logic inputs (PRES, PRES); note 4 VIL LOW-level input voltage 0 − 0.3VDD V VIH HIGH-level input voltage 0.7VDD − VDD V IIL(PRES) LOW-level input current on pin PRES − − −10 µA IIH(PRES) HIGH-level input current on pin PRES − − 10 µA VOL = 0 V Protections Tsd shut-down local temperature − 135 − °C ICC(sd) shut-down current at VCC − − 90 mA Timing tact activation sequence duration see Fig.9; guaranteed by design − 180 220 µs tde deactivation sequence duration see Fig.11; guaranteed by design 50 70 90 µs t3 start of the window for sending CLK to the card see Figs 8 and 9 − − 130 µs t5 end of the window for sending CLK to the card see Fig.8 150 − − µs Notes 1. It may be necessary to put capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or resonator. 2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH. t1 3. The transition time and duty cycle definitions are shown in Fig.13; δ = -------------t1 + t2 4. PRES and CMDVCC are active LOW; RSTIN and PRES are active HIGH. 5. CLKOUT transition time and duty cycle do not need to be tested. 1997 Nov 04 18 Philips Semiconductors Product specification IC card interface handbook, full pagewidth TDA8002 tr tf 90% 90% VOH 1/2 VCC 10% 10% VOL t1 t2 Fig.13 Definition of transition times. 1997 Nov 04 19 MGE741 Philips Semiconductors Product specification IC card interface TDA8002 APPLICATION INFORMATION handbook, full pagewidth 33 pF 33 pF f = 14.75 MHz +5 V VCC P1-0 MODE OFF RSTIN CARD READ LM01 C5I C1I C6I C2I C7I C3I C8I C4I CMDVCC VCC RST CLK AUX1 PRES AUX2 I/O VUP K1 S1 K2 VDDA 28 1 27 2 26 3 25 4 24 5 23 6 22 7 21 TDA8002A 8 20 9 19 10 18 11 17 12 16 13 15 14 XTAL1 XTAL2 I/OUC AUX1UC AUX2UC ALARM CLKSEL P1-3 P0-2 P1-4 P0-3 P1-5 P0-4 P1-6 P0-5 P1-7 P0-6 RST P0-7 P3-1 CLKDIV1 EA 80C51 P3-2 CLKDIV2 STROBE CLKOUT DGND1 AGND S2 100 nF 100 nF P0-0 P0-1 P3-0 100 nF 100 nF P1-1 P1-2 10 µF ALE PSEN P3-3 P2-7 P3-4 P2-6 P3-5 P2-5 P3-6 P2-4 P3-7 P2-3 XTAL2 P2-2 XTAL1 VSS P2-1 P2-0 MGE742 Fig.14 Application diagram (for more details, consult “Application Note AN96096 ”). 1997 Nov 04 20 Philips Semiconductors Product specification IC card interface TDA8002 PACKAGE OUTLINES SO28: plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 D E A X c y HE v M A Z 15 28 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 e bp 0 detail X w M 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 18.1 17.7 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.71 0.69 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT136-1 075E06 MS-013AE 1997 Nov 04 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-24 97-05-22 21 Philips Semiconductors Product specification IC card interface TDA8002 SOT401-1 LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm c y X A 17 24 ZE 16 25 e A A2 E HE (A 3) A1 w M pin 1 index θ bp 32 Lp 9 L 1 8 detail X ZD e v M A w M bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 1.60 0.15 0.05 1.5 1.3 0.25 0.27 0.17 0.18 0.12 5.1 4.9 5.1 4.9 0.5 7.15 6.85 7.15 6.85 1.0 0.75 0.45 0.2 0.12 0.1 Z D (1) Z E (1) θ 0.95 0.55 7 0o 0.95 0.55 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 95-12-19 97-08-04 SOT401-1 1997 Nov 04 EUROPEAN PROJECTION 22 Philips Semiconductors Product specification IC card interface TDA8002 If wave soldering cannot be avoided, for LQFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). SO • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. Reflow soldering Reflow soldering techniques are suitable for all LQFP and SO packages. • The longitudinal axis of the package footprint must be parallel to the solder flow. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • The package footprint must incorporate solder thieves at the downstream end. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. METHOD (LQFP AND SO) Wave soldering Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. LQFP Wave soldering is not recommended for LQFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints CAUTION Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Wave soldering is NOT applicable for all LQFP packages with a pitch (e) equal or less than 0.5 mm. 1997 Nov 04 23 Philips Semiconductors Product specification IC card interface TDA8002 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Nov 04 24 Philips Semiconductors Product specification IC card interface TDA8002 NOTES 1997 Nov 04 25 Philips Semiconductors Product specification IC card interface TDA8002 NOTES 1997 Nov 04 26 Philips Semiconductors Product specification IC card interface TDA8002 NOTES 1997 Nov 04 27 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547047/1200/03/pp28 Date of release: 1997 Nov 04 Document order number: 9397 750 02454