CY29942
1:18 Clock Distribution Buffer
1:18 Clock Distribution Buffer
Features
Functional Description
■
Operational range: Up to 200 MHz
■
LVCMOS/LVTTL clock input
■
LVCMOS-/LVTTL-compatible logic input
■
18 clock outputs: Drive up to 36 clock lines
■
Output-to-output Skew: 110 ps (typical)
■
Output enable control
■
Supply voltage: 2.5 V or 3.3 V
The CY29942 is a low voltage clock distribution buffer with an
LVCMOS or LVTTL compatible clock input. The output enable
control input is LVCMOS/LVTTL compatible. The eighteen
outputs are 2.5 V or 3.3 V LVCMOS or LVTTL compatible,
operate up to 200 MHz, and can drive 50 series or parallel
terminated transmission lines. For series terminated
transmission lines, each output can drive one or two traces,
giving the devices an effective fanout of 1:36. Low
output-to-output skews make the CY29942 an ideal clock
distribution buffer for nested clock trees in the most demanding
of synchronous systems.
■
Temperature range: Commercial and Industrial
For a complete list of related documentation, click here.
■
32-pin TQFP package
■
Pin compatible with MPC942C
Logic Block Diagram
VDD
18
TCLK
Q0-Q17
OE
Cypress Semiconductor Corporation
Document Number: 38-07284 Rev. *J
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised May 4, 2016
CY29942
Pin Configuration
Q0
Q1
Q2
VDD
Q3
Q4
Q5
VSS
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Q16
Q15
VSS
Q14
Q13
Q12
VDD
CY29942
Q17
VSS
VSS
TCLK
NC
OE
NC
VDD
VDD
32
Figure 1. 32-pin TQFP pinout
24
23
22
21
20
19
18
17
Q6
Q7
Q8
VDD
Q9
Q10
Q11
VSS
Pin Descriptions
Pin
Name
I/O
3
TCLK
Input
External reference/Test clock input. Weak internal pull-down resistor.
5
OE
Input
Output enable. When HIGH, all outputs are enabled. When set LOW, the outputs are
at high impedance. Weak internal pull-up resistor.
9, 10, 11, 13,
14, 15, 18, 19,
20, 22, 23, 24,
26, 27, 28, 30,
31, 32
Q(17:0)
Output
7, 8, 16, 21,
29
VDD
2.5 V or 3.3 V power supply
1, 2, 12, 17,
25
VSS
Ground
4, 6
NC
No connection
Document Number: 38-07284 Rev. *J
Description
Clock outputs
Page 2 of 10
CY29942
Absolute Maximum Ratings
Maximum power supply: ............................................... 5.5 V
Exceeding the maximum ratings may impair the useful life of the
device. User guidelines are not tested. [1]
Maximum input voltage relative to VSS: ............. VSS – 0.3 V
Maximum input voltage relative to VDD: ............. VDD + 0.3 V
Storage temperature: ................................. –65 °C to 150 °C
Maximum input current: ............................................ ±20 mA
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any voltage
higher than the maximum rated voltages to this circuit. For proper
operation, I/O voltages should be constrained to the range:
VSS < VI/O < VDD
Operating temperature: ............................... –40 °C to 85 °C
Unused inputs must always be tied to an appropriate logic
voltage level (either VSS or VDD).
Maximum ESD protection .............................................. 2 kV
DC Electrical Specifications
VDD = 3.3 V ± 5% or 2.5 V ± 5% over the specified temperature range.
Min
Typ
Max
Unit
VIL
Parameter
Input low voltage
VSS
–
0.8
V
VIH
Input high voltage
2.0
–
VDD
V
–
–
–200
µA
IIL
Description
Input low
current[2]
current[2]
IIH
Input high
VOL
Output low voltage[3]
VOH
Conditions
Output high
voltage[3]
–
–
200
µA
–
–
0.5
V
IOH = –20 mA, VDD = 3.3 V
2.4
–
–
V
IOH = –16 mA, VDD = 2.5 V
2.0
–
–
V
IOL = 20 mA
IDDQ
Quiescent supply current
OE = VSS
–
5
7
mA
IDD
Dynamic supply current
VDD = 3.3 V, Outputs at 150 MHz,
CL = 15 pF
–
285
–
mA
VDD = 3.3 V, Outputs at 200 MHz,
CL = 15 pF
–
335
–
mA
VDD = 2.5 V, Outputs at 150 MHz,
CL = 15 pF
–
200
–
mA
VDD = 2.5 V, Outputs at 200 MHz,
CL = 15 pF
–
240
–
mA
VDD = 3.3 V
8
12
16
VDD = 2.5 V
10
15
20
–
4
–
pF
Zout
Cin
Output impedance
Input capacitance
Thermal Resistance
Parameter [4]
Description
θJA
Thermal resistance
(junction to ambient)
θJC
Thermal resistance
(junction to case)
Test Conditions
32-pin TQFP
Unit
Test conditions follow standard test methods and
procedures for measuring thermal impedance, in
accordance with EIA/JESD51.
67
°C/W
28
°C/W
Notes
1. The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2. Inputs have pull-up/pull-down resistors that effect input current.
3. Driving series or parallel terminated 50 (or 50 to VDD/2) transmission lines.
4. These parameters are guaranteed by design and are not tested.
Document Number: 38-07284 Rev. *J
Page 3 of 10
CY29942
AC Electrical Specifications
VDD = 3.3 V ±5% or 2.5 V ±5% over the specified temperature range [5]
Parameter
Fmax
tpd
DC
tsk(0)
tskew(pp)
tskew(pp)
tr/tf
Description
Conditions
Min
Typ
Max
Unit
–
–
200
MHz
VDD = 3.3 V
1.8
3.3
3.8
ns
VDD = 2.5 V
2.3
3.8
4.4
ns
Measured at VDD/2
45
–
55
%
–
110
200
ps
VDD = 3.3 V
–
–
1.0
ns
VDD = 2.5 V
–
–
1.3
ns
–
–
600
ps
0.2
–
1.1
ns
Input frequency
TTL_CLK to Q delay
[6, 7]
[6, 7, 8]
Output duty cycle
Output-to-output skew
[6, 7]
[9]
Part-to-part skew
[10]
Part-to-part skew
Output clocks rise/fall
time[6, 7]
0.8 V to 2.0 V, VDD = 3.3 V;
0.5 V to 1.8 V, VDD = 2.5 V
Notes
5. Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with loaded outputs.
6. Outputs driving 50 transmission lines.
7. See Figure 2.
8. 50% input duty cycle.
9. Across temperature and voltage ranges, includes output skew.
10. For a specific temperature and voltage, includes output skew.
Document Number: 38-07284 Rev. *J
Page 4 of 10
CY29942
Figure 2. LVCMOS_CLK CY29942 Test Reference for VCC = 3.3 V and VCC = 2.5 V
CY29942 DUT
Zo = 50 ohm
Pulse
Generator
Z = 50 ohm
Zo = 50 ohm
RT = 50 ohm
RT = 50 ohm
VTT
VTT
Figure 3. LVCMOS Propagation Delay (tpd) Test Reference
VCC
LVCMOS_CLK
VCC /2
GND
VCC
Q
VCC /2
tPD
GND
Figure 4. Output Duty Cycle (DC)
VCC
VCC /2
tP
GND
T0
DC = tP / T0 x 100%
Figure 5. Output-to-Output Skew tsk(0)
VCC
VCC /2
GND
VCC
VCC /2
tSK(0)
Document Number: 38-07284 Rev. *J
GND
Page 5 of 10
CY29942
Ordering Information
Part Number
Package Type
Production Flow
Pb-free
CY29942AXI
32-pin TQFP
Industrial, –40 °C to 85 °C
CY29942AXIT
32-pin TQFP – Tape and Reel
Industrial, –40 °C to 85 °C
CY29942AXC
32-pin TQFP
Commercial, 0 °C to 70 °C
CY29942AXCT
32-pin TQFP – Tape and Reel
Commercial, 0 °C to 70 °C
Ordering Code Definitions
CY 29942 A
X
X
T
X = blank or T
blank = Tube; T = Tape and Reel
Temperature Range: X = C or I
C = Commercial; I = Industrial
X = Pb-free indicator
Package Type: A = 32-pin TQFP Package
29942 = Base part number
Company Code: CY = Cypress
Document Number: 38-07284 Rev. *J
Page 6 of 10
CY29942
Package Drawing and Dimensions
Figure 6. 32-pin TQFP (7 × 7 × 1.4 mm) A3214 Package Outline, 51-85088
51-85088 *E
Document Number: 38-07284 Rev. *J
Page 7 of 10
CY29942
Acronyms
Acronym
Document Conventions
Description
LVCMOS
Low Voltage Complementary Metal Oxide
Semiconductor
LVTTL
Low Voltage Transistor-Transistor Logic
OE
Output Enable
PLL
Phase-Locked Loop
TQFP
Thin Quad Flat Pack
Document Number: 38-07284 Rev. *J
Units of Measure
Symbol
Unit of Measure
°C
degree Celsius
kV
kilovolt
MHz
megahertz
µA
microampere
mA
milliampere
ms
millisecond
mW
milliwatt
ns
nanosecond
ohm
%
percent
pF
picofarad
ps
picosecond
V
volt
Page 8 of 10
CY29942
Document History Page
Document Title: CY29942, 1:18 Clock Distribution Buffer
Document Number: 38-07284
Revision
ECN
Orig. of
Change
Submission
Date
Description of Change
**
111095
BRK
02/07/02
New data sheet.
*A
116777
HWT
08/14/02
Added a Commercial Temp. Range in the Ordering Information
*B
122876
RBI
12/21/02
Add power up requirements to maximum rating information.
*C
334117
RGL
See ECN
Added Lead-free devices
Added typical value for output-output skew
*D
2761988
KVM
09/10/09
Ordering Information table: fixed typo and removed obsolete CY29942ACT.
Changed Lead-free to Pb-free.
*E
2899304
BASH /
CXQ
03/25/2010
Removed CY29942AC part from Ordering Information.
Updated package diagram.
*F
3034172
CXQ
09/21/2010
Changed spec title.
Updated format of “Features”, changed wording in “Functional Description”.
Removed note 1, added info into Table 1 directly.
Removed reference to multiple supplies, power supply sequencing from
Absolute Maximum Ratings.
Removed reference to VDDC from AC/DC Electrical Specs tables.
Added condition OE = VSS for IDDQ in DC Electrical Specs table.
Fixed formatting in AC/DC Electrical specs tables.
Changed tSKEW to tSK(o) to match Figure 6.
Added Ordering Code Definitions.
Added Acronyms and Units of Measure sections.
Minor edits.
*G
3548252
PURU
03/12/2012
Changed LQFP to TQFP throughout document.
*H
4149208
CINM
10/07/2013
Updated Package Drawing and Dimensions:
spec 51-85088 – Changed revision from *D to *E.
Updated to new template.
Completing Sunset Review.
*I
4586288
CINM
12/03/2014
Updated Functional Description:
Added “For a complete list of related documentation, click here.” at the end.
Updated Ordering Information:
Removed the prune part numbers CY29942AI and CY29942AIT.
*J
5258930
PSR
05/04/2016
Added Thermal Resistance.
Updated to new template.
Document Number: 38-07284 Rev. *J
Page 9 of 10
CY29942
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Document Number: 38-07284 Rev. *J
Revised May 4, 2016
Page 10 of 10