FAIRCHILD FDC638P_01

FDC638P
P-Channel 2.5V PowerTrench Specified MOSFET
General Description
Features
This P-Channel 2.5V specified MOSFET is produced
using
Fairchild
Semiconductor’s
advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
low gate charge for superior switching performance
• –4.5 A, –20 V. RDS(ON) = 48 mΩ @ V GS = –4.5 V
RDS(ON) = 65 mΩ @ V GS = –2.5 V
These devices are well suited for battery power
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
• High performance trench technology for extremely
low RDS(ON)
• Low gate charge (10 nC typical)
• SuperSOT ™ –6 package: small footprint (72%
smaller than standard SO-8; low profile (1mm thick)
S
D
D
SuperSOT
G
TM
-6
pin 1
D
6
2
5
3
4
D
Absolute Maximum Ratings
Symbol
1
TA=25oC unless otherwise noted
Ratings
Units
V DSS
Drain-Source Voltage
Parameter
–20
V
V GSS
Gate-Source Voltage
±8
V
ID
Drain Current
–4.5
A
PD
Power Dissipation for Single Operation
– Continuous
(Note 1a)
– Pulsed
TJ , TSTG
–20
(Note 1a)
1.6
(Note 1b)
0.8
W
–55 to +150
°C
(Note 1a)
78
°C/W
(Note 1)
30
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJ C
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.638
FDC638P
7’’
8mm
3000 units
2001 Fairchild Semiconductor Corporation
FDC638P Rev F1 (W)
FDC638P
September 2001
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV DSS
∆BV DSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
V GS = 0 V, ID = –250 µA
V DS = –16 V, V GS = 0 V
–1
µA
IGSSF
Gate–Body Leakage, Forward
V GS = 8 V,
V DS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
V GS = –8 V,
V DS = 0 V
–100
nA
–1.5
V
On Characteristics
–20
ID = –250 µA,Referenced to 25°C
V
–14
mV/°C
(Note 2)
V GS(th)
∆V GS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V DS = V GS , ID = –250 µA
ID = –250 µA,Referenced to 25°C
ID(on)
On–State Drain Current
V GS = –4.5 V,
V DS = –5 V
gFS
Forward Transconductance
V DS = –10 V,
ID = –4.5 A
15
S
V DS = –10 V,
f = 1.0 MHz
V GS = 0 V,
1160
pF
195
pF
105
pF
–0.4
–0.8
3
39
52
54
V GS = –4.5 V, ID = –4.5 A
V GS = –2.5 V, ID = –3.8 A
V GS = –4.5 V, ID = –4.5 TJ =125°C
mV/°C
48
65
72
–20
mΩ
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
tf
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
(Note 2)
V DD = –5 V,
V GS = –4.5 V,
12
22
ns
9
18
ns
Turn–Off Delay Time
33
53
ns
Turn–Off Fall Time
12
22
ns
10
14
nC
V DS = –10 V,
V GS = –4.5 V
ID = –1 A,
RGEN = 6 Ω
ID = –4.5 A,
2.2
nC
1.5
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
V SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V GS = 0 V, IS = –1.3 A
Voltage
–0.73
(Note 2)
–1.3
A
–1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
78°C/W when
mounted on a 1in2 pad
of 2 oz copper
b)
156°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDC638P Rev F (W)
FDC638P
Electrical Characteristics
FDC638P
Typical Characteristics
20
1.6
V GS = -4.5V
-2.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
-3.0V
15
-2.0V
10
5
0
0
1
2
3
1.4
1.2
-3.0V
-3.5V
-4.0V
0.8
4
0
Figure 1. On-Region Characteristics.
5
10
-ID , DRAIN CURRENT (A)
15
20
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
0.15
ID = -4.5A
V GS = -4.5V
RDS(ON), ON-RESISTANCE (OHM)
ID = -2.2A
1.4
1.2
1
0.8
0.6
0.12
0.09
TA = 125o C
0.06
T A = 25o C
0.03
0
-50
-25
0
25
50
75
100
125
150
1
2
T J, JUNCTION TEMPERATURE ( oC)
3
4
5
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
15
100
T A = -55oC
25o C
-I S, REVERSE DRAIN CURRENT (A)
V DS = -5V
12
-I D, DRAIN CURRENT (A)
-4.5V
1
-V DS , DRAIN TO SOURCE VOLTAGE (V)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = -2.5V
125oC
9
6
3
0
0.5
1
1.5
2
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
2.5
V GS = 0V
10
1
TA = 125 oC
0.1
25oC
0.01
-55o C
0.001
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
-V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC638P Rev F (W)
FDC638P
Typical Characteristics
1500
V DS = -5V
ID = -4.5A
-10V
4
3
2
1
f = 1 MHz
VGS = 0 V
CISS
1200
-15V
CAPACITANCE (pF)
-V GS, GATE-SOURCE VOLTAGE (V)
5
900
600
C OSS
300
0
CRSS
0
3
6
9
12
0
0
Qg, GATE CHARGE (nC)
5
10
15
20
-V DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
50
-ID, DRAIN CURRENT (A)
RDS(ON) LIMIT
P(pk), PEAK TRANSIENT POWER (W)
100
1ms
10ms
10
100ms
1s
1
10s
DC
V GS = -4.5V
SINGLE PULSE
RθJA = 156o C/W
0.1
T A = 25o C
0.01
0.1
1
10
SINGLE PULSE
RθJA = 156°C/W
TA = 25°C
40
30
20
10
0
0.001
100
0.01
0.1
-V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
10
100
t 1, TIME (sec)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R θJA(t) = r(t) + R θJA
o
R θJA = 156 C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
t1
t2
0.01
T J - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b
Transient thermal response will change depending on the circuit board design.
FDC638P Rev F (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST 
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench 
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER 
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET 
VCX™
STAR*POWER is used under license
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4