FDMB506P December 2005 FDMB506P P-Channel 1.8V Logic Level PowerTrench MOSFET General Description Features This P-Channel MOSFET is produced using Fairchild • –6.8 A, –20V. RDS(ON) = 30 mΩ @ VGS = –4.5V Semiconductor’s advanced PowerTrench process that RDS(ON) = 38 mΩ @ VGS = –2.5V has been especially tailored to minimize the on-state RDS(ON) = 70 mΩ @ VGS = –1.8V resistance and yet maintain low gate charge for superior switching performance. These devices are • Low profile – 0.8 mm maximum well suited for portable electronics applications. • Fast switching Applications • RoHS compliant • Load switch • DC/DC Conversion PIN 1 GATE SOURCE S 5 4 G D 6 3 D D 7 2 D D 8 1 D MicroFET 3x1.9 Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Parameter Ratings Units VDSS Drain-Source Voltage –20 V VGSS Gate-Source Voltage ±8 V ID Drain Current –6.8 A – Continuous (Note 1a) – Pulsed 70 PD Power Dissipation TJ, TSTG Operating and Storage Junction Temperature Range (Note 1a) 1.9 W –55 to +150 °C °C/W Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 65 RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 208 Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity 506 FDMB506P 7’’ 8mm 3000 units 2005 Fairchild Semiconductor Corporation FDMB506P Rev C1(W) Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics ID = –250 µA VGS = 0 V, ID = –250 µA, Referenced to 25°C –20 V BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1 µA IGSS Gate–Body Leakage VGS = ± 8 V, VDS = 0 V ±100 nA On Characteristics VGS(th) mV/°C –13 (Note 2) ID = –250 µA VDS = VGS, ID = –250 µA, Referenced to 25°C ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance gFS Forward Transconductance –0.4 –0.7 –1.5 V mV/°C 3 VGS = –4.5 V, ID = –6.8 A VGS = –2.5 V, ID = –2.5 A VGS = –1.8 V, ID = –1.8 A VGS= –4.5 V, ID = –6.8 A, TJ=125°C 25 30 40 36 30 38 70 44 VDS = –5 V, ID = –6.8 A 26 VDS = –10 V, f = 1.0 MHz V GS = 0 V, 2216 2960 pF 351 470 pF 167 260 pF mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time (Note 2) VDD = –10 V, ID = –1 A, VGS = –4.5 V, RGEN = 6 Ω 14 25 ns 8 16 ns td(off) Turn–Off Delay Time 175 280 ns tf Turn–Off Fall Time 80 128 ns Qg Total Gate Charge 21 30 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = –10 V, VGS = –4.5 V ID = –6.8 A, 3.5 nC 4.5 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD trr Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Qrr Diode Reverse Recovery Charge VGS = 0 V, IS = –0.8 A(Note 2) IF = –6.8 A, diF/dt = 100 A/µs 1.6 A –0.6 –1.2 V 26 48 nS 12 22 nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 50°C/W when 2 mounted on a 1in pad of 2 oz copper b) 160°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDMB506P Rev C1(W) FDMB506P Electrical Characteristics FDMB506P Dimensional Outline and Pad Layout NOTES: A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION, B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 MO-229, DATED 11/2001. FDMB506P Rev C1(W) FDMB506P Typical Characteristics 2.4 -ID, DRAIN CURRENT (A) VGS=-4.5V -3.0V -3.5V 40 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 50 -2.5V 30 -2.0V 20 -1.8V 10 0 2.2 VGS=-1.8V 2 1.8 -2.0V 1.6 -2.5V 1.4 -3.0V 1.2 1 2 3 4 5 0 10 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) 30 40 50 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.5 0.08 ID = -3.4A ID = -6.8A VGS = -4.5V 1.4 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -4.5V 1 0.8 0 1.3 1.2 1.1 1 0.9 0.8 0.7 0.07 0.06 0.05 TA = 125oC 0.04 0.03 TA = 25oC 0.02 0.01 -50 -25 0 25 50 75 100 125 150 1 1.5 2 2.5 3 3.5 4 4.5 5 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VDS = -5V -IS, REVERSE DRAIN CURRENT (A) 50 -ID, DRAIN CURRENT (A) -3.5V o 25 C 40 TA = -55oC 125oC 30 20 10 VGS=0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 0.5 1 1.5 2 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDMB506P Rev C1(W) FDMB506P Typical Characteristics 3200 ID = -6.8A VDS = -5V 2800 -10V 4 -15V CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 5 3 2 2400 2000 1600 1200 1 COSS 800 400 0 CRSS 0 0 5 10 15 20 25 0 5 Qg, GATE CHARGE (nC) 10 15 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 100 10 P(pk), PEAK TRANSIENT POWER (W) 100µs RDS(ON) LIMIT -ID, DRAIN CURRENT (A) f = 1 MHz VGS = 0 V CISS 1ms 10ms 10 100ms 1s 1 10s DC VGS = -4.5V SINGLE PULSE RθJA = 160oC/W 0.1 TA = 25oC 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 160°C/W TA = 25°C 8 6 4 2 0 0.01 0.1 1 Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 10 100 1000 t1, TIME (sec) -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA 0.2 0.1 o RθJA = 160 C/W 0.1 0.05 P(pk) 0.02 0.01 t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.01 0.001 0.0001 SINGLE PULSE 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 9. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I17