TOSHIBA TK15H50C

TK15H50C
TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type (π-MOS VI)
TK15H50C
○ Switching Regulator Applications
•
•
Unit: mm
: RDS (ON) = 0. 33 Ω (typ.)
High forward transfer admittance : |Yfs| = 8.5 S (typ.)
Low drain−source ON resistance
•
Low leakage current
: IDSS = 100 µA (max) (VDS = 500 V)
•
Enhancement mode
: Vth = 2.0~4.0 V (VDS = 10 V, I45D = 1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristic
Symbol
Rating
Unit
Drain−source voltage
VDSS
500
V
Drain−gate voltage (RGS = 20 kΩ)
VDGR
500
V
Gate−source voltage
VGSS
±30
V
ID
15
A
IDP
60
A
Drain power dissipation (Tc = 25°C)
PD
150
W
Single-pulse avalanche energy
(Note 2)
EAS
765
mJ
Avalanche current
IAR
15
A
Repetitive avalanche energy (Note 3)
EAR
15
mJ
Channel temperature
Tch
150
°C
Storage temperature range
Tstg
−55~150
°C
Drain current
DC
(Note 1)
Pulse (Note 1)
1: GATE
2: DRAIN (HEAT SINK)
3: SOURCE
JEDEC
―
JEITA
―
TOSHIBA
Weight: 3.8 g (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and
Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Thermal Characteristics
2
Characteristic
Symbol
Max
Unit
Thermal resistance, channel to case
Rth (ch−c)
0.833
°C/W
Thermal resistance, channel to
ambient
Rth (ch−a)
50
°C/W
Note 1: Ensure that the channel temperature does not exceed 150°C.
1
Note 2: VDD = 90 V, Tch = 25°C (initial), L = 5.78 mH, RG = 25 Ω, IAR = 15 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic-sensitive device. Handle with care.
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TK15H50C
Electrical Characteristics (Ta = 25°C)
Characteristic
Symbol
Gate leakage current
Gate−source breakdown voltage
Drain cutoff current
Test Condition
Min
Typ.
Max
Unit
IGSS
VGS = ±25 V, VDS = 0 V
—
—
±10
µA
V (BR) GSS
IG = ±10 µA, VDS = 0 V
±30
—
—
V
IDSS
VDS = 500 V, VGS = 0 V
—
—
100
µA
V (BR) DSS
ID = 10 mA, VGS = 0 V
500
—
—
V
Vth
VDS = 10 V, ID = 1 mA
2.0
—
4.0
V
Drain−source ON resistance
RDS (ON)
VGS = 10 V, ID = 7.0 A
—
0.33
0.4
Ω
Forward transfer admittance
|Yfs|
VDS = 10 V, ID = 7.0 A
4.0
8.5
—
S
Input capacitance
Ciss
—
2450
—
Drain−source breakdown voltage
Gate threshold voltage
VDS = 25 V, VGS = 0 V, f = 1 MHz
Reverse transfer capacitance
Crss
—
15
—
Output capacitance
Coss
—
220
—
tr
—
50
—
ton
—
90
—
tf
—
45
—
toff
—
175
—
—
48
—
—
26
—
—
22
—
Rise time
Turn-on time
pF
ns
Switching time
Fall time
Turn-off time
Total gate charge (gate−source
plus gate−drain)
Qg
Gate−source charge
Qgs
Gate−drain (“Miller”) charge
Qgd
VDD ≈ 400 V, VGS = 10 V, ID = 15 A
nC
Source−Drain Ratings and Characteristics (Ta = 25°C)
Characteristic
Symbol
Test Condition
Min
Typ.
Max
Unit
Continuous drain reverse current
(Note 1)
IDR
—
—
—
15
A
Pulse drain reverse current
(Note 1)
IDRP
—
—
—
60
A
Forward voltage (diode)
VDSF
IDR = 15 A, VGS = 0 V
—
—
−1.7
V
Reverse recovery time
trr
1050
—
ns
Qrr
IDR = 15 A, VGS = 0 V
dIDR / dt = 100 A / µs
—
Reverse recovery charge
—
13
—
µC
Marking
TOSHIBA
TK15H50C
Part No. (or abbreviation code)
Lot No.
A line indicates a
lead (Pb)-free package or
lead (Pb)-free finish.
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2006-11-06
TK15H50C
ID – VDS
ID – VDS
8
10
Common source
Tc = 25°C
Pulse test
20
6
8
Drain current ID (A)
Drain current ID (A)
10
6
5.25
4
5
4.75
2
4.5
10
Common source
Tc = 25°C
Pulse test
16
12
6
5.75
8
5.5
5.25
4
5
4.75
4.5
VGS = 4 V
0
0
1
2
3
Drain−source voltage
4
0
5
0
VDS (V)
10
20
(V)
VDS
8
30
100
20
10
0
4
2
Common source
Tc = 25°C
Pulse test
Tc = −55°C
Drain−source voltage
Drain current ID (A)
VDS – VGS
25
0
6
8
Gate−source voltage VGS
6
15
4
8
2
0
10
ID = 4 A
0
(V)
4
8
Common source
VDS = 20 V
Pulse test
Drain−source ON resistance
RDS (ON) (Ω)
(S)
Forward transfer admittance ⎪Yfs⎪
16
20
(V)
RDS (ON) − ID
1
Tc = −55°C
25
10
100
1
1
12
Gate−source voltage VGS
⎪Yfs⎪ − ID
100
50
VDS (V)
10
Common source
VDS = 20 V
Pulse test
40
40
Drain−source voltage
ID – VGS
50
VGS = 4 V
30
10
VGS = 10 V
15
0.1
0.1
100
Drain current ID (A)
Common source
Tc = 25°C
Pulse test
1
10
100
Drain current ID (A)
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2006-11-06
TK15H50C
IDR − VDS
RDS (ON) – Tc
100
Common source
VGS = 10 V
Pulse test
Drain reverse current IDR (A)
0.8
0.6
ID = 15 A
0.4
8
4
0.2
Common source
Tc = 25°C
Pulse test
10
1
10
5
3
1
0
−80
−40
0
40
80
Case temperature
120
0.1
0
160
−0.2
−0.4
Tc (°C)
Gate threshold voltage Vth (V)
(pF)
Capacitance C
−1.2
5
Ciss
1000
Coss
100
Common source
VGS = 0 V
f = 1 MHz
Tc = 25°C
10
0.1
Crss
1
10
Drain−source voltage
VDS
4
3
2
1
0
−80
100
Common source
VDS = 10 V
ID = 1 mA
Pulse test
(V)
−40
0
40
80
Case temperature
PD − Tc
Tc
(W)
VDS (V)
500
Drain−source voltage
150
100
50
40
80
120
Case temperature
160
(°C)
160
Tc
200
Common source
ID = 15 A
Tc = 25°C
Pulse test
400
400
VDS
300
VDS = 100 V
200
200
4
16
8
VGS
4
VDS = 100 V
0
20
40
Total gate charge
(°C)
20
12
400
200
100
0
0
120
Dynamic input/output characteristics
200
PD
−1.0
VDS (V)
Vth − Tc
Capacitance – VDS
Drain power dissipation
−0.8
Drain−source voltage
10000
0
VGS = 0, −1 V
−0.6
60
80
Gate−source voltage VGS (V)
Drain−source ON resistance
RDS (ON) (Ω)
1.0
0
100
Qg (nC)
2006-11-06
TK15H50C
rth − tw
1
rth (t)/Rth (ch-c)
Normalized transient thermal impedance
10
Duty = 0.5
0.2
PDM
0.1
0.1
t
0.05
T
0.02
SINGLE PULSE
0.01
10μ
Duty = t/T
Rth (ch-c) = 0.833°C/W
0.01
100μ
1m
10m
Pulse width
100m
tw
1
(s)
EAS – Tch
SAFE OPERATING AREA
1000
ID max (pulse) *
100 µs *
ID max (continuous)
10
DC OPERATION
Tc = 25°C
Avalanche energy
(A)
100
ID
EAS (mJ)
1000
Drain current
10
1 ms *
1
* Single pulse Ta = 25℃
0.1
Curves must be derated
linearly with increase in
temperature.
10
Drain-source voltage
600
400
200
VDSS max
0.01
1
800
100
0
25
1000
50
75
100
125
Channel temperature (initial) Tch
VDS (V)
150
(°C)
BVDSS
15 V
IAR
−15 V
VDD
Test circuit
RG = 25 Ω
VDD = 90 V, L = 5.78 mH
5
VDS
Waveform
Ε AS =
⎛
⎞
1
B VDSS
⎟
⋅ L ⋅ I2 ⋅ ⎜
⎜B
⎟
2
−
V
DD ⎠
⎝ VDSS
2006-11-06
TK15H50C
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2006-11-06