TB2118FG TOSHIBA Bi−CMOS Integrated Circuit Silicon Monolithic TB2118FG High Speed PLL For DTS TB2118FG is a high−speed phase−locked loop (PLL) LSI for car audio tuners with a built−in charge pump circuit. All functions are controlled through serial bus lines. The device is used to configure high−performance digital tuning systems. Features Weight: 0.31g (typ.) • Built−in high−speed program divider with built−in prescalers. FM: 30~150MHz (pulse swallowing method) AM: 1~40MHz (pulse swallowing method) • Phase comparator outputs are constant current output for both FM and AM. Current values can be switched using serial data. In high−speed mode for large current output seek, the lockup time between FM band edges can be set to approx. 500µs by selecting an appropriate VT range and low−pass filter constant. • RDS supported N−value data and charge pump output current data (total of 18−bits) can be selected using two resisters. • Built−in low−pass filter op−amps for FM and AM. • Built−in 20−bit binary counter for counting IF frequency. • Crystal oscillator can be used 10.25MHz or 10.35MHz. • Two output ports (open−collector output) and two I / O ports (CMOS) supported. • Package is SSOP 24 pin. (Note) Pins 1 and 24 are susceptible to surge. Take care when handling. 1 2006-04-12 TB2118FG Pin Connection XO 1 24 XI OSC 2 23 A−GND CE 3 22 REG. DIN 4 21 VCC 20 AM CP CK 5 DOUT 6 19 VT 18 FM CP SR 7 I / O−1 8 17 D−GND I / O−2 9 16 AMVCO OUT−1 10 15 FMVCO OUT−2 11 14 VDD 13 IFC VDD2 12 Block Diagram OSC 2 Constant power supply voltage Buff. VT ON / OFF XO 1 Osc circuit XI REF Reference counter 24 FMVCO 15 AMP AMVCO 16 AMP IFC 13 AMP CE 3 DIN 4 CK 5 X Phase comparator 12−bit programmable counter − + X 20−bit binary counter Register 1 Register 2 Serial AM CP Switch SIG 4−bit swallow counter Prescaler 20 REG. 22 19 VT 22−bit + − 40−bit shift register interface 18 I / O Port DOUT 6 Output port VDD VDD2 7 8 9 10 11 12 SR I / O−1 I / O−2 OUT−1 OUT−2 VDD2 2 14 FM CP Switch VCC 17 21 23 VDD D−GND VCC A−GND 2006-04-12 TB2118FG Pin Function Pin No. Symbol 1 XO Pin Name XI 2 OSC 15 FMVCO Remarks XIN Crystal oscillator pins 24 Function And Operation ・Serial data input: Setting F0 and F1 bits selects the frequency of the crystal oscillator to be connected. Crystal oscillator output pin ・Setting the OSC bit outputs the oscillation frequency. 0 = output off 1 = output on FM band local signal input ・Serial data input: When AM / FM bit = "0" FMVCO is selected. ・Input signal is directly transferred to the swallow counter. ・Input frequency: 30 to 150MHz ・Divided frequency: 528 to 65.535 16 AMVCO AM band local signal input ・Serial data input: When AM / FM bit = "1" AMVCO is selected. ・When mode = "1" AM band is selected (by pulse swallow). Input frequency: 1.0 to 40MHz Divided frequency: 528 to 65.535 13 IFC IF signal input ・input frequency: 0.1 to 15MHz ・The selected signal is input to a 20−bit general−purpose counter via a gate circuit. 3 CE Chip enable input 5 CK Clock input 4 DIN Serial data input 6 DOUT Serial data output Serial interface pins. ・Data used for controlling TB2118FG are exchanged between controllers. ・Control data are input via DIN in sync. With clock input via CK. Control data input start / stop is specified using CE. ・General−purpose counter data are output in sync. With clock input via CK from DOUT. ・The CK / CE / DIN pin is schmitt trigger input. 3 OSC circuit XOUT OSC Buff. ON /OFF ― RfIN RfIF CE / CK / DIN DOUT 2006-04-12 TB2118FG Pin Function Pin No. Symbol 7 SR 8 I / O−1 9 I / O−2 10 OUT−1 11 12 Pin Name Function And Operation Register control pin. ・Selects register 1 or 2. "L" = register 1 output "H" = register 2 output I / O ports ・Input or output is switched in units of bits by serial data input. ・CMOS input / CMOS output ・At power on, set to input ports. Output ports ・Open collector output ports. Remarks ― VDD OUT−2 ・Single power supply for reference frequency block ・VDD2 = 3.0 to 5.5V (note that VDD ≥ VDD2) ・Due to the crystal high−frequency receive interference characteristic, we recommend an RD setting so that VDD2 = 3.5V. VDD2 14 VDD 17 D−GND 21 VCC 23 A−GND 22 REG. CMOS power pins VDD 14 RD VDD2 12 ・Power pins for digital block (digital circuits). ・VCC = 4.5 to 5.5V, D−GND = 0V ― VT ・Power pins for analog block (eg, op− amps, constant−voltage supply) ・VCC = 8 to 10V, A−GND = 0V Ripple filter connecting pin. Ripple filter connecting pin for internal constant voltage supply. Insert about 10µF (as high as possible) between this pin and A−GND. Tuning voltage ・Input from the plus terminal of the op−amp is internally biased to 2.5V. ・External crystal for phase correction is required because low gain is set by high through rate. 4 ― − + 21 100Ω 1000 pF 19 Bipolar power pins 2006-04-12 TB2118FG Pin Function 18 AM CP FM CP Pin Name Function And Operation AM charge pump output Charge pump output for AM ・Serial data input: When AM / FM = "1" error output from the phase comparator is output as constant current. fREF > fSIG: (−) current output fREF = fSIG: High impedance fREF < fSIG: (+) current output ・Serial data: Output current can be switched using CR0 and CR1 bits. ・Normally (when using AM op−amp), set the OP SEL bit to "1". FM charge pump output Charge pump output for FM ・Serial data input: When AM / FM = "0" error output from the phase comparator is output as constant current. fREF > fSIG: (−) current output fREF = fSIG: High impedance fREF < fSIG: (+) current output ・Serial data: Output current can be switched using CR0 and CR1 bits. ・Normally (when using FM op−amp), set the OP SEL bit to "0". 5 Remarks VDD Current switcher 20 Symbol Phase comparator Pin No. Inverter amp 19 2006-04-12 TB2118FG Operation 1. Configuration of control data (serial data input / output) 1) Data input mode (valid data length changes according to the address.) I / O2 CR0 CR1 * P15 CR0 CR1 P15 I / O1 P14 P14 OUT2 P13 P13 OUT1 P12 P12 START P11 P11 A3 P09 P09 P10 P08 P08 P10 P07 P07 A2 P06 P06 A1 P05 P05 * P04 P04 A0 P03 P03 * P02 P02 * P01 P01 Register 2 P00 Register 1 (address) P00 * (note) R2 G0 G1 OPSEL MODE AM / FM IOC1 IOC2 DOC TS1 TS2 R1 F1 OSC R0 F0 Input mode (1) Input mode (2) Input mode (3) (note) ● Test bit A0 A1 A2 A3 Input Mode Valid Data Length 0 # 0 1 (1) 24bits Processes frequency change. 0 # 1 0 (2) 32bits Processes band change. 0 # 1 1 (3) 40bits Processes power on (initialization). Remarks When "0" is set in bits marked with #, data are loaded to register 1; when "1" is set, to register 2. (Note) ● Either "0" or "1" can be set in bits marked with *. ● TS1 and TS2 are pins for internal testing. At power on, be sure to clear to "0" (data set). 6 2006-04-12 TB2118FG (Note) C19 OVER BUSY I / O1 I / O2 * * * C18 * C17 * * C16 * C15 * C14 C13 C12 C11 C10 C09 * C03 C08 * C02 C07 * C01 C06 * 1 0 0 0 C05 (address) C04 (note) C00 2) Data output mode Either "0" or "1" can be set in bits marked with *. 7 2006-04-12 TB2118FG 3) Serial data transfer formats • Data input mode (at input, DOUT becomes high impedance.) End CE 0.5 µs min. 0.5 µs min. 1 µs min. 0.5 µs min. 0.5 µs min. CK Can be omitted 0.5 µs min. DIN 〃 〃 〃 〃 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D36 D37 D38 D39 D40 〃 Input address Can be omitted 0.1 µs max. Internal data (Note) ● When power for TB2118FG is fully on, input data after 100ms or more. ● Until data input starts, set the CE pin to GND to avoid any noise input. ● Data output mode End CE CK Can be omitted DIN 〃 〃 〃 Can be omitted 〃 A0 A1 A2 A3 Output address 0.1 µs max. (low level) DOUT (high impedance) D0 D1 D2 D3 D4 D5 By pull−up resistor value (high level) D20 D21 D22 D23 D24 (high impedance) Internal registers preset (Note) ● Normally, DOUT is high impedance. ● During data output, data output mode is terminated by changing CE = H to L. 8 2006-04-12 TB2118FG 2. Setting reference frequency−related (reference divider block) items 1) Setting crystal oscillator (OSC) With TB2118FG, the two−frequency oscillator shown below can be driven by self−oscillation. F0 Bit F1 Bit Input Frequency 0 0 10.25MHz 0 1 10.35MHz (Note) At power on, F0 / F1 = 0. • Connection example OSC OUT 2 XOUT 1 (Note) Use a crystal oscillator with RS = 50Ω and less and CL = 12pF or less. XIN 24 2 pF 6 pF CL 2) Setting reference frequency (R0, R1, R2) R0 R1 R2 10.25MHz 0 0 0 ― ― 1 0 0 50kHz 50kHz 0 1 0 ― ― 1 1 0 ― ― 0 0 1 10kHz ― 1 0 1 ― 9kHz 0 1 1 ― ― 1 1 1 1kHz ― (Note) Do not select settings where 10.35MHZ is enterd instead of frequency. 3) OSC output select (OSC) = oscillation frequency is output from the OSC out pin. OSC OSC Out Pin 0 Output off 1 Output on (Note) At power on, OSC = 0. 9 2006-04-12 TB2118FG 3. Setting programmable counter block 1) Circuit configuration The progammable counter block consists of a 2−modulus prescaler, 4−bit swallow counter, and 12−bit programmable binary counter. PSC (MODE, AM / PM) FM VCO 15 X 2 − modulus 4 − bit (P00 to P03) prescaler swallow counter PRS (AM) 12 − bit (P04 to P15) AM VCO 16 programmable binary counter fSIG To phase comparator (FM) 2) Setting input pin / dividing mode (AM / FM, mode) AM / FM Mode Input Pin Input Frequency 0 0 FMVCO 30~150MHz 1 1 AMVCO 1~40MHz Divided Frequency Dividing Mode 528~65.535 By pulse swallow (16−bit) 3) Setting divided frequency (P00 to P15) • By pulse swallow (in FW or SW mode), n = 528 to 65.535 P15 P13 P12 P11 P10 P09 P08 P07 P06 P05 P04 P03 P02 P01 P00 P14 MSB LSB 15 0 2 2 10 2006-04-12 TB2118FG 4. Control of phase comparator and charge pumps The phase comparator compares the phase difference between the reference frequency signal (fREF) and the programmable counter divisor output (fSIG) and outputs the result. The constant current driver block outputs phase error signals as a current. 1) Setting charge pumps and op−amps (OPSEL) The OPSEL bit is used to select a charge pump and an op−amp. OPSEL Charge Pump (CP) Output Op−Amp AM CP Output FM CP Output 0 DOFM FM amp Hz DO 1 DOAM AM amp DO Hz Hz = high impedance DO = tri−state output 2) Setting current value (CRO) ● AM / FM = "1" (AMIN input) ● AM / FM = "0" (FMIN input) CR1 CR0 AM CP Out Output Current CR1 CR0 FM CP Out Output Current 0 0 ±0.3mA 0 0 ±250µA 0 1 ±0.5mA 1 0 ±5mA 3) Connection example (the filter circuit is an example for reference. Check and design depending on the desired characteristics for your set.) AM 20 CP OUT 100 pF VT 19 FM CP OUT 18 100 Ω 0.047 µF 3.3 kΩ 1000 pF 0.47 µF 15 kΩ VT 8200 pF 11 2006-04-12 TB2118FG 5. Control of general−purpose counter circuit The general−purpose counter is a 20−bit counter used to measure the intermediate frequency. This is used at auto tuning for detecting a radio station. Setting "1" in the start bit starts counting after counter reset. 1) Circuit configuration C00 to C19 20 − bit IFC 13 Over Overflow detection binary counter Reset Busy detector Gate time control circuit Start G0 Busy G1 2) Setting IF counter gate time / wait time (G0, G1) G0 G1 Gate Time 0 0 1ms 1 0 4ms 0 1 16ms 1 1 64ms Wait Time 3.3~4.3ms 7.3~8.3ms 3) Counter output data (C00 to C19) C18 C17 C16 C15 C14 C13 C12 C11 C10 C09 C08 C07 C06 C05 C04 C03 C02 C01 C00 0 C19 MSB LSB 19 2 2 12 2006-04-12 TB2118FG 4) Detecting counter operating status Busy Counter Operating Status Over Counter Value 0 Counting ended 0 N ≤ 220 − 1 1 Counting 1 N ≥ 220 (overflow) (*) Setting the DOC bit to "1" enables constant output of busy state from the DOUT pin. Note that at this time, the busy status is the inversion of the busy bit: busy status = 0 (counting) and busy status = 1 (counting ended). The DOC bit is set to "0" at power on. 5) Counter timing (when PLL data are updated and counting starts) CE Pll data (old data) (new data) Busy ( * ) Constant output from DOUT pin enabled. Gate Wait time Gate time Counter input Over 13 2006-04-12 TB2118FG 6. Setting general−purpose I / O ports 1) Setting output ports (OUT−1, OUT−2) OUT1, 2 Output Port Status 0 Driver off (high impedance) 1 Driver on (low level) 2) Setting I / O control and I / O output ports (I / O1, I / O2, I / OC1, IOC2) IOC1, 2 I / O1, 2 I / O Port Setting Output Port Status 0 Input port (CMOS input) 0 Low−level output 1 Output port (CMOS output) 1 High−level output (Note) Valid only when set to output port. ● At power on, I / O ports are set to input. 3) Reading I / O port data (I / O1, I / O2: Output mode data) I / O1, 2 Input Port Status 0 Low−level output 1 High−level output (Note) Valid only when set to input port. 7. Others 1) Control (DOC) of serial data output (DOUT) DOC DOUT Output Status Remarks 0 Other than in output made, high impedance. ― 1 Outputs BUSY status of general−purpose counter (constant output mode). 0: Counting 1: Counting ended ● At power on, DOC = 0. 14 2006-04-12 TB2118FG Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Power supply voltage (1) VDD −0.3~6.0 V Power supply voltage (2) VCC −0.3~11.0 V VDD input voltage VIN (1) −0.3~VDD+0.3 V VCC input voltage VIN (2) −0.3~VCC+0.3 V Applied voltage on pins (6), (10), (11) VCEO 12 V Powe dissipation PD 430 mW Operating temperature Topr −40~85 °C Storage temperature Tstg −65~150 °C Electrical Characteristics (unless otherwise specified, Ta = 25°C, VCC = 8.5, VDD = 5V, VDD2 = 3.5V, VSS = GND = 0V) Supply Voltage And Current (VCC, VDD, VDD2, A−GND, D−GND) Characteristics Symbol Test Cir− cuit Test Condition VCC Operating power supply voltage VDD ― ICC IDD ― IDD2 fxt = 10.25MHz Ta = 25°C FMIN = 150MHz Typ. Max. Unit 8.0 8.5 10.0 4.5 5.0 5.5 3.0 3.5 5.5 VCC = 10V max. ― 17.0 25.0 VDD = 5.5V max. ― 20.0 29.0 VDD2 = 5.5V max. ― 0.25 1.0 ― 10.25 10.35 MHz 100 560 ― mVrms Ta = −40~85°C VDD2 Operating power supply current Min. V mA Crystal Oscillator Circuit (XTIN, XTOUT) Crystal oscillator frequency Oscillator output level fXT ― Connect the crystal oscillator to XTIN and XTOUT. OSCO 1 OSC pin Test Circuit 1 2 10 kΩ 10 pF Monitor 15 2006-04-12 TB2118FG Operating Frequency Range (FMIN, AMIN, AM / FM IF) Symbol Test Cir− cuit FMVCO operating frequency fFM ― AMVCO operating frequency fAM ― IFC operating frequency fIF ― Characteristics Test Condition Min. Typ. Max. Unit VIN = 0.2Vp−p, sine wave input, capacitive coupling, by pulse swallow VIN = 0.2Vp−p, sine wave input, capacitive coupling, by pulse swallow VIN = 0.2Vp−p, sine wave input, capacitive coupling, IFC pin 30 ~ 150 MHz 1.0 ~ 40 MHz 0.1 ~ 15 MHz Input frequency 0.1~15MHz 0.2 ~ VDD −0.5 Vp−p 0.141 ~ VDD −0.5 Input frequency 120~150MHz 0.2 ~ VDD −0.5 Input frequency 1.0~15MHz (*) 0.113 ~ VDD −0.5 0.2 ~ VDD −0.5 VDD −1.5 ~ VDD 0 ~ 1.5 Input Range (FMVCO, AMVCO, IFC) IFC input level IFC VIN ― FMVCO input level FMVCO VIN ― AMVCO input level AMVCO VIN Input frequency 30~120MHz (*) ― Input frequency 15~40MHz Vp−p Vp−p (*) Weekly code 9843~. Serial Interface (CE, CK, DIN, DOUT, SR) Input voltage Input current High level VIH (1) Low level VIL (1) High level IIH (1) Low level IIL (1) Low−level output current IOL (1) Output off−leak current IOFF (1) CE, CK, DIN, SR pins ― ― ― V VIH = 5V −1.0 ― +1.0 VIL = 0V −1.0 ― +1.0 VOL = 0.2V 0.8 3.0 ― mA VOH = 5V −1.0 ― +1.0 µA µA DOUT pin ― Output Ports (out−1, out−2) Low−level output current IOL (2) ― VOL = 0.2V 0.8 3.0 ― mA Output off−leak current IOFF (2) ― VOH = 10V −1.0 ― +1.0 µA 16 2006-04-12 TB2118FG I / Oports (I / O−1, I / O−2) Input current High level IIH (2) Low level IIL (2) Input voltage High level VIH (2) Low level VIL (2) Output current High level IOH (1) Low level IOL (3) ― VIH = 5V −1.0 ― +1.0 VIL = 0V −1.0 ― +1.0 VDD −1.5 ~ VDD 0 ~ 1.5 VOH = 4.0V −5.0 −7.5 ― VOL = 1.0V 3.5 4.5 ― Min. Typ. Max. ― ― µA V mA Charge Pumps (AMCPOUT, FMCPOUT) Characteristics Symbol Test Cir− cuit FM charge pump output current IOFM (1) AM charge pump output current IOAM (1) ― IOAM (2) ― IOFM (2) ― Test Condition CR0 Bit CR1 Bit 0 0 ±0.20 ±0.25 ±0.4 0 1 ±4.0 ±5.0 ±7.0 0 0 ±0.2 ±0.3 ±0.45 1 0 ±0.4 ±0.5 ±0.75 VIN = VDD, VOUT = 8.5V 1.0 2.0 ― VIN = GND, VOUT = 0V −1.0 −2.0 ― DOFM pin DOAM pin Unit mA mA OP−Amps (VT) AM op−amp output current FM op−amp output current VT output voltage IOL IOH IOL IOH VVT ― ― VIN = VDD, VOUT = 8.5V 5.0 9.0 ― VIN = GND, VOUT = 0V −5.0 −9.0 ― 0.3 ~ VCC −1.1 ― 17 mA mA V 2006-04-12 TB2118FG Application Circuit 1 VT 100 Ω 1000 pF AM VCO AM VCO 10 µF 6 pF 0.047 µF AM / FM IF 0.047 µF AM XTIN AGND RF VCC CPOUT 24 23 22 21 20 FM VT VDD IF IN CPOUT DGND AMVCO FMVCO 19 18 17 16 15 14 13 VCC A − GND VDD 0.01 µF VCC D − GND Regurator − + − VDD + AMP AMP AMP X PSC X’tal 10.25 MHz 10.35 MHz 4 bit swallow counter Oscillation circuit 40 bit shift resister ON / OFF Buffer 1 2 pF 2 N DATA Bus interface 3 XTOUT OSC OUT Rd 12 bit programable counter Phase comparator Reference counter MAX. 12 pF 2 modulas prescaler 4 CE 5 DIN 6 CK 7 DOUT I / O Ports 8 SR 20 bit counter OUT ports VDD2 10 11 12 I / O − 1 I / O − 2 OUT − 1 OUT − 2 VDD2 9 0.047 µF 0.01 µF 18 2006-04-12 TB2118FG Package Dimensions Weight: 0.31g (typ.) 19 2006-04-12 TB2118FG RESTRICTIONS ON PRODUCT USE 060116EBA • The information contained herein is subject to change without notice. 021023_D • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. 021023_A • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. 021023_B • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_Q • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. 021023_C • The products described in this document are subject to the foreign exchange and foreign trade laws. 021023_E About solderability, following conditions were confirmed • Solderability (1) Use of Sn-37Pb solder Bath · solder bath temperature = 230°C · dipping time = 5 seconds · the number of times = once · use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath · solder bath temperature = 245°C · dipping time = 5 seconds · the number of times = once · use of R-type flux 20 2006-04-12